[10:56:48.603] <TB1> INFO: *** Welcome to pxar ***
[10:56:48.603] <TB1> INFO: *** Today: 2015/10/30
[10:56:48.627] <TB1> INFO: *** Version: 9da6-dirty
[10:56:48.627] <TB1> INFO: readRocDacs: /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C15.dat
[10:56:48.630] <TB1> INFO: readTbmDacs: /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//tbmParameters_C0a.dat .. /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//tbmParameters_C0b.dat
[10:56:48.634] <TB1> INFO: readMaskFile: /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//defaultMaskFile.dat
[10:56:48.634] <TB1> INFO: readTrimFile: /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters_C15.dat
[10:56:48.751] <TB1> INFO: clk: 4
[10:56:48.751] <TB1> INFO: ctr: 4
[10:56:48.751] <TB1> INFO: sda: 19
[10:56:48.751] <TB1> INFO: tin: 9
[10:56:48.751] <TB1> INFO: level: 15
[10:56:48.751] <TB1> INFO: triggerdelay: 0
[10:56:48.751] <TB1> QUIET: Instanciating API for pxar prod-11
[10:56:48.751] <TB1> INFO: Log level: INFO
[10:56:48.761] <TB1> INFO: Found DTB DTB_WWVH60
[10:56:48.781] <TB1> QUIET: Connection to board DTB_WWVH60 opened.
[10:56:48.791] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 129
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WWVH60
MAC address: 40D855118081
Hostname: pixelDTB129
Comment:
------------------------------------------------------
[10:56:48.795] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[10:56:50.443] <TB1> INFO: DUT info:
[10:56:50.443] <TB1> INFO: The DUT currently contains the following objects:
[10:56:50.444] <TB1> INFO: 2 TBM Cores tbm08c (2 ON)
[10:56:50.444] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:56:50.444] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:56:50.444] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:56:50.444] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.444] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:56:50.847] <TB1> INFO: enter 'restricted' command line mode
[10:56:50.847] <TB1> INFO: enter test to run
[10:56:50.847] <TB1> INFO: test: FullTest no parameter change
[10:56:50.847] <TB1> INFO: running: fulltest
[10:56:50.856] <TB1> INFO: ######################################################################
[10:56:50.856] <TB1> INFO: PixTestFullTest::doTest()
[10:56:50.856] <TB1> INFO: ######################################################################
[10:56:50.859] <TB1> INFO: ######################################################################
[10:56:50.859] <TB1> INFO: PixTestPretest::doTest()
[10:56:50.860] <TB1> INFO: ######################################################################
[10:56:50.862] <TB1> INFO: ----------------------------------------------------------------------
[10:56:50.862] <TB1> INFO: PixTestPretest::programROC()
[10:56:50.862] <TB1> INFO: ----------------------------------------------------------------------
[10:57:08.882] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:57:08.882] <TB1> INFO: IA differences per ROC: 16.1 18.5 16.9 17.7 19.3 16.1 18.5 16.9 18.5 16.9 18.5 19.3 16.9 18.5 20.9 18.5
[10:57:08.979] <TB1> INFO: ----------------------------------------------------------------------
[10:57:08.980] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:57:08.980] <TB1> INFO: ----------------------------------------------------------------------
[10:57:28.593] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[10:57:28.595] <TB1> INFO: ----------------------------------------------------------------------
[10:57:28.595] <TB1> INFO: PixTestPretest::findTiming()
[10:57:28.595] <TB1> INFO: ----------------------------------------------------------------------
[10:57:28.596] <TB1> INFO: PixTestCmd::init()
[10:57:29.232] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!
[10:59:02.811] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:59:02.811] <TB1> INFO: (success/tries = 100/100), width = 4
[10:59:02.814] <TB1> INFO: ----------------------------------------------------------------------
[10:59:02.814] <TB1> INFO: PixTestPretest::findWorkingPixel()
[10:59:02.814] <TB1> INFO: ----------------------------------------------------------------------
[10:59:02.966] <TB1> INFO: Expecting 231680 events.
[10:59:08.155] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (1) != Token Chain Length (8)
[10:59:08.159] <TB1> ERROR: <datapipe.cc/CheckEventID:L457> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[10:59:11.063] <TB1> INFO: 231680 events read in total (7319ms).
[10:59:11.076] <TB1> INFO: Test took 8256ms.
[10:59:11.511] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:59:11.547] <TB1> INFO: ----------------------------------------------------------------------
[10:59:11.547] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[10:59:11.547] <TB1> INFO: ----------------------------------------------------------------------
[10:59:11.706] <TB1> INFO: Expecting 231680 events.
[10:59:20.180] <TB1> INFO: 231680 events read in total (7684ms).
[10:59:20.192] <TB1> INFO: Test took 8621ms.
[10:59:20.637] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[10:59:20.637] <TB1> INFO: CalDel: 132 144 119 143 125 130 146 154 136 129 128 117 134 117 113 143
[10:59:20.637] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:59:20.644] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C0.dat
[10:59:20.645] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C1.dat
[10:59:20.645] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C2.dat
[10:59:20.646] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C3.dat
[10:59:20.646] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C4.dat
[10:59:20.646] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C5.dat
[10:59:20.647] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C6.dat
[10:59:20.647] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C7.dat
[10:59:20.647] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C8.dat
[10:59:20.647] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C9.dat
[10:59:20.647] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C10.dat
[10:59:20.647] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C11.dat
[10:59:20.647] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C12.dat
[10:59:20.648] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C13.dat
[10:59:20.648] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C14.dat
[10:59:20.648] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters_C15.dat
[10:59:20.648] <TB1> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//tbmParameters_C0a.dat
[10:59:20.648] <TB1> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//tbmParameters_C0b.dat
[10:59:20.648] <TB1> INFO: PixTestPretest::doTest() done, duration: 149 seconds
[10:59:20.648] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:20.648] <TB1> INFO: Decoding statistics:
[10:59:20.648] <TB1> INFO: General information:
[10:59:20.648] <TB1> INFO: 16bit words read: 7005882
[10:59:20.648] <TB1> INFO: valid events total: 463360
[10:59:20.648] <TB1> INFO: empty events: 302648
[10:59:20.648] <TB1> INFO: valid events with pixels: 160712
[10:59:20.649] <TB1> INFO: valid pixel hits: 722781
[10:59:20.649] <TB1> INFO: Event errors: 0
[10:59:20.649] <TB1> INFO: start marker: 0
[10:59:20.649] <TB1> INFO: stop marker: 0
[10:59:20.649] <TB1> INFO: overflow: 0
[10:59:20.649] <TB1> INFO: invalid 5bit words: 0
[10:59:20.649] <TB1> INFO: invalid XOR eye diagram: 0
[10:59:20.649] <TB1> INFO: TBM errors: 0
[10:59:20.649] <TB1> INFO: flawed TBM headers: 0
[10:59:20.649] <TB1> INFO: flawed TBM trailers: 0
[10:59:20.649] <TB1> INFO: event ID mismatches: 0
[10:59:20.649] <TB1> INFO: ROC errors: 0
[10:59:20.649] <TB1> INFO: missing ROC header(s): 0
[10:59:20.649] <TB1> INFO: misplaced readback start: 0
[10:59:20.649] <TB1> INFO: Pixel decoding errors: 0
[10:59:20.649] <TB1> INFO: pixel data incomplete: 0
[10:59:20.649] <TB1> INFO: pixel address: 0
[10:59:20.649] <TB1> INFO: pulse height fill bit: 0
[10:59:20.649] <TB1> INFO: buffer corruption: 0
[10:59:20.852] <TB1> INFO: ######################################################################
[10:59:20.852] <TB1> INFO: PixTestAlive::doTest()
[10:59:20.852] <TB1> INFO: ######################################################################
[10:59:20.855] <TB1> INFO: ----------------------------------------------------------------------
[10:59:20.855] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:20.855] <TB1> INFO: ----------------------------------------------------------------------
[10:59:21.269] <TB1> INFO: Expecting 41600 events.
[10:59:25.972] <TB1> INFO: 41600 events read in total (3924ms).
[10:59:25.974] <TB1> INFO: Test took 5117ms.
[10:59:25.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:26.422] <TB1> INFO: PixTestAlive::aliveTest() done
[10:59:26.422] <TB1> INFO: number of dead pixels (per ROC): 1 84 50 3 1 9 39 3 6 44 23 0 0 14 4 0
[10:59:26.424] <TB1> INFO: ----------------------------------------------------------------------
[10:59:26.424] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:26.425] <TB1> INFO: ----------------------------------------------------------------------
[10:59:26.816] <TB1> INFO: Expecting 41600 events.
[10:59:30.033] <TB1> INFO: 41600 events read in total (2438ms).
[10:59:30.033] <TB1> INFO: Test took 3607ms.
[10:59:30.033] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:30.034] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:59:30.503] <TB1> INFO: PixTestAlive::maskTest() done
[10:59:30.503] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:59:30.505] <TB1> INFO: ----------------------------------------------------------------------
[10:59:30.505] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:30.505] <TB1> INFO: ----------------------------------------------------------------------
[10:59:30.868] <TB1> INFO: Expecting 41600 events.
[10:59:35.548] <TB1> INFO: 41600 events read in total (3902ms).
[10:59:35.550] <TB1> INFO: Test took 5041ms.
[10:59:35.562] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:35.984] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[10:59:35.984] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:59:35.984] <TB1> INFO: PixTestAlive::doTest() done, duration: 15 seconds
[10:59:35.984] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:35.984] <TB1> INFO: Decoding statistics:
[10:59:35.984] <TB1> INFO: General information:
[10:59:35.985] <TB1> INFO: 16bit words read: 0
[10:59:35.985] <TB1> INFO: valid events total: 0
[10:59:35.985] <TB1> INFO: empty events: 0
[10:59:35.985] <TB1> INFO: valid events with pixels: 0
[10:59:35.985] <TB1> INFO: valid pixel hits: 0
[10:59:35.985] <TB1> INFO: Event errors: 0
[10:59:35.985] <TB1> INFO: start marker: 0
[10:59:35.985] <TB1> INFO: stop marker: 0
[10:59:35.985] <TB1> INFO: overflow: 0
[10:59:35.985] <TB1> INFO: invalid 5bit words: 0
[10:59:35.985] <TB1> INFO: invalid XOR eye diagram: 0
[10:59:35.985] <TB1> INFO: TBM errors: 0
[10:59:35.985] <TB1> INFO: flawed TBM headers: 0
[10:59:35.985] <TB1> INFO: flawed TBM trailers: 0
[10:59:35.985] <TB1> INFO: event ID mismatches: 0
[10:59:35.985] <TB1> INFO: ROC errors: 0
[10:59:35.985] <TB1> INFO: missing ROC header(s): 0
[10:59:35.985] <TB1> INFO: misplaced readback start: 0
[10:59:35.985] <TB1> INFO: Pixel decoding errors: 0
[10:59:35.985] <TB1> INFO: pixel data incomplete: 0
[10:59:35.985] <TB1> INFO: pixel address: 0
[10:59:35.985] <TB1> INFO: pulse height fill bit: 0
[10:59:35.985] <TB1> INFO: buffer corruption: 0
[10:59:35.996] <TB1> INFO: ######################################################################
[10:59:35.996] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:59:35.996] <TB1> INFO: ######################################################################
[10:59:35.999] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:59:36.105] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[10:59:36.105] <TB1> INFO: run 1 of 1
[10:59:36.475] <TB1> INFO: Expecting 3120000 events.
[11:00:28.708] <TB1> INFO: 1206060 events read in total (51455ms).
[11:01:23.044] <TB1> INFO: 2408040 events read in total (105792ms).
[11:01:55.786] <TB1> INFO: 3120000 events read in total (138534ms).
[11:01:55.880] <TB1> INFO: Test took 139776ms.
[11:01:56.054] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:01.035] <TB1> INFO: PixTestBBMap::doTest() done, duration: 205 seconds
[11:03:01.035] <TB1> INFO: number of dead bumps (per ROC): 0 8 2 0 0 1 3 0 0 2 2 0 0 0 0 0
[11:03:01.035] <TB1> INFO: separation cut (per ROC): 108 126 136 118 124 120 130 113 125 127 130 131 110 146 139 119
[11:03:01.036] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:01.036] <TB1> INFO: Decoding statistics:
[11:03:01.036] <TB1> INFO: General information:
[11:03:01.036] <TB1> INFO: 16bit words read: 0
[11:03:01.036] <TB1> INFO: valid events total: 0
[11:03:01.036] <TB1> INFO: empty events: 0
[11:03:01.036] <TB1> INFO: valid events with pixels: 0
[11:03:01.036] <TB1> INFO: valid pixel hits: 0
[11:03:01.036] <TB1> INFO: Event errors: 0
[11:03:01.036] <TB1> INFO: start marker: 0
[11:03:01.036] <TB1> INFO: stop marker: 0
[11:03:01.036] <TB1> INFO: overflow: 0
[11:03:01.036] <TB1> INFO: invalid 5bit words: 0
[11:03:01.036] <TB1> INFO: invalid XOR eye diagram: 0
[11:03:01.036] <TB1> INFO: TBM errors: 0
[11:03:01.036] <TB1> INFO: flawed TBM headers: 0
[11:03:01.036] <TB1> INFO: flawed TBM trailers: 0
[11:03:01.036] <TB1> INFO: event ID mismatches: 0
[11:03:01.036] <TB1> INFO: ROC errors: 0
[11:03:01.036] <TB1> INFO: missing ROC header(s): 0
[11:03:01.036] <TB1> INFO: misplaced readback start: 0
[11:03:01.036] <TB1> INFO: Pixel decoding errors: 0
[11:03:01.036] <TB1> INFO: pixel data incomplete: 0
[11:03:01.036] <TB1> INFO: pixel address: 0
[11:03:01.037] <TB1> INFO: pulse height fill bit: 0
[11:03:01.037] <TB1> INFO: buffer corruption: 0
[11:03:01.150] <TB1> INFO: ######################################################################
[11:03:01.150] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:03:01.150] <TB1> INFO: ######################################################################
[11:03:01.150] <TB1> INFO: ----------------------------------------------------------------------
[11:03:01.150] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:03:01.150] <TB1> INFO: ----------------------------------------------------------------------
[11:03:01.151] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:03:01.190] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[11:03:01.190] <TB1> INFO: run 1 of 1
[11:03:01.623] <TB1> INFO: Expecting 26208000 events.
[11:03:38.861] <TB1> INFO: 1134050 events read in total (36453ms).
[11:04:15.518] <TB1> INFO: 2243650 events read in total (73110ms).
[11:04:52.064] <TB1> INFO: 3353700 events read in total (109656ms).
[11:05:29.632] <TB1> INFO: 4459350 events read in total (147224ms).
[11:06:06.690] <TB1> INFO: 5565600 events read in total (184282ms).
[11:06:43.760] <TB1> INFO: 6668100 events read in total (221352ms).
[11:07:20.836] <TB1> INFO: 7766150 events read in total (258428ms).
[11:07:57.867] <TB1> INFO: 8863200 events read in total (295459ms).
[11:08:34.855] <TB1> INFO: 9960400 events read in total (332447ms).
[11:09:11.428] <TB1> INFO: 11055450 events read in total (369020ms).
[11:09:48.508] <TB1> INFO: 12150800 events read in total (406100ms).
[11:10:25.197] <TB1> INFO: 13236150 events read in total (442789ms).
[11:11:06.368] <TB1> INFO: 14312800 events read in total (483960ms).
[11:11:43.093] <TB1> INFO: 15388900 events read in total (520685ms).
[11:12:19.802] <TB1> INFO: 16460650 events read in total (557394ms).
[11:12:56.368] <TB1> INFO: 17532250 events read in total (593960ms).
[11:13:35.050] <TB1> INFO: 18605300 events read in total (632642ms).
[11:14:11.237] <TB1> INFO: 19675800 events read in total (668829ms).
[11:14:47.658] <TB1> INFO: 20749600 events read in total (705250ms).
[11:15:24.123] <TB1> INFO: 21822100 events read in total (741715ms).
[11:16:00.450] <TB1> INFO: 22892600 events read in total (778042ms).
[11:16:36.552] <TB1> INFO: 23966650 events read in total (814144ms).
[11:17:13.047] <TB1> INFO: 25042050 events read in total (850639ms).
[11:17:56.382] <TB1> INFO: 26138550 events read in total (893974ms).
[11:17:59.750] <TB1> INFO: 26208000 events read in total (897342ms).
[11:17:59.911] <TB1> INFO: Test took 898721ms.
[11:18:00.251] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:01.219] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:05.241] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:09.130] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:12.558] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:16.128] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:20.395] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:25.688] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:32.460] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:40.938] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:45.564] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:49.072] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:52.566] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:56.133] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:18:59.587] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:19:02.971] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:19:06.219] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:19:09.806] <TB1> INFO: PixTestScurves::scurves() done
[11:19:09.806] <TB1> INFO: Vcal mean: 81.82 92.37 94.39 87.11 88.07 95.17 90.34 90.78 98.24 87.63 97.54 94.04 76.15 97.80 95.68 99.17
[11:19:09.806] <TB1> INFO: Vcal RMS: 4.34 15.49 11.70 5.28 5.37 6.93 10.14 6.22 6.93 10.26 9.96 5.91 4.37 7.59 6.11 5.26
[11:19:09.806] <TB1> INFO: PixTestScurves::fullTest() done, duration: 968 seconds
[11:19:09.806] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:09.807] <TB1> INFO: Decoding statistics:
[11:19:09.807] <TB1> INFO: General information:
[11:19:09.807] <TB1> INFO: 16bit words read: 0
[11:19:09.807] <TB1> INFO: valid events total: 0
[11:19:09.807] <TB1> INFO: empty events: 0
[11:19:09.807] <TB1> INFO: valid events with pixels: 0
[11:19:09.807] <TB1> INFO: valid pixel hits: 0
[11:19:09.807] <TB1> INFO: Event errors: 0
[11:19:09.807] <TB1> INFO: start marker: 0
[11:19:09.807] <TB1> INFO: stop marker: 0
[11:19:09.807] <TB1> INFO: overflow: 0
[11:19:09.807] <TB1> INFO: invalid 5bit words: 0
[11:19:09.807] <TB1> INFO: invalid XOR eye diagram: 0
[11:19:09.807] <TB1> INFO: TBM errors: 0
[11:19:09.807] <TB1> INFO: flawed TBM headers: 0
[11:19:09.807] <TB1> INFO: flawed TBM trailers: 0
[11:19:09.807] <TB1> INFO: event ID mismatches: 0
[11:19:09.807] <TB1> INFO: ROC errors: 0
[11:19:09.807] <TB1> INFO: missing ROC header(s): 0
[11:19:09.807] <TB1> INFO: misplaced readback start: 0
[11:19:09.807] <TB1> INFO: Pixel decoding errors: 0
[11:19:09.807] <TB1> INFO: pixel data incomplete: 0
[11:19:09.807] <TB1> INFO: pixel address: 0
[11:19:09.807] <TB1> INFO: pulse height fill bit: 0
[11:19:09.807] <TB1> INFO: buffer corruption: 0
[11:19:09.977] <TB1> INFO: ######################################################################
[11:19:09.977] <TB1> INFO: PixTestTrim::doTest()
[11:19:09.977] <TB1> INFO: ######################################################################
[11:19:09.982] <TB1> INFO: ----------------------------------------------------------------------
[11:19:09.982] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:19:09.982] <TB1> INFO: ----------------------------------------------------------------------
[11:19:10.096] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:19:10.096] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:19:10.122] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:19:10.122] <TB1> INFO: run 1 of 1
[11:19:10.555] <TB1> INFO: Expecting 5025280 events.
[11:19:59.408] <TB1> INFO: 1402376 events read in total (48074ms).
[11:20:47.409] <TB1> INFO: 2792592 events read in total (96075ms).
[11:21:37.264] <TB1> INFO: 4189920 events read in total (145931ms).
[11:22:15.674] <TB1> INFO: 5025280 events read in total (184340ms).
[11:22:15.777] <TB1> INFO: Test took 185656ms.
[11:22:15.900] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:03.397] <TB1> INFO: ROC 0 VthrComp = 87
[11:23:03.399] <TB1> INFO: ROC 1 VthrComp = 88
[11:23:03.401] <TB1> INFO: ROC 2 VthrComp = 99
[11:23:03.407] <TB1> INFO: ROC 3 VthrComp = 94
[11:23:03.415] <TB1> INFO: ROC 4 VthrComp = 96
[11:23:03.416] <TB1> INFO: ROC 5 VthrComp = 96
[11:23:03.418] <TB1> INFO: ROC 6 VthrComp = 91
[11:23:03.434] <TB1> INFO: ROC 7 VthrComp = 94
[11:23:03.442] <TB1> INFO: ROC 8 VthrComp = 100
[11:23:03.447] <TB1> INFO: ROC 9 VthrComp = 94
[11:23:03.449] <TB1> INFO: ROC 10 VthrComp = 97
[11:23:03.451] <TB1> INFO: ROC 11 VthrComp = 101
[11:23:03.452] <TB1> INFO: ROC 12 VthrComp = 82
[11:23:03.452] <TB1> INFO: ROC 13 VthrComp = 106
[11:23:03.452] <TB1> INFO: ROC 14 VthrComp = 103
[11:23:03.452] <TB1> INFO: ROC 15 VthrComp = 99
[11:23:03.452] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:23:03.452] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:23:03.492] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:23:03.493] <TB1> INFO: run 1 of 1
[11:23:03.944] <TB1> INFO: Expecting 5025280 events.
[11:23:44.756] <TB1> INFO: 891200 events read in total (40014ms).
[11:24:24.469] <TB1> INFO: 1779160 events read in total (79728ms).
[11:25:06.718] <TB1> INFO: 2665152 events read in total (121977ms).
[11:25:46.693] <TB1> INFO: 3543304 events read in total (161951ms).
[11:26:27.960] <TB1> INFO: 4420616 events read in total (203219ms).
[11:27:04.868] <TB1> INFO: 5025280 events read in total (240126ms).
[11:27:05.048] <TB1> INFO: Test took 241556ms.
[11:27:05.521] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:05.401] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 56.5136 for pixel 5/0 mean/min/max = 44.3424/31.941/56.7439
[11:28:05.402] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 73.4542 for pixel 7/16 mean/min/max = 53.713/33.964/73.4621
[11:28:05.402] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 60.3447 for pixel 20/79 mean/min/max = 47.2962/33.8483/60.7441
[11:28:05.403] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.3344 for pixel 51/3 mean/min/max = 44.4252/32.3556/56.4948
[11:28:05.404] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.3664 for pixel 6/74 mean/min/max = 44.8249/31.8657/57.7841
[11:28:05.404] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.4655 for pixel 12/20 mean/min/max = 46.1288/32.6778/59.5799
[11:28:05.405] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 61.4116 for pixel 20/5 mean/min/max = 48.1565/34.8717/61.4412
[11:28:05.406] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.6422 for pixel 10/1 mean/min/max = 46.3516/32.0275/60.6758
[11:28:05.407] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 59.3149 for pixel 49/13 mean/min/max = 46.3454/33.3361/59.3547
[11:28:05.408] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 57.316 for pixel 23/57 mean/min/max = 45.6922/33.8063/57.578
[11:28:05.409] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 63.3272 for pixel 0/7 mean/min/max = 47.5941/31.7112/63.4771
[11:28:05.410] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 59.6965 for pixel 19/77 mean/min/max = 45.5505/31.0905/60.0105
[11:28:05.411] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 56.2427 for pixel 0/70 mean/min/max = 44.2294/32.1865/56.2723
[11:28:05.413] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 58.8584 for pixel 47/73 mean/min/max = 46.4552/33.9807/58.9296
[11:28:05.413] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 57.8569 for pixel 20/4 mean/min/max = 45.287/32.4777/58.0962
[11:28:05.414] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 59.8975 for pixel 24/62 mean/min/max = 46.328/32.6998/59.9562
[11:28:05.415] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:28:05.593] <TB1> INFO: Expecting 411648 events.
[11:28:14.460] <TB1> INFO: 411648 events read in total (8088ms).
[11:28:14.471] <TB1> INFO: Expecting 411648 events.
[11:28:23.241] <TB1> INFO: 411648 events read in total (8136ms).
[11:28:23.259] <TB1> INFO: Expecting 411648 events.
[11:28:31.926] <TB1> INFO: 411648 events read in total (8041ms).
[11:28:31.954] <TB1> INFO: Expecting 411648 events.
[11:28:40.630] <TB1> INFO: 411648 events read in total (8057ms).
[11:28:40.669] <TB1> INFO: Expecting 411648 events.
[11:28:49.325] <TB1> INFO: 411648 events read in total (8055ms).
[11:28:49.358] <TB1> INFO: Expecting 411648 events.
[11:28:57.964] <TB1> INFO: 411648 events read in total (7995ms).
[11:28:58.017] <TB1> INFO: Expecting 411648 events.
[11:29:06.634] <TB1> INFO: 411648 events read in total (8007ms).
[11:29:06.678] <TB1> INFO: Expecting 411648 events.
[11:29:15.280] <TB1> INFO: 411648 events read in total (8002ms).
[11:29:15.338] <TB1> INFO: Expecting 411648 events.
[11:29:23.907] <TB1> INFO: 411648 events read in total (7986ms).
[11:29:23.977] <TB1> INFO: Expecting 411648 events.
[11:29:32.635] <TB1> INFO: 411648 events read in total (8066ms).
[11:29:32.692] <TB1> INFO: Expecting 411648 events.
[11:29:41.324] <TB1> INFO: 411648 events read in total (8038ms).
[11:29:41.391] <TB1> INFO: Expecting 411648 events.
[11:29:50.212] <TB1> INFO: 411648 events read in total (8227ms).
[11:29:50.275] <TB1> INFO: Expecting 411648 events.
[11:29:59.110] <TB1> INFO: 411648 events read in total (8244ms).
[11:29:59.185] <TB1> INFO: Expecting 411648 events.
[11:30:07.949] <TB1> INFO: 411648 events read in total (8187ms).
[11:30:08.021] <TB1> INFO: Expecting 411648 events.
[11:30:17.740] <TB1> INFO: 411648 events read in total (9139ms).
[11:30:17.883] <TB1> INFO: Expecting 411648 events.
[11:30:26.001] <TB1> INFO: 411648 events read in total (8591ms).
[11:30:27.121] <TB1> INFO: Test took 141706ms.
[11:30:29.167] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:30:29.233] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:30:29.238] <TB1> INFO: run 1 of 1
[11:30:29.805] <TB1> INFO: Expecting 5025280 events.
[11:31:12.447] <TB1> INFO: 871760 events read in total (41863ms).
[11:31:53.550] <TB1> INFO: 1740872 events read in total (82966ms).
[11:32:34.743] <TB1> INFO: 2608432 events read in total (124159ms).
[11:33:15.744] <TB1> INFO: 3466752 events read in total (165160ms).
[11:33:59.563] <TB1> INFO: 4324448 events read in total (208979ms).
[11:34:39.088] <TB1> INFO: 5025280 events read in total (248504ms).
[11:34:39.257] <TB1> INFO: Test took 250014ms.
[11:34:39.611] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:35.471] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.032028 .. 255.000000
[11:35:35.572] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[11:35:35.593] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:35:35.593] <TB1> INFO: run 1 of 1
[11:35:35.980] <TB1> INFO: Expecting 8519680 events.
[11:36:21.116] <TB1> INFO: 828832 events read in total (44357ms).
[11:37:01.154] <TB1> INFO: 1656712 events read in total (84395ms).
[11:37:40.574] <TB1> INFO: 2484232 events read in total (123815ms).
[11:38:20.180] <TB1> INFO: 3311288 events read in total (163421ms).
[11:39:00.094] <TB1> INFO: 4139072 events read in total (203335ms).
[11:39:39.970] <TB1> INFO: 4965464 events read in total (243211ms).
[11:40:19.750] <TB1> INFO: 5792072 events read in total (282991ms).
[11:40:59.462] <TB1> INFO: 6618960 events read in total (322703ms).
[11:41:40.271] <TB1> INFO: 7446152 events read in total (363512ms).
[11:42:29.137] <TB1> INFO: 8273816 events read in total (412378ms).
[11:42:45.293] <TB1> INFO: 8519680 events read in total (428534ms).
[11:42:45.657] <TB1> INFO: Test took 430065ms.
[11:42:46.885] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:49.024] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 0.216468 .. 167.155383
[11:43:49.130] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 0 .. 177 (-1/-1) hits flags = 528 (plus default)
[11:43:49.155] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:43:49.155] <TB1> INFO: run 1 of 1
[11:43:49.576] <TB1> INFO: Expecting 5923840 events.
[11:44:29.439] <TB1> INFO: 860520 events read in total (39082ms).
[11:45:08.950] <TB1> INFO: 1719648 events read in total (78593ms).
[11:45:48.056] <TB1> INFO: 2578424 events read in total (117699ms).
[11:46:27.627] <TB1> INFO: 3436912 events read in total (157270ms).
[11:47:11.517] <TB1> INFO: 4296064 events read in total (201160ms).
[11:47:55.737] <TB1> INFO: 5156056 events read in total (245380ms).
[11:48:31.452] <TB1> INFO: 5923840 events read in total (281095ms).
[11:48:31.607] <TB1> INFO: Test took 282452ms.
[11:48:31.975] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:26.453] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 1.927565 .. 79.301550
[11:49:26.563] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 1 .. 89 (-1/-1) hits flags = 528 (plus default)
[11:49:26.588] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:49:26.588] <TB1> INFO: run 1 of 1
[11:49:27.039] <TB1> INFO: Expecting 2961920 events.
[11:50:09.985] <TB1> INFO: 981408 events read in total (42167ms).
[11:50:52.087] <TB1> INFO: 1961408 events read in total (84270ms).
[11:51:34.798] <TB1> INFO: 2942552 events read in total (126981ms).
[11:51:36.111] <TB1> INFO: 2961920 events read in total (128293ms).
[11:51:36.201] <TB1> INFO: Test took 129613ms.
[11:51:36.362] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:16.492] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 3.187278 .. 66.925607
[11:52:16.583] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 3 .. 76 (-1/-1) hits flags = 528 (plus default)
[11:52:16.614] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:52:16.614] <TB1> INFO: run 1 of 1
[11:52:17.021] <TB1> INFO: Expecting 2462720 events.
[11:53:12.090] <TB1> INFO: 1021512 events read in total (54291ms).
[11:53:56.899] <TB1> INFO: 2042760 events read in total (99100ms).
[11:54:14.877] <TB1> INFO: 2462720 events read in total (117078ms).
[11:54:14.947] <TB1> INFO: Test took 118334ms.
[11:54:15.087] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:50.460] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:54:50.466] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:54:50.501] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:54:50.501] <TB1> INFO: run 1 of 1
[11:54:50.897] <TB1> INFO: Expecting 1364480 events.
[11:55:37.364] <TB1> INFO: 1077432 events read in total (45687ms).
[11:55:49.363] <TB1> INFO: 1364480 events read in total (57686ms).
[11:55:49.391] <TB1> INFO: Test took 58890ms.
[11:55:49.463] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:18.989] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C0.dat
[11:56:18.990] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C1.dat
[11:56:18.990] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C2.dat
[11:56:18.990] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C3.dat
[11:56:18.991] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C4.dat
[11:56:18.991] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C5.dat
[11:56:18.991] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C6.dat
[11:56:18.991] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C7.dat
[11:56:18.992] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C8.dat
[11:56:18.992] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C9.dat
[11:56:18.992] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C10.dat
[11:56:18.993] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C11.dat
[11:56:18.993] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C12.dat
[11:56:18.993] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C13.dat
[11:56:18.993] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C14.dat
[11:56:18.994] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C15.dat
[11:56:18.994] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C0.dat
[11:56:19.030] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C1.dat
[11:56:19.066] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C2.dat
[11:56:19.092] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C3.dat
[11:56:19.116] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C4.dat
[11:56:19.139] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C5.dat
[11:56:19.155] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C6.dat
[11:56:19.173] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C7.dat
[11:56:19.189] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C8.dat
[11:56:19.206] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C9.dat
[11:56:19.221] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C10.dat
[11:56:19.238] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C11.dat
[11:56:19.254] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C12.dat
[11:56:19.271] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C13.dat
[11:56:19.289] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C14.dat
[11:56:19.308] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//trimParameters35_C15.dat
[11:56:19.326] <TB1> INFO: PixTestTrim::trimTest() done
[11:56:19.326] <TB1> INFO: vtrim: 96 159 104 98 101 101 115 123 96 109 125 112 93 109 114 111
[11:56:19.326] <TB1> INFO: vthrcomp: 87 88 99 94 96 96 91 94 100 94 97 101 82 106 103 99
[11:56:19.326] <TB1> INFO: vcal mean: 34.96 34.24 34.55 34.93 34.99 34.84 34.72 34.91 34.93 34.66 34.86 34.97 34.96 34.90 34.98 35.03
[11:56:19.326] <TB1> INFO: vcal RMS: 1.06 5.03 3.89 1.28 1.06 1.85 3.41 1.72 1.75 3.67 2.80 0.96 0.88 2.29 1.31 1.10
[11:56:19.326] <TB1> INFO: bits mean: 9.97 8.19 8.54 9.65 9.37 9.21 8.96 9.58 9.15 9.23 9.12 9.57 9.67 8.93 9.52 9.38
[11:56:19.326] <TB1> INFO: bits RMS: 2.61 2.55 2.86 2.64 2.83 2.72 2.46 2.62 2.61 2.63 2.80 2.77 2.67 2.62 2.64 2.62
[11:56:19.348] <TB1> INFO: ----------------------------------------------------------------------
[11:56:19.350] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:56:19.350] <TB1> INFO: ----------------------------------------------------------------------
[11:56:19.406] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:56:19.457] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:56:19.458] <TB1> INFO: run 1 of 1
[11:56:19.903] <TB1> INFO: Expecting 4160000 events.
[11:57:16.632] <TB1> INFO: 1155905 events read in total (55934ms).
[11:58:10.704] <TB1> INFO: 2294900 events read in total (110006ms).
[11:59:00.260] <TB1> INFO: 3422560 events read in total (159562ms).
[11:59:34.086] <TB1> INFO: 4160000 events read in total (193388ms).
[11:59:34.181] <TB1> INFO: Test took 194723ms.
[11:59:34.386] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:37.502] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[12:00:37.527] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:00:37.527] <TB1> INFO: run 1 of 1
[12:00:37.964] <TB1> INFO: Expecting 4035200 events.
[12:01:28.386] <TB1> INFO: 1126845 events read in total (49644ms).
[12:02:16.640] <TB1> INFO: 2238920 events read in total (97898ms).
[12:03:03.827] <TB1> INFO: 3341145 events read in total (145085ms).
[12:03:37.199] <TB1> INFO: 4035200 events read in total (178457ms).
[12:03:37.334] <TB1> INFO: Test took 179807ms.
[12:03:37.588] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:41.700] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 179 (-1/-1) hits flags = 528 (plus default)
[12:04:41.728] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:04:41.728] <TB1> INFO: run 1 of 1
[12:04:42.169] <TB1> INFO: Expecting 3744000 events.
[12:05:32.938] <TB1> INFO: 1169425 events read in total (49990ms).
[12:06:23.446] <TB1> INFO: 2319755 events read in total (100498ms).
[12:07:15.833] <TB1> INFO: 3461345 events read in total (152885ms).
[12:07:29.710] <TB1> INFO: 3744000 events read in total (166762ms).
[12:07:29.792] <TB1> INFO: Test took 168063ms.
[12:07:30.145] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:26.729] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[12:08:26.755] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:08:26.755] <TB1> INFO: run 1 of 1
[12:08:27.160] <TB1> INFO: Expecting 3785600 events.
[12:09:15.940] <TB1> INFO: 1162050 events read in total (48001ms).
[12:10:04.776] <TB1> INFO: 2305785 events read in total (96838ms).
[12:10:58.764] <TB1> INFO: 3440505 events read in total (150825ms).
[12:11:16.002] <TB1> INFO: 3785600 events read in total (169063ms).
[12:11:17.097] <TB1> INFO: Test took 170342ms.
[12:11:17.309] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:14.154] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 180 (-1/-1) hits flags = 528 (plus default)
[12:12:14.182] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:12:14.183] <TB1> INFO: run 1 of 1
[12:12:14.628] <TB1> INFO: Expecting 3764800 events.
[12:13:05.024] <TB1> INFO: 1164675 events read in total (49617ms).
[12:13:58.878] <TB1> INFO: 2310325 events read in total (103471ms).
[12:14:50.640] <TB1> INFO: 3447420 events read in total (155233ms).
[12:15:04.313] <TB1> INFO: 3764800 events read in total (168906ms).
[12:15:04.422] <TB1> INFO: Test took 170237ms.
[12:15:04.614] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:58.731] <TB1> INFO: PixTestTrim::trimBitTest() done
[12:15:58.734] <TB1> INFO: PixTestTrim::doTest() done, duration: 3408 seconds
[12:15:58.734] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:58.734] <TB1> INFO: Decoding statistics:
[12:15:58.734] <TB1> INFO: General information:
[12:15:58.735] <TB1> INFO: 16bit words read: 0
[12:15:58.735] <TB1> INFO: valid events total: 0
[12:15:58.735] <TB1> INFO: empty events: 0
[12:15:58.735] <TB1> INFO: valid events with pixels: 0
[12:15:58.735] <TB1> INFO: valid pixel hits: 0
[12:15:58.735] <TB1> INFO: Event errors: 0
[12:15:58.735] <TB1> INFO: start marker: 0
[12:15:58.735] <TB1> INFO: stop marker: 0
[12:15:58.735] <TB1> INFO: overflow: 0
[12:15:58.735] <TB1> INFO: invalid 5bit words: 0
[12:15:58.737] <TB1> INFO: invalid XOR eye diagram: 0
[12:15:58.737] <TB1> INFO: TBM errors: 0
[12:15:58.737] <TB1> INFO: flawed TBM headers: 0
[12:15:58.737] <TB1> INFO: flawed TBM trailers: 0
[12:15:58.737] <TB1> INFO: event ID mismatches: 0
[12:15:58.737] <TB1> INFO: ROC errors: 0
[12:15:58.737] <TB1> INFO: missing ROC header(s): 0
[12:15:58.737] <TB1> INFO: misplaced readback start: 0
[12:15:58.737] <TB1> INFO: Pixel decoding errors: 0
[12:15:58.737] <TB1> INFO: pixel data incomplete: 0
[12:15:58.737] <TB1> INFO: pixel address: 0
[12:15:58.737] <TB1> INFO: pulse height fill bit: 0
[12:15:58.737] <TB1> INFO: buffer corruption: 0
[12:16:00.160] <TB1> INFO: ######################################################################
[12:16:00.160] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:16:00.160] <TB1> INFO: ######################################################################
[12:16:00.573] <TB1> INFO: Expecting 41600 events.
[12:16:05.307] <TB1> INFO: 41600 events read in total (3956ms).
[12:16:05.308] <TB1> INFO: Test took 5140ms.
[12:16:05.320] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:06.093] <TB1> INFO: Expecting 41600 events.
[12:16:10.955] <TB1> INFO: 41600 events read in total (4083ms).
[12:16:10.957] <TB1> INFO: Test took 5237ms.
[12:16:10.970] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:11.430] <TB1> INFO: Expecting 41600 events.
[12:16:16.195] <TB1> INFO: 41600 events read in total (3986ms).
[12:16:16.197] <TB1> INFO: Test took 5170ms.
[12:16:16.209] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:16.618] <TB1> INFO: Expecting 2560 events.
[12:16:17.645] <TB1> INFO: 2560 events read in total (249ms).
[12:16:17.646] <TB1> INFO: Test took 1421ms.
[12:16:18.217] <TB1> INFO: Expecting 2560 events.
[12:16:19.240] <TB1> INFO: 2560 events read in total (244ms).
[12:16:19.240] <TB1> INFO: Test took 1594ms.
[12:16:19.814] <TB1> INFO: Expecting 2560 events.
[12:16:20.842] <TB1> INFO: 2560 events read in total (249ms).
[12:16:20.843] <TB1> INFO: Test took 1601ms.
[12:16:21.414] <TB1> INFO: Expecting 2560 events.
[12:16:22.441] <TB1> INFO: 2560 events read in total (248ms).
[12:16:22.442] <TB1> INFO: Test took 1598ms.
[12:16:23.013] <TB1> INFO: Expecting 2560 events.
[12:16:24.041] <TB1> INFO: 2560 events read in total (249ms).
[12:16:24.042] <TB1> INFO: Test took 1598ms.
[12:16:24.616] <TB1> INFO: Expecting 2560 events.
[12:16:25.644] <TB1> INFO: 2560 events read in total (249ms).
[12:16:25.644] <TB1> INFO: Test took 1602ms.
[12:16:26.218] <TB1> INFO: Expecting 2560 events.
[12:16:27.245] <TB1> INFO: 2560 events read in total (249ms).
[12:16:27.246] <TB1> INFO: Test took 1600ms.
[12:16:27.818] <TB1> INFO: Expecting 2560 events.
[12:16:28.846] <TB1> INFO: 2560 events read in total (249ms).
[12:16:28.848] <TB1> INFO: Test took 1601ms.
[12:16:29.419] <TB1> INFO: Expecting 2560 events.
[12:16:30.447] <TB1> INFO: 2560 events read in total (249ms).
[12:16:30.448] <TB1> INFO: Test took 1599ms.
[12:16:31.026] <TB1> INFO: Expecting 2560 events.
[12:16:32.052] <TB1> INFO: 2560 events read in total (248ms).
[12:16:32.054] <TB1> INFO: Test took 1606ms.
[12:16:32.625] <TB1> INFO: Expecting 2560 events.
[12:16:33.654] <TB1> INFO: 2560 events read in total (251ms).
[12:16:33.654] <TB1> INFO: Test took 1598ms.
[12:16:34.232] <TB1> INFO: Expecting 2560 events.
[12:16:35.259] <TB1> INFO: 2560 events read in total (248ms).
[12:16:35.260] <TB1> INFO: Test took 1604ms.
[12:16:35.835] <TB1> INFO: Expecting 2560 events.
[12:16:36.864] <TB1> INFO: 2560 events read in total (250ms).
[12:16:36.864] <TB1> INFO: Test took 1600ms.
[12:16:37.437] <TB1> INFO: Expecting 2560 events.
[12:16:38.463] <TB1> INFO: 2560 events read in total (248ms).
[12:16:38.464] <TB1> INFO: Test took 1599ms.
[12:16:39.036] <TB1> INFO: Expecting 2560 events.
[12:16:40.063] <TB1> INFO: 2560 events read in total (248ms).
[12:16:40.063] <TB1> INFO: Test took 1592ms.
[12:16:40.638] <TB1> INFO: Expecting 2560 events.
[12:16:41.667] <TB1> INFO: 2560 events read in total (249ms).
[12:16:41.667] <TB1> INFO: Test took 1599ms.
[12:16:41.671] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:16:42.242] <TB1> INFO: Expecting 655360 events.
[12:16:56.588] <TB1> INFO: 655360 events read in total (13566ms).
[12:16:56.612] <TB1> INFO: Expecting 655360 events.
[12:17:10.444] <TB1> INFO: 655360 events read in total (13305ms).
[12:17:10.484] <TB1> INFO: Expecting 655360 events.
[12:17:24.156] <TB1> INFO: 655360 events read in total (13146ms).
[12:17:24.209] <TB1> INFO: Expecting 655360 events.
[12:17:38.206] <TB1> INFO: 655360 events read in total (13470ms).
[12:17:38.278] <TB1> INFO: Expecting 655360 events.
[12:17:52.386] <TB1> INFO: 655360 events read in total (13582ms).
[12:17:52.445] <TB1> INFO: Expecting 655360 events.
[12:18:06.444] <TB1> INFO: 655360 events read in total (13472ms).
[12:18:06.507] <TB1> INFO: Expecting 655360 events.
[12:18:20.155] <TB1> INFO: 655360 events read in total (13122ms).
[12:18:20.228] <TB1> INFO: Expecting 655360 events.
[12:18:33.769] <TB1> INFO: 655360 events read in total (13014ms).
[12:18:33.836] <TB1> INFO: Expecting 655360 events.
[12:18:47.440] <TB1> INFO: 655360 events read in total (13078ms).
[12:18:47.527] <TB1> INFO: Expecting 655360 events.
[12:19:01.337] <TB1> INFO: 655360 events read in total (13283ms).
[12:19:01.416] <TB1> INFO: Expecting 655360 events.
[12:19:15.037] <TB1> INFO: 655360 events read in total (13094ms).
[12:19:15.144] <TB1> INFO: Expecting 655360 events.
[12:19:28.762] <TB1> INFO: 655360 events read in total (13091ms).
[12:19:28.871] <TB1> INFO: Expecting 655360 events.
[12:19:42.554] <TB1> INFO: 655360 events read in total (13156ms).
[12:19:42.658] <TB1> INFO: Expecting 655360 events.
[12:19:56.279] <TB1> INFO: 655360 events read in total (13095ms).
[12:19:56.406] <TB1> INFO: Expecting 655360 events.
[12:20:10.017] <TB1> INFO: 655360 events read in total (13084ms).
[12:20:10.131] <TB1> INFO: Expecting 655360 events.
[12:20:23.683] <TB1> INFO: 655360 events read in total (13025ms).
[12:20:23.818] <TB1> INFO: Test took 222147ms.
[12:20:23.970] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:20:24.338] <TB1> INFO: Expecting 655360 events.
[12:20:38.161] <TB1> INFO: 655360 events read in total (13045ms).
[12:20:38.183] <TB1> INFO: Expecting 655360 events.
[12:20:52.080] <TB1> INFO: 655360 events read in total (13370ms).
[12:20:52.095] <TB1> INFO: Expecting 655360 events.
[12:21:06.028] <TB1> INFO: 655360 events read in total (13253ms).
[12:21:06.059] <TB1> INFO: Expecting 655360 events.
[12:21:19.779] <TB1> INFO: 655360 events read in total (13193ms).
[12:21:19.817] <TB1> INFO: Expecting 655360 events.
[12:21:33.490] <TB1> INFO: 655360 events read in total (13147ms).
[12:21:33.532] <TB1> INFO: Expecting 655360 events.
[12:21:47.302] <TB1> INFO: 655360 events read in total (13244ms).
[12:21:47.357] <TB1> INFO: Expecting 655360 events.
[12:22:01.012] <TB1> INFO: 655360 events read in total (13129ms).
[12:22:01.078] <TB1> INFO: Expecting 655360 events.
[12:22:14.798] <TB1> INFO: 655360 events read in total (13193ms).
[12:22:14.868] <TB1> INFO: Expecting 655360 events.
[12:22:28.449] <TB1> INFO: 655360 events read in total (13055ms).
[12:22:28.520] <TB1> INFO: Expecting 655360 events.
[12:22:42.409] <TB1> INFO: 655360 events read in total (13362ms).
[12:22:42.527] <TB1> INFO: Expecting 655360 events.
[12:22:55.000] <TB1> INFO: 655360 events read in total (12946ms).
[12:22:56.093] <TB1> INFO: Expecting 655360 events.
[12:23:09.586] <TB1> INFO: 655360 events read in total (12966ms).
[12:23:09.683] <TB1> INFO: Expecting 655360 events.
[12:23:23.251] <TB1> INFO: 655360 events read in total (13041ms).
[12:23:23.339] <TB1> INFO: Expecting 655360 events.
[12:23:36.996] <TB1> INFO: 655360 events read in total (13129ms).
[12:23:37.121] <TB1> INFO: Expecting 655360 events.
[12:23:50.778] <TB1> INFO: 655360 events read in total (13130ms).
[12:23:50.891] <TB1> INFO: Expecting 655360 events.
[12:24:04.807] <TB1> INFO: 655360 events read in total (13389ms).
[12:24:05.009] <TB1> INFO: Test took 221039ms.
[12:24:05.371] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:05.387] <TB1> INFO: For ROC 0: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.391] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:24:05.406] <TB1> INFO: For ROC 0: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.411] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:24:05.436] <TB1> INFO: For ROC 0: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.440] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:24:05.457] <TB1> INFO: For ROC 0: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.461] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[12:24:05.482] <TB1> INFO: For ROC 0: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.486] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[12:24:05.510] <TB1> INFO: For ROC 0: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.514] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[12:24:05.532] <TB1> INFO: For ROC 0: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.539] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[12:24:05.570] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:05.588] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.592] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:24:05.611] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.617] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:24:05.636] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.639] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:24:05.656] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.661] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[12:24:05.678] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.683] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[12:24:05.704] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.708] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[12:24:05.745] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.750] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[12:24:05.784] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.790] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[12:24:05.823] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.829] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[12:24:05.863] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.871] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[12:24:05.894] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.900] <TB1> INFO: safety margin for low PH: adding 11, margin is now 31
[12:24:05.925] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.932] <TB1> INFO: safety margin for low PH: adding 12, margin is now 32
[12:24:05.955] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.961] <TB1> INFO: safety margin for low PH: adding 13, margin is now 33
[12:24:05.984] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:05.990] <TB1> INFO: safety margin for low PH: adding 14, margin is now 34
[12:24:06.019] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.026] <TB1> INFO: safety margin for low PH: adding 15, margin is now 35
[12:24:06.052] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.057] <TB1> INFO: safety margin for low PH: adding 16, margin is now 36
[12:24:06.085] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.092] <TB1> INFO: safety margin for low PH: adding 17, margin is now 37
[12:24:06.124] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.137] <TB1> INFO: safety margin for low PH: adding 18, margin is now 38
[12:24:06.159] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.163] <TB1> INFO: safety margin for low PH: adding 19, margin is now 39
[12:24:06.196] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.202] <TB1> INFO: safety margin for low PH: adding 20, margin is now 40
[12:24:06.237] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.242] <TB1> INFO: safety margin for low PH: adding 21, margin is now 41
[12:24:06.274] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.278] <TB1> INFO: safety margin for low PH: adding 22, margin is now 42
[12:24:06.305] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.310] <TB1> INFO: safety margin for low PH: adding 23, margin is now 43
[12:24:06.329] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.334] <TB1> INFO: safety margin for low PH: adding 24, margin is now 44
[12:24:06.357] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.362] <TB1> INFO: safety margin for low PH: adding 25, margin is now 45
[12:24:06.382] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.386] <TB1> INFO: safety margin for low PH: adding 26, margin is now 46
[12:24:06.410] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.429] <TB1> INFO: safety margin for low PH: adding 27, margin is now 47
[12:24:06.451] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.456] <TB1> INFO: safety margin for low PH: adding 28, margin is now 48
[12:24:06.482] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.487] <TB1> INFO: safety margin for low PH: adding 29, margin is now 49
[12:24:06.511] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.516] <TB1> INFO: safety margin for low PH: adding 30, margin is now 50
[12:24:06.545] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.550] <TB1> INFO: safety margin for low PH: adding 31, margin is now 51
[12:24:06.582] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.588] <TB1> INFO: safety margin for low PH: adding 32, margin is now 52
[12:24:06.624] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.636] <TB1> INFO: safety margin for low PH: adding 33, margin is now 53
[12:24:06.667] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.671] <TB1> INFO: safety margin for low PH: adding 34, margin is now 54
[12:24:06.691] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.712] <TB1> INFO: safety margin for low PH: adding 35, margin is now 55
[12:24:06.730] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.749] <TB1> INFO: safety margin for low PH: adding 36, margin is now 56
[12:24:06.764] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.769] <TB1> INFO: safety margin for low PH: adding 37, margin is now 57
[12:24:06.807] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.825] <TB1> INFO: safety margin for low PH: adding 38, margin is now 58
[12:24:06.842] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.847] <TB1> INFO: safety margin for low PH: adding 39, margin is now 59
[12:24:06.875] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.879] <TB1> INFO: safety margin for low PH: adding 40, margin is now 60
[12:24:06.909] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.913] <TB1> INFO: safety margin for low PH: adding 41, margin is now 61
[12:24:06.944] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.956] <TB1> INFO: safety margin for low PH: adding 42, margin is now 62
[12:24:06.980] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:06.984] <TB1> INFO: safety margin for low PH: adding 43, margin is now 63
[12:24:06.002] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.008] <TB1> INFO: safety margin for low PH: adding 44, margin is now 64
[12:24:07.035] <TB1> INFO: For ROC 1: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.039] <TB1> INFO: safety margin for low PH: adding 45, margin is now 65
[12:24:07.064] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.083] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.105] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.124] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.145] <TB1> INFO: For ROC 5: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.149] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:24:07.168] <TB1> INFO: For ROC 5: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.174] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:24:07.202] <TB1> INFO: For ROC 5: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.208] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:24:07.231] <TB1> INFO: For ROC 5: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.235] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[12:24:07.264] <TB1> INFO: For ROC 5: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.269] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[12:24:07.304] <TB1> INFO: For ROC 5: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.309] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[12:24:07.338] <TB1> INFO: For ROC 5: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.352] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[12:24:07.410] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.449] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.486] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.521] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.553] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.584] <TB1> INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.594] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:24:07.620] <TB1> INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.624] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:24:07.652] <TB1> INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.657] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:24:07.676] <TB1> INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.692] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[12:24:07.725] <TB1> INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.737] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[12:24:07.760] <TB1> INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.765] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[12:24:07.787] <TB1> INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[12:24:07.792] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[12:24:07.821] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.841] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.862] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.882] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.901] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:24:07.965] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C0.dat
[12:24:07.965] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C1.dat
[12:24:07.966] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C2.dat
[12:24:07.966] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C3.dat
[12:24:07.966] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C4.dat
[12:24:07.970] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C5.dat
[12:24:07.971] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C6.dat
[12:24:07.971] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C7.dat
[12:24:07.972] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C8.dat
[12:24:07.972] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C9.dat
[12:24:07.972] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C10.dat
[12:24:07.973] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C11.dat
[12:24:07.973] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C12.dat
[12:24:07.973] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C13.dat
[12:24:07.974] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C14.dat
[12:24:07.974] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//dacParameters35_C15.dat
[12:24:08.498] <TB1> INFO: Expecting 41600 events.
[12:24:12.957] <TB1> INFO: 41600 events read in total (3680ms).
[12:24:12.959] <TB1> INFO: Test took 4980ms.
[12:24:13.952] <TB1> INFO: Expecting 41600 events.
[12:24:18.240] <TB1> INFO: 41600 events read in total (3510ms).
[12:24:18.242] <TB1> INFO: Test took 4978ms.
[12:24:19.029] <TB1> INFO: Expecting 41600 events.
[12:24:23.416] <TB1> INFO: 41600 events read in total (3608ms).
[12:24:23.418] <TB1> INFO: Test took 4888ms.
[12:24:23.755] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:23.892] <TB1> INFO: Expecting 2560 events.
[12:24:24.925] <TB1> INFO: 2560 events read in total (249ms).
[12:24:24.926] <TB1> INFO: Test took 1171ms.
[12:24:24.932] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:25.498] <TB1> INFO: Expecting 2560 events.
[12:24:26.528] <TB1> INFO: 2560 events read in total (251ms).
[12:24:26.540] <TB1> INFO: Test took 1608ms.
[12:24:26.546] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:27.105] <TB1> INFO: Expecting 2560 events.
[12:24:28.133] <TB1> INFO: 2560 events read in total (249ms).
[12:24:28.133] <TB1> INFO: Test took 1588ms.
[12:24:28.140] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:28.705] <TB1> INFO: Expecting 2560 events.
[12:24:29.737] <TB1> INFO: 2560 events read in total (246ms).
[12:24:29.737] <TB1> INFO: Test took 1597ms.
[12:24:29.746] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:30.312] <TB1> INFO: Expecting 2560 events.
[12:24:31.341] <TB1> INFO: 2560 events read in total (251ms).
[12:24:31.341] <TB1> INFO: Test took 1596ms.
[12:24:31.344] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:31.920] <TB1> INFO: Expecting 2560 events.
[12:24:32.946] <TB1> INFO: 2560 events read in total (247ms).
[12:24:32.946] <TB1> INFO: Test took 1602ms.
[12:24:32.953] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:33.519] <TB1> INFO: Expecting 2560 events.
[12:24:34.546] <TB1> INFO: 2560 events read in total (248ms).
[12:24:34.547] <TB1> INFO: Test took 1594ms.
[12:24:34.554] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:35.119] <TB1> INFO: Expecting 2560 events.
[12:24:36.147] <TB1> INFO: 2560 events read in total (247ms).
[12:24:36.148] <TB1> INFO: Test took 1594ms.
[12:24:36.153] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:36.720] <TB1> INFO: Expecting 2560 events.
[12:24:37.747] <TB1> INFO: 2560 events read in total (248ms).
[12:24:37.748] <TB1> INFO: Test took 1595ms.
[12:24:37.754] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:38.321] <TB1> INFO: Expecting 2560 events.
[12:24:39.351] <TB1> INFO: 2560 events read in total (252ms).
[12:24:39.351] <TB1> INFO: Test took 1597ms.
[12:24:39.359] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:39.928] <TB1> INFO: Expecting 2560 events.
[12:24:40.968] <TB1> INFO: 2560 events read in total (250ms).
[12:24:40.969] <TB1> INFO: Test took 1610ms.
[12:24:40.971] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:41.542] <TB1> INFO: Expecting 2560 events.
[12:24:42.579] <TB1> INFO: 2560 events read in total (257ms).
[12:24:42.579] <TB1> INFO: Test took 1609ms.
[12:24:42.587] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:43.152] <TB1> INFO: Expecting 2560 events.
[12:24:44.185] <TB1> INFO: 2560 events read in total (250ms).
[12:24:44.190] <TB1> INFO: Test took 1603ms.
[12:24:44.196] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:44.758] <TB1> INFO: Expecting 2560 events.
[12:24:45.784] <TB1> INFO: 2560 events read in total (248ms).
[12:24:45.784] <TB1> INFO: Test took 1589ms.
[12:24:45.791] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:46.357] <TB1> INFO: Expecting 2560 events.
[12:24:47.383] <TB1> INFO: 2560 events read in total (248ms).
[12:24:47.384] <TB1> INFO: Test took 1593ms.
[12:24:47.391] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:47.957] <TB1> INFO: Expecting 2560 events.
[12:24:48.988] <TB1> INFO: 2560 events read in total (252ms).
[12:24:48.989] <TB1> INFO: Test took 1598ms.
[12:24:48.995] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:49.561] <TB1> INFO: Expecting 2560 events.
[12:24:50.593] <TB1> INFO: 2560 events read in total (250ms).
[12:24:50.594] <TB1> INFO: Test took 1599ms.
[12:24:50.596] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:51.168] <TB1> INFO: Expecting 2560 events.
[12:24:52.199] <TB1> INFO: 2560 events read in total (252ms).
[12:24:52.199] <TB1> INFO: Test took 1603ms.
[12:24:52.202] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:52.784] <TB1> INFO: Expecting 2560 events.
[12:24:53.816] <TB1> INFO: 2560 events read in total (249ms).
[12:24:53.817] <TB1> INFO: Test took 1615ms.
[12:24:53.823] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:54.391] <TB1> INFO: Expecting 2560 events.
[12:24:55.429] <TB1> INFO: 2560 events read in total (258ms).
[12:24:55.431] <TB1> INFO: Test took 1608ms.
[12:24:55.441] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:56.018] <TB1> INFO: Expecting 2560 events.
[12:24:57.063] <TB1> INFO: 2560 events read in total (254ms).
[12:24:57.065] <TB1> INFO: Test took 1625ms.
[12:24:57.071] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:57.640] <TB1> INFO: Expecting 2560 events.
[12:24:58.669] <TB1> INFO: 2560 events read in total (250ms).
[12:24:58.671] <TB1> INFO: Test took 1601ms.
[12:24:58.678] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:59.255] <TB1> INFO: Expecting 2560 events.
[12:25:00.285] <TB1> INFO: 2560 events read in total (251ms).
[12:25:00.288] <TB1> INFO: Test took 1610ms.
[12:25:00.293] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:00.858] <TB1> INFO: Expecting 2560 events.
[12:25:01.908] <TB1> INFO: 2560 events read in total (271ms).
[12:25:01.908] <TB1> INFO: Test took 1615ms.
[12:25:01.912] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:02.481] <TB1> INFO: Expecting 2560 events.
[12:25:03.509] <TB1> INFO: 2560 events read in total (249ms).
[12:25:03.510] <TB1> INFO: Test took 1598ms.
[12:25:03.516] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:04.082] <TB1> INFO: Expecting 2560 events.
[12:25:05.109] <TB1> INFO: 2560 events read in total (248ms).
[12:25:05.110] <TB1> INFO: Test took 1594ms.
[12:25:05.115] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:05.690] <TB1> INFO: Expecting 2560 events.
[12:25:06.726] <TB1> INFO: 2560 events read in total (257ms).
[12:25:06.726] <TB1> INFO: Test took 1612ms.
[12:25:06.729] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:07.301] <TB1> INFO: Expecting 2560 events.
[12:25:08.329] <TB1> INFO: 2560 events read in total (249ms).
[12:25:08.329] <TB1> INFO: Test took 1600ms.
[12:25:08.336] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:08.903] <TB1> INFO: Expecting 2560 events.
[12:25:09.930] <TB1> INFO: 2560 events read in total (248ms).
[12:25:09.931] <TB1> INFO: Test took 1596ms.
[12:25:09.935] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:10.503] <TB1> INFO: Expecting 2560 events.
[12:25:11.532] <TB1> INFO: 2560 events read in total (250ms).
[12:25:11.532] <TB1> INFO: Test took 1597ms.
[12:25:11.537] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:12.106] <TB1> INFO: Expecting 2560 events.
[12:25:13.137] <TB1> INFO: 2560 events read in total (249ms).
[12:25:13.137] <TB1> INFO: Test took 1601ms.
[12:25:13.141] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:13.711] <TB1> INFO: Expecting 2560 events.
[12:25:14.747] <TB1> INFO: 2560 events read in total (258ms).
[12:25:14.748] <TB1> INFO: Test took 1607ms.
[12:25:15.523] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 555 seconds
[12:25:15.523] <TB1> INFO: PH scale (per ROC): 86 96 84 95 82 83 80 82 83 84 82 79 93 85 83 78
[12:25:15.523] <TB1> INFO: PH offset (per ROC): 144 179 158 163 153 176 156 158 143 151 176 158 148 144 163 158
[12:25:15.541] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:15.541] <TB1> INFO: Decoding statistics:
[12:25:15.541] <TB1> INFO: General information:
[12:25:15.541] <TB1> INFO: 16bit words read: 66442
[12:25:15.541] <TB1> INFO: valid events total: 5120
[12:25:15.541] <TB1> INFO: empty events: 2619
[12:25:15.541] <TB1> INFO: valid events with pixels: 2501
[12:25:15.541] <TB1> INFO: valid pixel hits: 2501
[12:25:15.541] <TB1> INFO: Event errors: 0
[12:25:15.541] <TB1> INFO: start marker: 0
[12:25:15.541] <TB1> INFO: stop marker: 0
[12:25:15.541] <TB1> INFO: overflow: 0
[12:25:15.541] <TB1> INFO: invalid 5bit words: 0
[12:25:15.541] <TB1> INFO: invalid XOR eye diagram: 0
[12:25:15.541] <TB1> INFO: TBM errors: 0
[12:25:15.541] <TB1> INFO: flawed TBM headers: 0
[12:25:15.541] <TB1> INFO: flawed TBM trailers: 0
[12:25:15.541] <TB1> INFO: event ID mismatches: 0
[12:25:15.541] <TB1> INFO: ROC errors: 0
[12:25:15.541] <TB1> INFO: missing ROC header(s): 0
[12:25:15.541] <TB1> INFO: misplaced readback start: 0
[12:25:15.541] <TB1> INFO: Pixel decoding errors: 0
[12:25:15.542] <TB1> INFO: pixel data incomplete: 0
[12:25:15.542] <TB1> INFO: pixel address: 0
[12:25:15.542] <TB1> INFO: pulse height fill bit: 0
[12:25:15.542] <TB1> INFO: buffer corruption: 0
[12:25:15.796] <TB1> INFO: ######################################################################
[12:25:15.797] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:25:15.797] <TB1> INFO: ######################################################################
[12:25:15.829] <TB1> INFO: scanning low vcal = 10
[12:25:16.176] <TB1> INFO: Expecting 41600 events.
[12:25:19.599] <TB1> INFO: 41600 events read in total (2644ms).
[12:25:19.599] <TB1> INFO: Test took 3770ms.
[12:25:19.603] <TB1> INFO: scanning low vcal = 20
[12:25:20.171] <TB1> INFO: Expecting 41600 events.
[12:25:23.622] <TB1> INFO: 41600 events read in total (2670ms).
[12:25:23.624] <TB1> INFO: Test took 4021ms.
[12:25:23.646] <TB1> INFO: scanning low vcal = 30
[12:25:24.192] <TB1> INFO: Expecting 41600 events.
[12:25:27.647] <TB1> INFO: 41600 events read in total (2677ms).
[12:25:27.648] <TB1> INFO: Test took 4002ms.
[12:25:27.652] <TB1> INFO: scanning low vcal = 40
[12:25:28.220] <TB1> INFO: Expecting 41600 events.
[12:25:32.429] <TB1> INFO: 41600 events read in total (3430ms).
[12:25:32.431] <TB1> INFO: Test took 4779ms.
[12:25:32.436] <TB1> INFO: scanning low vcal = 50
[12:25:32.851] <TB1> INFO: Expecting 41600 events.
[12:25:36.957] <TB1> INFO: 41600 events read in total (3325ms).
[12:25:36.959] <TB1> INFO: Test took 4523ms.
[12:25:36.966] <TB1> INFO: scanning low vcal = 60
[12:25:37.407] <TB1> INFO: Expecting 41600 events.
[12:25:41.564] <TB1> INFO: 41600 events read in total (3379ms).
[12:25:41.566] <TB1> INFO: Test took 4600ms.
[12:25:41.590] <TB1> INFO: scanning low vcal = 70
[12:25:41.989] <TB1> INFO: Expecting 41600 events.
[12:25:46.232] <TB1> INFO: 41600 events read in total (3465ms).
[12:25:46.237] <TB1> INFO: Test took 4647ms.
[12:25:46.241] <TB1> INFO: scanning low vcal = 80
[12:25:46.684] <TB1> INFO: Expecting 41600 events.
[12:25:50.980] <TB1> INFO: 41600 events read in total (3517ms).
[12:25:50.982] <TB1> INFO: Test took 4741ms.
[12:25:50.988] <TB1> INFO: scanning low vcal = 90
[12:25:51.470] <TB1> INFO: Expecting 41600 events.
[12:25:56.115] <TB1> INFO: 41600 events read in total (3867ms).
[12:25:56.121] <TB1> INFO: Test took 5133ms.
[12:25:56.131] <TB1> INFO: scanning low vcal = 100
[12:25:56.983] <TB1> INFO: Expecting 41600 events.
[12:26:01.767] <TB1> INFO: 41600 events read in total (3993ms).
[12:26:01.769] <TB1> INFO: Test took 5638ms.
[12:26:01.779] <TB1> INFO: scanning low vcal = 110
[12:26:02.310] <TB1> INFO: Expecting 41600 events.
[12:26:07.322] <TB1> INFO: 41600 events read in total (4224ms).
[12:26:07.328] <TB1> INFO: Test took 5549ms.
[12:26:07.349] <TB1> INFO: scanning low vcal = 120
[12:26:08.126] <TB1> INFO: Expecting 41600 events.
[12:26:12.410] <TB1> INFO: 41600 events read in total (3502ms).
[12:26:12.415] <TB1> INFO: Test took 5063ms.
[12:26:12.420] <TB1> INFO: scanning low vcal = 130
[12:26:12.876] <TB1> INFO: Expecting 41600 events.
[12:26:17.085] <TB1> INFO: 41600 events read in total (3430ms).
[12:26:17.087] <TB1> INFO: Test took 4667ms.
[12:26:17.092] <TB1> INFO: scanning low vcal = 140
[12:26:17.609] <TB1> INFO: Expecting 41600 events.
[12:26:21.776] <TB1> INFO: 41600 events read in total (3388ms).
[12:26:21.778] <TB1> INFO: Test took 4685ms.
[12:26:21.785] <TB1> INFO: scanning low vcal = 150
[12:26:22.304] <TB1> INFO: Expecting 41600 events.
[12:26:26.509] <TB1> INFO: 41600 events read in total (3426ms).
[12:26:26.511] <TB1> INFO: Test took 4725ms.
[12:26:26.517] <TB1> INFO: scanning low vcal = 160
[12:26:26.958] <TB1> INFO: Expecting 41600 events.
[12:26:31.086] <TB1> INFO: 41600 events read in total (3349ms).
[12:26:31.089] <TB1> INFO: Test took 4569ms.
[12:26:31.094] <TB1> INFO: scanning low vcal = 170
[12:26:31.550] <TB1> INFO: Expecting 41600 events.
[12:26:35.638] <TB1> INFO: 41600 events read in total (3303ms).
[12:26:35.640] <TB1> INFO: Test took 4546ms.
[12:26:35.648] <TB1> INFO: scanning low vcal = 180
[12:26:36.088] <TB1> INFO: Expecting 41600 events.
[12:26:40.263] <TB1> INFO: 41600 events read in total (3396ms).
[12:26:40.265] <TB1> INFO: Test took 4617ms.
[12:26:40.274] <TB1> INFO: scanning low vcal = 190
[12:26:40.703] <TB1> INFO: Expecting 41600 events.
[12:26:44.790] <TB1> INFO: 41600 events read in total (3309ms).
[12:26:44.795] <TB1> INFO: Test took 4520ms.
[12:26:44.800] <TB1> INFO: scanning low vcal = 200
[12:26:45.228] <TB1> INFO: Expecting 41600 events.
[12:26:49.274] <TB1> INFO: 41600 events read in total (3266ms).
[12:26:49.276] <TB1> INFO: Test took 4475ms.
[12:26:49.281] <TB1> INFO: scanning low vcal = 210
[12:26:49.750] <TB1> INFO: Expecting 41600 events.
[12:26:53.839] <TB1> INFO: 41600 events read in total (3309ms).
[12:26:53.844] <TB1> INFO: Test took 4563ms.
[12:26:53.849] <TB1> INFO: scanning low vcal = 220
[12:26:54.302] <TB1> INFO: Expecting 41600 events.
[12:26:58.408] <TB1> INFO: 41600 events read in total (3328ms).
[12:26:58.410] <TB1> INFO: Test took 4560ms.
[12:26:58.418] <TB1> INFO: scanning low vcal = 230
[12:26:58.881] <TB1> INFO: Expecting 41600 events.
[12:27:03.051] <TB1> INFO: 41600 events read in total (3391ms).
[12:27:03.058] <TB1> INFO: Test took 4640ms.
[12:27:03.069] <TB1> INFO: scanning low vcal = 240
[12:27:03.586] <TB1> INFO: Expecting 41600 events.
[12:27:07.648] <TB1> INFO: 41600 events read in total (3283ms).
[12:27:07.649] <TB1> INFO: Test took 4575ms.
[12:27:07.655] <TB1> INFO: scanning low vcal = 250
[12:27:08.122] <TB1> INFO: Expecting 41600 events.
[12:27:12.145] <TB1> INFO: 41600 events read in total (3245ms).
[12:27:12.150] <TB1> INFO: Test took 4495ms.
[12:27:12.155] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[12:27:12.629] <TB1> INFO: Expecting 41600 events.
[12:27:16.678] <TB1> INFO: 41600 events read in total (3260ms).
[12:27:16.679] <TB1> INFO: Test took 4524ms.
[12:27:16.685] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[12:27:17.113] <TB1> INFO: Expecting 41600 events.
[12:27:21.158] <TB1> INFO: 41600 events read in total (3266ms).
[12:27:21.159] <TB1> INFO: Test took 4474ms.
[12:27:21.167] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[12:27:21.635] <TB1> INFO: Expecting 41600 events.
[12:27:25.692] <TB1> INFO: 41600 events read in total (3279ms).
[12:27:25.694] <TB1> INFO: Test took 4526ms.
[12:27:25.700] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[12:27:26.156] <TB1> INFO: Expecting 41600 events.
[12:27:30.320] <TB1> INFO: 41600 events read in total (3385ms).
[12:27:30.322] <TB1> INFO: Test took 4622ms.
[12:27:30.329] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:27:30.771] <TB1> INFO: Expecting 41600 events.
[12:27:34.765] <TB1> INFO: 41600 events read in total (3216ms).
[12:27:34.768] <TB1> INFO: Test took 4439ms.
[12:27:35.581] <TB1> INFO: PixTestGainPedestal::measure() done
[12:28:34.446] <TB1> INFO: PixTestGainPedestal::fit() done
[12:28:34.447] <TB1> INFO: non-linearity mean: 0.969 0.977 0.957 0.960 0.954 0.968 0.959 0.952 0.959 0.956 0.961 0.951 0.959 0.959 0.956 0.954
[12:28:34.447] <TB1> INFO: non-linearity RMS: 0.004 0.008 0.006 0.005 0.005 0.004 0.007 0.007 0.006 0.006 0.005 0.006 0.005 0.005 0.007 0.006
[12:28:34.447] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:28:34.473] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:28:34.507] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:28:34.542] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:28:34.577] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:28:34.610] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:28:34.645] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:28:34.680] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:28:34.713] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:28:34.749] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:28:34.787] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:28:34.834] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:28:34.871] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:28:34.914] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:28:34.960] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:28:34.000] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:28:35.041] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 199 seconds
[12:28:35.041] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:35.041] <TB1> INFO: Decoding statistics:
[12:28:35.041] <TB1> INFO: General information:
[12:28:35.041] <TB1> INFO: 16bit words read: 2325748
[12:28:35.041] <TB1> INFO: valid events total: 83200
[12:28:35.041] <TB1> INFO: empty events: 0
[12:28:35.041] <TB1> INFO: valid events with pixels: 83200
[12:28:35.041] <TB1> INFO: valid pixel hits: 663674
[12:28:35.042] <TB1> INFO: Event errors: 0
[12:28:35.042] <TB1> INFO: start marker: 0
[12:28:35.042] <TB1> INFO: stop marker: 0
[12:28:35.042] <TB1> INFO: overflow: 0
[12:28:35.042] <TB1> INFO: invalid 5bit words: 0
[12:28:35.042] <TB1> INFO: invalid XOR eye diagram: 0
[12:28:35.042] <TB1> INFO: TBM errors: 0
[12:28:35.042] <TB1> INFO: flawed TBM headers: 0
[12:28:35.042] <TB1> INFO: flawed TBM trailers: 0
[12:28:35.042] <TB1> INFO: event ID mismatches: 0
[12:28:35.042] <TB1> INFO: ROC errors: 0
[12:28:35.042] <TB1> INFO: missing ROC header(s): 0
[12:28:35.042] <TB1> INFO: misplaced readback start: 0
[12:28:35.042] <TB1> INFO: Pixel decoding errors: 0
[12:28:35.042] <TB1> INFO: pixel data incomplete: 0
[12:28:35.042] <TB1> INFO: pixel address: 0
[12:28:35.042] <TB1> INFO: pulse height fill bit: 0
[12:28:35.042] <TB1> INFO: buffer corruption: 0
[12:28:35.056] <TB1> INFO: readReadbackCal: /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C15.dat
[12:28:35.366] <TB1> INFO: ######################################################################
[12:28:35.366] <TB1> INFO: PixTestTrim::doTest()
[12:28:35.366] <TB1> INFO: ######################################################################
[12:28:35.367] <TB1> INFO: PixTestReadback::RES sent once
[12:28:48.192] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C0.dat
[12:28:48.192] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C1.dat
[12:28:48.192] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C2.dat
[12:28:48.192] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C3.dat
[12:28:48.192] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C4.dat
[12:28:48.192] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C5.dat
[12:28:48.192] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C6.dat
[12:28:48.193] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C7.dat
[12:28:48.193] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C8.dat
[12:28:48.193] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C9.dat
[12:28:48.194] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C10.dat
[12:28:48.194] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C11.dat
[12:28:48.194] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C12.dat
[12:28:48.194] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C13.dat
[12:28:48.194] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C14.dat
[12:28:48.195] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C15.dat
[12:28:48.240] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:28:48.240] <TB1> INFO: PixTestReadback::RES sent once
[12:29:00.842] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C0.dat
[12:29:00.842] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C1.dat
[12:29:00.843] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C2.dat
[12:29:00.843] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C3.dat
[12:29:00.843] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C4.dat
[12:29:00.843] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C5.dat
[12:29:00.843] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C6.dat
[12:29:00.843] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C7.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C8.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C9.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C10.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C11.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C12.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C13.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C14.dat
[12:29:00.844] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C15.dat
[12:29:00.904] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:29:00.904] <TB1> INFO: PixTestReadback::RES sent once
[12:29:10.606] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:29:10.606] <TB1> INFO: Vbg will be calibrated using Vd calibration
[12:29:10.606] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 147calibrated Vbg = 1.20296 :::*/*/*/*/
[12:29:10.606] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.3calibrated Vbg = 1.20414 :::*/*/*/*/
[12:29:10.606] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 161.9calibrated Vbg = 1.2077 :::*/*/*/*/
[12:29:10.606] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 148.2calibrated Vbg = 1.21311 :::*/*/*/*/
[12:29:10.606] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.8calibrated Vbg = 1.21949 :::*/*/*/*/
[12:29:10.606] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156calibrated Vbg = 1.21975 :::*/*/*/*/
[12:29:10.606] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.2calibrated Vbg = 1.21118 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.8calibrated Vbg = 1.21307 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 146.8calibrated Vbg = 1.2166 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 151.6calibrated Vbg = 1.22508 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 162.4calibrated Vbg = 1.22405 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 151.9calibrated Vbg = 1.22433 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.7calibrated Vbg = 1.20738 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.6calibrated Vbg = 1.20492 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 160.4calibrated Vbg = 1.20913 :::*/*/*/*/
[12:29:10.607] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 149.8calibrated Vbg = 1.20212 :::*/*/*/*/
[12:29:10.610] <TB1> INFO: PixTestReadback::RES sent once
[12:32:20.697] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C0.dat
[12:32:20.697] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C1.dat
[12:32:20.697] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C2.dat
[12:32:20.698] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C3.dat
[12:32:20.698] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C4.dat
[12:32:20.698] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C5.dat
[12:32:20.698] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C6.dat
[12:32:20.698] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C7.dat
[12:32:20.698] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C8.dat
[12:32:20.698] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C9.dat
[12:32:20.699] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C10.dat
[12:32:20.699] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C11.dat
[12:32:20.699] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C12.dat
[12:32:20.699] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C13.dat
[12:32:20.700] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C14.dat
[12:32:20.700] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3518_FullQualification_2015-10-30_10h46m_1446198407//000_Fulltest_m20//readbackCal_C15.dat
[12:32:20.730] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:32:20.732] <TB1> INFO: PixTestReadback::doTest() done
[12:32:20.732] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:20.732] <TB1> INFO: Decoding statistics:
[12:32:20.732] <TB1> INFO: General information:
[12:32:20.732] <TB1> INFO: 16bit words read: 768
[12:32:20.733] <TB1> INFO: valid events total: 64
[12:32:20.733] <TB1> INFO: empty events: 64
[12:32:20.733] <TB1> INFO: valid events with pixels: 0
[12:32:20.733] <TB1> INFO: valid pixel hits: 0
[12:32:20.733] <TB1> INFO: Event errors: 0
[12:32:20.733] <TB1> INFO: start marker: 0
[12:32:20.733] <TB1> INFO: stop marker: 0
[12:32:20.733] <TB1> INFO: overflow: 0
[12:32:20.733] <TB1> INFO: invalid 5bit words: 0
[12:32:20.733] <TB1> INFO: invalid XOR eye diagram: 0
[12:32:20.733] <TB1> INFO: TBM errors: 0
[12:32:20.733] <TB1> INFO: flawed TBM headers: 0
[12:32:20.733] <TB1> INFO: flawed TBM trailers: 0
[12:32:20.733] <TB1> INFO: event ID mismatches: 0
[12:32:20.733] <TB1> INFO: ROC errors: 0
[12:32:20.733] <TB1> INFO: missing ROC header(s): 0
[12:32:20.733] <TB1> INFO: misplaced readback start: 0
[12:32:20.733] <TB1> INFO: Pixel decoding errors: 0
[12:32:20.733] <TB1> INFO: pixel data incomplete: 0
[12:32:20.733] <TB1> INFO: pixel address: 0
[12:32:20.733] <TB1> INFO: pulse height fill bit: 0
[12:32:20.733] <TB1> INFO: buffer corruption: 0
[12:32:20.810] <TB1> INFO: Decoding statistics:
[12:32:20.810] <TB1> INFO: General information:
[12:32:20.810] <TB1> INFO: 16bit words read: 9398840
[12:32:20.810] <TB1> INFO: valid events total: 551744
[12:32:20.810] <TB1> INFO: empty events: 305331
[12:32:20.810] <TB1> INFO: valid events with pixels: 246413
[12:32:20.810] <TB1> INFO: valid pixel hits: 1388956
[12:32:20.810] <TB1> INFO: Event errors: 0
[12:32:20.810] <TB1> INFO: start marker: 0
[12:32:20.810] <TB1> INFO: stop marker: 0
[12:32:20.810] <TB1> INFO: overflow: 0
[12:32:20.810] <TB1> INFO: invalid 5bit words: 0
[12:32:20.810] <TB1> INFO: invalid XOR eye diagram: 0
[12:32:20.810] <TB1> INFO: TBM errors: 0
[12:32:20.810] <TB1> INFO: flawed TBM headers: 0
[12:32:20.810] <TB1> INFO: flawed TBM trailers: 0
[12:32:20.810] <TB1> INFO: event ID mismatches: 0
[12:32:20.811] <TB1> INFO: ROC errors: 0
[12:32:20.811] <TB1> INFO: missing ROC header(s): 0
[12:32:20.811] <TB1> INFO: misplaced readback start: 0
[12:32:20.811] <TB1> INFO: Pixel decoding errors: 0
[12:32:20.811] <TB1> INFO: pixel data incomplete: 0
[12:32:20.811] <TB1> INFO: pixel address: 0
[12:32:20.811] <TB1> INFO: pulse height fill bit: 0
[12:32:20.811] <TB1> INFO: buffer corruption: 0
[12:32:20.825] <TB1> INFO: enter test to run
[12:32:20.830] <TB1> INFO: test: no parameter change
[12:32:21.338] <TB1> QUIET: Connection to board 129 closed.
[12:32:21.343] <TB1> INFO: pXar: this is the end, my friend