[11:42:51.219] <TB0> INFO: *** Welcome to pxar ***
[11:42:51.219] <TB0> INFO: *** Today: 2015/11/03
[11:42:51.758] <TB0> INFO: *** Version: 9da6
[11:42:51.758] <TB0> INFO: readRocDacs: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C15.dat
[11:42:51.759] <TB0> INFO: readTbmDacs: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:42:51.759] <TB0> INFO: readMaskFile: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//defaultMaskFile.dat
[11:42:51.759] <TB0> INFO: readTrimFile: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters_C15.dat
[11:42:51.822] <TB0> INFO: clk: 4
[11:42:51.822] <TB0> INFO: ctr: 4
[11:42:51.822] <TB0> INFO: sda: 19
[11:42:51.822] <TB0> INFO: tin: 9
[11:42:51.822] <TB0> INFO: level: 15
[11:42:51.822] <TB0> INFO: triggerdelay: 0
[11:42:51.822] <TB0> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[11:42:51.822] <TB0> INFO: Log level: INFO
[11:42:51.830] <TB0> INFO: Found DTB DTB_WS6AYH
[11:42:51.842] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[11:42:51.845] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
------------------------------------------------------
[11:42:51.848] <TB0> INFO: RPC call hashes of host and DTB match: 398089610
[11:42:53.384] <TB0> INFO: DUT info:
[11:42:53.384] <TB0> INFO: The DUT currently contains the following objects:
[11:42:53.384] <TB0> INFO: 2 TBM Cores tbm08c (2 ON)
[11:42:53.384] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:42:53.384] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:42:53.384] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:42:53.384] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.384] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:42:53.785] <TB0> INFO: enter 'restricted' command line mode
[11:42:53.785] <TB0> INFO: enter test to run
[11:42:53.785] <TB0> INFO: test: pretest no parameter change
[11:42:53.785] <TB0> INFO: running: pretest
[11:42:53.789] <TB0> INFO: ######################################################################
[11:42:53.789] <TB0> INFO: PixTestPretest::doTest()
[11:42:53.789] <TB0> INFO: ######################################################################
[11:42:53.791] <TB0> INFO: ----------------------------------------------------------------------
[11:42:53.791] <TB0> INFO: PixTestPretest::programROC()
[11:42:53.791] <TB0> INFO: ----------------------------------------------------------------------
[11:43:11.807] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:43:11.807] <TB0> INFO: IA differences per ROC: 18.5 18.5 17.7 19.3 16.9 17.7 16.9 20.1 19.3 17.7 18.5 19.3 17.7 20.1 19.3 19.3
[11:43:11.888] <TB0> INFO: ----------------------------------------------------------------------
[11:43:11.888] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:43:11.888] <TB0> INFO: ----------------------------------------------------------------------
[11:43:33.164] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 391.5 mA = 24.4688 mA/ROC
[11:43:33.164] <TB0> INFO: i(loss) [mA/ROC]: 20.1 19.3 19.3 19.3 19.3 19.3 19.3 20.1 20.1 18.5 19.3 20.1 18.5 20.1 18.5 20.1
[11:43:33.199] <TB0> INFO: ----------------------------------------------------------------------
[11:43:33.199] <TB0> INFO: PixTestPretest::findTiming()
[11:43:33.199] <TB0> INFO: ----------------------------------------------------------------------
[11:43:33.199] <TB0> INFO: PixTestCmd::init()
[11:43:33.794] <TB0> WARNING: Not unmasking DUT, not setting Calibrate bits!
[11:45:05.985] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[11:45:05.985] <TB0> INFO: (success/tries = 100/100), width = 5
[11:45:05.987] <TB0> INFO: ----------------------------------------------------------------------
[11:45:05.987] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:45:05.987] <TB0> INFO: ----------------------------------------------------------------------
[11:45:06.124] <TB0> INFO: Expecting 231680 events.
[11:45:10.736] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (1) != Token Chain Length (8)
[11:45:10.739] <TB0> ERROR: <datapipe.cc/CheckEventID:L461> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[11:45:13.804] <TB0> INFO: 231680 events read in total (6964ms).
[11:45:13.808] <TB0> INFO: Test took 7818ms.
[11:45:14.216] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:45:14.246] <TB0> INFO: ----------------------------------------------------------------------
[11:45:14.246] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:45:14.246] <TB0> INFO: ----------------------------------------------------------------------
[11:45:14.381] <TB0> INFO: Expecting 231680 events.
[11:45:22.910] <TB0> INFO: 231680 events read in total (7814ms).
[11:45:22.915] <TB0> INFO: Test took 8665ms.
[11:45:23.313] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:45:23.313] <TB0> INFO: CalDel: 148 153 130 143 129 135 162 155 145 159 135 153 143 147 139 166
[11:45:23.313] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C0.dat
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C1.dat
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C2.dat
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C3.dat
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C4.dat
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C5.dat
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C6.dat
[11:45:23.316] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C7.dat
[11:45:23.317] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C8.dat
[11:45:23.317] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C9.dat
[11:45:23.317] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C10.dat
[11:45:23.317] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C11.dat
[11:45:23.317] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C12.dat
[11:45:23.317] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C13.dat
[11:45:23.318] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C14.dat
[11:45:23.318] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C15.dat
[11:45:23.318] <TB0> INFO: write tbm parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0a.dat
[11:45:23.318] <TB0> INFO: write tbm parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:45:23.318] <TB0> INFO: PixTestPretest::doTest() done, duration: 149 seconds
[11:45:23.414] <TB0> INFO: enter test to run
[11:45:23.414] <TB0> INFO: test: fulltest no parameter change
[11:45:23.414] <TB0> INFO: running: fulltest
[11:45:23.414] <TB0> INFO: ######################################################################
[11:45:23.414] <TB0> INFO: PixTestFullTest::doTest()
[11:45:23.414] <TB0> INFO: ######################################################################
[11:45:23.416] <TB0> INFO: ######################################################################
[11:45:23.416] <TB0> INFO: PixTestAlive::doTest()
[11:45:23.416] <TB0> INFO: ######################################################################
[11:45:23.417] <TB0> INFO: ----------------------------------------------------------------------
[11:45:23.417] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:23.417] <TB0> INFO: ----------------------------------------------------------------------
[11:45:23.731] <TB0> INFO: Expecting 41600 events.
[11:45:28.136] <TB0> INFO: 41600 events read in total (3690ms).
[11:45:28.136] <TB0> INFO: Test took 4718ms.
[11:45:28.142] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:28.526] <TB0> INFO: PixTestAlive::aliveTest() done
[11:45:28.526] <TB0> INFO: number of dead pixels (per ROC): 2 15 54 1 0 20 31 1 0 1 1 0 0 13 13 14
[11:45:28.528] <TB0> INFO: ----------------------------------------------------------------------
[11:45:28.528] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:28.528] <TB0> INFO: ----------------------------------------------------------------------
[11:45:28.843] <TB0> INFO: Expecting 41600 events.
[11:45:31.885] <TB0> INFO: 41600 events read in total (2327ms).
[11:45:31.885] <TB0> INFO: Test took 3355ms.
[11:45:31.885] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:31.886] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:45:32.289] <TB0> INFO: PixTestAlive::maskTest() done
[11:45:32.289] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:45:32.291] <TB0> INFO: ----------------------------------------------------------------------
[11:45:32.291] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:32.291] <TB0> INFO: ----------------------------------------------------------------------
[11:45:32.616] <TB0> INFO: Expecting 41600 events.
[11:45:37.188] <TB0> INFO: 41600 events read in total (3857ms).
[11:45:37.189] <TB0> INFO: Test took 4897ms.
[11:45:37.195] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:37.577] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:45:37.577] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:45:37.577] <TB0> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[11:45:37.577] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:37.577] <TB0> INFO: Decoding statistics:
[11:45:37.577] <TB0> INFO: General information:
[11:45:37.577] <TB0> INFO: 16bit words read: 0
[11:45:37.577] <TB0> INFO: valid events total: 0
[11:45:37.577] <TB0> INFO: empty events: 0
[11:45:37.577] <TB0> INFO: valid events with pixels: 0
[11:45:37.577] <TB0> INFO: valid pixel hits: 0
[11:45:37.577] <TB0> INFO: Event errors: 0
[11:45:37.577] <TB0> INFO: start marker: 0
[11:45:37.577] <TB0> INFO: stop marker: 0
[11:45:37.577] <TB0> INFO: overflow: 0
[11:45:37.577] <TB0> INFO: invalid 5bit words: 0
[11:45:37.577] <TB0> INFO: invalid XOR eye diagram: 0
[11:45:37.577] <TB0> INFO: TBM errors: 0
[11:45:37.577] <TB0> INFO: flawed TBM headers: 0
[11:45:37.577] <TB0> INFO: flawed TBM trailers: 0
[11:45:37.577] <TB0> INFO: event ID mismatches: 0
[11:45:37.577] <TB0> INFO: ROC errors: 0
[11:45:37.577] <TB0> INFO: missing ROC header(s): 0
[11:45:37.577] <TB0> INFO: misplaced readback start: 0
[11:45:37.577] <TB0> INFO: Pixel decoding errors: 0
[11:45:37.577] <TB0> INFO: pixel data incomplete: 0
[11:45:37.577] <TB0> INFO: pixel address: 0
[11:45:37.577] <TB0> INFO: pulse height fill bit: 0
[11:45:37.577] <TB0> INFO: buffer corruption: 0
[11:45:37.589] <TB0> INFO: ######################################################################
[11:45:37.589] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:45:37.589] <TB0> INFO: ######################################################################
[11:45:37.591] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:45:37.602] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:45:37.602] <TB0> INFO: run 1 of 1
[11:45:37.909] <TB0> INFO: Expecting 3120000 events.
[11:46:31.350] <TB0> INFO: 1215670 events read in total (52726ms).
[11:47:23.981] <TB0> INFO: 2418990 events read in total (105357ms).
[11:47:53.546] <TB0> INFO: 3120000 events read in total (134923ms).
[11:47:53.592] <TB0> INFO: Test took 135990ms.
[11:47:53.669] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:18.985] <TB0> INFO: PixTestBBMap::doTest() done, duration: 161 seconds
[11:48:18.985] <TB0> INFO: number of dead bumps (per ROC): 0 1 1 0 0 0 2 0 0 0 1 0 0 2 5 0
[11:48:18.985] <TB0> INFO: separation cut (per ROC): 123 116 139 111 137 132 130 131 133 126 113 138 140 131 134 144
[11:48:18.985] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:18.985] <TB0> INFO: Decoding statistics:
[11:48:18.985] <TB0> INFO: General information:
[11:48:18.985] <TB0> INFO: 16bit words read: 0
[11:48:18.985] <TB0> INFO: valid events total: 0
[11:48:18.985] <TB0> INFO: empty events: 0
[11:48:18.985] <TB0> INFO: valid events with pixels: 0
[11:48:18.985] <TB0> INFO: valid pixel hits: 0
[11:48:18.985] <TB0> INFO: Event errors: 0
[11:48:18.985] <TB0> INFO: start marker: 0
[11:48:18.985] <TB0> INFO: stop marker: 0
[11:48:18.985] <TB0> INFO: overflow: 0
[11:48:18.985] <TB0> INFO: invalid 5bit words: 0
[11:48:18.985] <TB0> INFO: invalid XOR eye diagram: 0
[11:48:18.985] <TB0> INFO: TBM errors: 0
[11:48:18.985] <TB0> INFO: flawed TBM headers: 0
[11:48:18.985] <TB0> INFO: flawed TBM trailers: 0
[11:48:18.985] <TB0> INFO: event ID mismatches: 0
[11:48:18.985] <TB0> INFO: ROC errors: 0
[11:48:18.985] <TB0> INFO: missing ROC header(s): 0
[11:48:18.985] <TB0> INFO: misplaced readback start: 0
[11:48:18.985] <TB0> INFO: Pixel decoding errors: 0
[11:48:18.985] <TB0> INFO: pixel data incomplete: 0
[11:48:18.985] <TB0> INFO: pixel address: 0
[11:48:18.985] <TB0> INFO: pulse height fill bit: 0
[11:48:18.985] <TB0> INFO: buffer corruption: 0
[11:48:19.024] <TB0> INFO: ######################################################################
[11:48:19.024] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:48:19.024] <TB0> INFO: ######################################################################
[11:48:19.024] <TB0> INFO: ----------------------------------------------------------------------
[11:48:19.024] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:48:19.024] <TB0> INFO: ----------------------------------------------------------------------
[11:48:19.024] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:48:19.033] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[11:48:19.033] <TB0> INFO: run 1 of 1
[11:48:19.335] <TB0> INFO: Expecting 26208000 events.
[11:48:50.930] <TB0> INFO: 1152800 events read in total (30880ms).
[11:49:25.091] <TB0> INFO: 2283300 events read in total (65041ms).
[11:49:59.284] <TB0> INFO: 3407900 events read in total (99234ms).
[11:50:33.726] <TB0> INFO: 4534750 events read in total (133676ms).
[11:51:08.314] <TB0> INFO: 5656000 events read in total (168264ms).
[11:51:43.057] <TB0> INFO: 6777750 events read in total (203007ms).
[11:52:17.592] <TB0> INFO: 7894850 events read in total (237542ms).
[11:52:52.238] <TB0> INFO: 9013750 events read in total (272188ms).
[11:53:25.900] <TB0> INFO: 10130150 events read in total (305850ms).
[11:53:59.849] <TB0> INFO: 11245650 events read in total (339799ms).
[11:54:32.879] <TB0> INFO: 12358350 events read in total (372829ms).
[11:55:05.051] <TB0> INFO: 13462600 events read in total (405001ms).
[11:55:38.292] <TB0> INFO: 14558600 events read in total (438242ms).
[11:56:12.208] <TB0> INFO: 15654950 events read in total (472158ms).
[11:56:46.402] <TB0> INFO: 16744750 events read in total (506352ms).
[11:57:20.516] <TB0> INFO: 17834850 events read in total (540466ms).
[11:57:55.182] <TB0> INFO: 18925450 events read in total (575132ms).
[11:58:29.576] <TB0> INFO: 20013800 events read in total (609526ms).
[11:59:03.871] <TB0> INFO: 21102700 events read in total (643821ms).
[11:59:38.146] <TB0> INFO: 22192550 events read in total (678096ms).
[12:00:10.327] <TB0> INFO: 23283700 events read in total (710277ms).
[12:00:41.916] <TB0> INFO: 24374650 events read in total (741866ms).
[12:01:13.751] <TB0> INFO: 25469500 events read in total (773701ms).
[12:01:33.053] <TB0> INFO: 26208000 events read in total (793003ms).
[12:01:33.092] <TB0> INFO: Test took 794059ms.
[12:01:33.171] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:33.360] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:35.145] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:36.921] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:38.588] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:40.198] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:41.758] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:43.402] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:44.943] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:46.528] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:48.112] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:49.799] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:51.387] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:52.891] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:54.508] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:56.050] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:57.590] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:01:59.189] <TB0> INFO: PixTestScurves::scurves() done
[12:01:59.189] <TB0> INFO: Vcal mean: 92.96 85.52 97.69 84.75 104.30 92.21 92.81 92.99 100.53 102.17 82.13 96.57 107.47 91.41 83.98 104.21
[12:01:59.189] <TB0> INFO: Vcal RMS: 5.59 7.29 12.63 4.98 6.12 8.92 10.08 5.94 5.58 6.33 5.26 5.37 6.00 7.92 6.99 8.30
[12:01:59.189] <TB0> INFO: PixTestScurves::fullTest() done, duration: 820 seconds
[12:01:59.189] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:59.189] <TB0> INFO: Decoding statistics:
[12:01:59.189] <TB0> INFO: General information:
[12:01:59.189] <TB0> INFO: 16bit words read: 0
[12:01:59.189] <TB0> INFO: valid events total: 0
[12:01:59.189] <TB0> INFO: empty events: 0
[12:01:59.189] <TB0> INFO: valid events with pixels: 0
[12:01:59.189] <TB0> INFO: valid pixel hits: 0
[12:01:59.189] <TB0> INFO: Event errors: 0
[12:01:59.189] <TB0> INFO: start marker: 0
[12:01:59.190] <TB0> INFO: stop marker: 0
[12:01:59.190] <TB0> INFO: overflow: 0
[12:01:59.190] <TB0> INFO: invalid 5bit words: 0
[12:01:59.190] <TB0> INFO: invalid XOR eye diagram: 0
[12:01:59.190] <TB0> INFO: TBM errors: 0
[12:01:59.190] <TB0> INFO: flawed TBM headers: 0
[12:01:59.190] <TB0> INFO: flawed TBM trailers: 0
[12:01:59.190] <TB0> INFO: event ID mismatches: 0
[12:01:59.190] <TB0> INFO: ROC errors: 0
[12:01:59.190] <TB0> INFO: missing ROC header(s): 0
[12:01:59.190] <TB0> INFO: misplaced readback start: 0
[12:01:59.190] <TB0> INFO: Pixel decoding errors: 0
[12:01:59.190] <TB0> INFO: pixel data incomplete: 0
[12:01:59.190] <TB0> INFO: pixel address: 0
[12:01:59.190] <TB0> INFO: pulse height fill bit: 0
[12:01:59.190] <TB0> INFO: buffer corruption: 0
[12:01:59.262] <TB0> INFO: ######################################################################
[12:01:59.262] <TB0> INFO: PixTestTrim::doTest()
[12:01:59.262] <TB0> INFO: ######################################################################
[12:01:59.264] <TB0> INFO: ----------------------------------------------------------------------
[12:01:59.264] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:01:59.264] <TB0> INFO: ----------------------------------------------------------------------
[12:01:59.353] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:01:59.353] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:01:59.363] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:01:59.363] <TB0> INFO: run 1 of 1
[12:01:59.700] <TB0> INFO: Expecting 6281600 events.
[12:02:44.854] <TB0> INFO: 1403450 events read in total (44439ms).
[12:03:28.961] <TB0> INFO: 2793350 events read in total (88546ms).
[12:04:09.056] <TB0> INFO: 4180960 events read in total (128642ms).
[12:04:52.513] <TB0> INFO: 5575150 events read in total (172098ms).
[12:05:13.789] <TB0> INFO: 6281600 events read in total (193374ms).
[12:05:13.824] <TB0> INFO: Test took 194462ms.
[12:05:13.881] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:35.865] <TB0> INFO: ROC 0 VthrComp = 98
[12:05:35.865] <TB0> INFO: ROC 1 VthrComp = 90
[12:05:35.869] <TB0> INFO: ROC 2 VthrComp = 96
[12:05:35.869] <TB0> INFO: ROC 3 VthrComp = 90
[12:05:35.870] <TB0> INFO: ROC 4 VthrComp = 102
[12:05:35.870] <TB0> INFO: ROC 5 VthrComp = 93
[12:05:35.871] <TB0> INFO: ROC 6 VthrComp = 96
[12:05:35.871] <TB0> INFO: ROC 7 VthrComp = 101
[12:05:35.871] <TB0> INFO: ROC 8 VthrComp = 104
[12:05:35.871] <TB0> INFO: ROC 9 VthrComp = 100
[12:05:35.872] <TB0> INFO: ROC 10 VthrComp = 85
[12:05:35.872] <TB0> INFO: ROC 11 VthrComp = 104
[12:05:35.872] <TB0> INFO: ROC 12 VthrComp = 104
[12:05:35.872] <TB0> INFO: ROC 13 VthrComp = 96
[12:05:35.872] <TB0> INFO: ROC 14 VthrComp = 94
[12:05:35.872] <TB0> INFO: ROC 15 VthrComp = 107
[12:05:35.872] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:05:35.872] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:05:35.882] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:05:35.882] <TB0> INFO: run 1 of 1
[12:05:36.203] <TB0> INFO: Expecting 6281600 events.
[12:06:14.879] <TB0> INFO: 898260 events read in total (37961ms).
[12:06:53.279] <TB0> INFO: 1791520 events read in total (76361ms).
[12:07:31.232] <TB0> INFO: 2684440 events read in total (114314ms).
[12:08:09.217] <TB0> INFO: 3572010 events read in total (152299ms).
[12:08:42.930] <TB0> INFO: 4451300 events read in total (186013ms).
[12:09:23.243] <TB0> INFO: 5328400 events read in total (226325ms).
[12:09:56.542] <TB0> INFO: 6205810 events read in total (259625ms).
[12:10:00.571] <TB0> INFO: 6281600 events read in total (263653ms).
[12:10:00.660] <TB0> INFO: Test took 264779ms.
[12:10:00.813] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:25.653] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 58.3419 for pixel 46/73 mean/min/max = 45.2375/32.031/58.4439
[12:10:25.653] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 59.6409 for pixel 29/76 mean/min/max = 46.0668/32.4899/59.6437
[12:10:25.654] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 62.474 for pixel 35/71 mean/min/max = 48.6162/34.6106/62.6218
[12:10:25.654] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 57.8922 for pixel 51/79 mean/min/max = 45.3678/32.6698/58.0659
[12:10:25.654] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 64.1147 for pixel 3/1 mean/min/max = 48.1989/32.1893/64.2085
[12:10:25.655] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 62.7861 for pixel 27/78 mean/min/max = 47.8576/32.3496/63.3656
[12:10:25.655] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 61.9912 for pixel 4/57 mean/min/max = 47.155/32.1699/62.1401
[12:10:25.655] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 58.2701 for pixel 0/76 mean/min/max = 44.8469/31.144/58.5498
[12:10:25.655] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.0055 for pixel 1/68 mean/min/max = 46.654/33.2986/60.0093
[12:10:25.656] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 62.661 for pixel 0/68 mean/min/max = 46.8801/31.0283/62.732
[12:10:25.656] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.4765 for pixel 4/2 mean/min/max = 46.263/31.9049/60.6211
[12:10:25.656] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.2255 for pixel 23/16 mean/min/max = 46.0259/33.6778/58.3739
[12:10:25.657] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 67.3031 for pixel 3/45 mean/min/max = 50.4841/33.4626/67.5056
[12:10:25.657] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 61.1013 for pixel 8/76 mean/min/max = 46.9176/32.5961/61.2392
[12:10:25.657] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 57.9997 for pixel 13/6 mean/min/max = 45.2835/32.2855/58.2815
[12:10:25.657] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 62 for pixel 51/0 mean/min/max = 48.0477/34.0886/62.0069
[12:10:25.658] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:10:25.789] <TB0> INFO: Expecting 514560 events.
[12:10:35.542] <TB0> INFO: 514560 events read in total (9038ms).
[12:10:35.547] <TB0> INFO: Expecting 514560 events.
[12:10:45.392] <TB0> INFO: 514560 events read in total (9184ms).
[12:10:45.399] <TB0> INFO: Expecting 514560 events.
[12:10:55.291] <TB0> INFO: 514560 events read in total (9232ms).
[12:10:55.301] <TB0> INFO: Expecting 514560 events.
[12:11:05.042] <TB0> INFO: 514560 events read in total (9081ms).
[12:11:05.053] <TB0> INFO: Expecting 514560 events.
[12:11:14.795] <TB0> INFO: 514560 events read in total (9077ms).
[12:11:14.808] <TB0> INFO: Expecting 514560 events.
[12:11:24.682] <TB0> INFO: 514560 events read in total (9212ms).
[12:11:24.697] <TB0> INFO: Expecting 514560 events.
[12:11:34.212] <TB0> INFO: 514560 events read in total (8859ms).
[12:11:34.230] <TB0> INFO: Expecting 514560 events.
[12:11:44.284] <TB0> INFO: 514560 events read in total (9399ms).
[12:11:44.306] <TB0> INFO: Expecting 514560 events.
[12:11:53.988] <TB0> INFO: 514560 events read in total (9037ms).
[12:11:54.010] <TB0> INFO: Expecting 514560 events.
[12:12:03.761] <TB0> INFO: 514560 events read in total (9102ms).
[12:12:03.785] <TB0> INFO: Expecting 514560 events.
[12:12:13.261] <TB0> INFO: 514560 events read in total (8825ms).
[12:12:13.292] <TB0> INFO: Expecting 514560 events.
[12:12:23.180] <TB0> INFO: 514560 events read in total (9254ms).
[12:12:23.211] <TB0> INFO: Expecting 514560 events.
[12:12:32.544] <TB0> INFO: 514560 events read in total (8702ms).
[12:12:32.575] <TB0> INFO: Expecting 514560 events.
[12:12:42.362] <TB0> INFO: 514560 events read in total (9146ms).
[12:12:42.395] <TB0> INFO: Expecting 514560 events.
[12:12:52.885] <TB0> INFO: 514560 events read in total (9862ms).
[12:12:52.929] <TB0> INFO: Expecting 514560 events.
[12:13:03.676] <TB0> INFO: 514560 events read in total (10122ms).
[12:13:03.714] <TB0> INFO: Test took 158056ms.
[12:13:04.891] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:13:04.900] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:13:04.900] <TB0> INFO: run 1 of 1
[12:13:05.203] <TB0> INFO: Expecting 6281600 events.
[12:13:44.259] <TB0> INFO: 877860 events read in total (38341ms).
[12:14:22.608] <TB0> INFO: 1750520 events read in total (76690ms).
[12:15:00.527] <TB0> INFO: 2622180 events read in total (114610ms).
[12:15:36.721] <TB0> INFO: 3488420 events read in total (150803ms).
[12:16:12.169] <TB0> INFO: 4345620 events read in total (186251ms).
[12:16:50.769] <TB0> INFO: 5199800 events read in total (224851ms).
[12:17:22.761] <TB0> INFO: 6053400 events read in total (256843ms).
[12:17:32.187] <TB0> INFO: 6281600 events read in total (266269ms).
[12:17:32.263] <TB0> INFO: Test took 267363ms.
[12:17:32.429] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:59.853] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.028403 .. 255.000000
[12:17:59.950] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[12:17:59.959] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:17:59.959] <TB0> INFO: run 1 of 1
[12:18:00.289] <TB0> INFO: Expecting 10649600 events.
[12:18:37.947] <TB0> INFO: 827880 events read in total (36932ms).
[12:19:14.431] <TB0> INFO: 1655180 events read in total (73416ms).
[12:19:52.487] <TB0> INFO: 2482490 events read in total (111472ms).
[12:20:30.267] <TB0> INFO: 3309660 events read in total (149252ms).
[12:21:08.280] <TB0> INFO: 4136370 events read in total (187265ms).
[12:21:45.886] <TB0> INFO: 4963320 events read in total (224871ms).
[12:22:23.265] <TB0> INFO: 5790320 events read in total (262250ms).
[12:23:02.126] <TB0> INFO: 6617040 events read in total (301111ms).
[12:23:36.911] <TB0> INFO: 7442840 events read in total (335896ms).
[12:24:14.726] <TB0> INFO: 8268350 events read in total (373711ms).
[12:24:51.737] <TB0> INFO: 9093540 events read in total (410722ms).
[12:25:27.468] <TB0> INFO: 9919870 events read in total (446453ms).
[12:25:54.635] <TB0> INFO: 10649600 events read in total (473620ms).
[12:25:54.764] <TB0> INFO: Test took 474805ms.
[12:25:55.055] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:23.432] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 1.006974 .. 160.510842
[12:26:23.513] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 1 .. 170 (-1/-1) hits flags = 528 (plus default)
[12:26:23.521] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:26:23.521] <TB0> INFO: run 1 of 1
[12:26:23.824] <TB0> INFO: Expecting 7072000 events.
[12:27:01.657] <TB0> INFO: 861780 events read in total (37118ms).
[12:27:39.372] <TB0> INFO: 1722980 events read in total (74833ms).
[12:28:13.131] <TB0> INFO: 2583440 events read in total (108592ms).
[12:28:49.357] <TB0> INFO: 3443740 events read in total (144818ms).
[12:29:26.739] <TB0> INFO: 4304070 events read in total (182200ms).
[12:30:00.375] <TB0> INFO: 5164350 events read in total (215836ms).
[12:30:36.522] <TB0> INFO: 6024550 events read in total (251983ms).
[12:31:10.667] <TB0> INFO: 6886450 events read in total (286128ms).
[12:31:19.720] <TB0> INFO: 7072000 events read in total (295182ms).
[12:31:19.773] <TB0> INFO: Test took 296252ms.
[12:31:19.940] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:46.175] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 0.881946 .. 97.181909
[12:31:46.255] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 0 .. 107 (-1/-1) hits flags = 528 (plus default)
[12:31:46.263] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:31:46.263] <TB0> INFO: run 1 of 1
[12:31:46.565] <TB0> INFO: Expecting 4492800 events.
[12:32:25.135] <TB0> INFO: 939250 events read in total (37855ms).
[12:33:03.551] <TB0> INFO: 1877500 events read in total (76271ms).
[12:33:40.614] <TB0> INFO: 2815650 events read in total (113334ms).
[12:34:19.758] <TB0> INFO: 3753830 events read in total (152478ms).
[12:34:50.211] <TB0> INFO: 4492800 events read in total (182931ms).
[12:34:50.254] <TB0> INFO: Test took 183992ms.
[12:34:50.345] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:10.070] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 1.785336 .. 64.810493
[12:35:10.171] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 1 .. 74 (-1/-1) hits flags = 528 (plus default)
[12:35:10.180] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:35:10.180] <TB0> INFO: run 1 of 1
[12:35:10.511] <TB0> INFO: Expecting 3078400 events.
[12:35:50.668] <TB0> INFO: 1042970 events read in total (39442ms).
[12:36:33.244] <TB0> INFO: 2084640 events read in total (82018ms).
[12:37:14.056] <TB0> INFO: 3078400 events read in total (122830ms).
[12:37:14.092] <TB0> INFO: Test took 123913ms.
[12:37:14.151] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:31.204] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:37:31.204] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:37:31.212] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:37:31.212] <TB0> INFO: run 1 of 1
[12:37:31.519] <TB0> INFO: Expecting 1705600 events.
[12:38:10.002] <TB0> INFO: 1076180 events read in total (37768ms).
[12:38:34.735] <TB0> INFO: 1705600 events read in total (62501ms).
[12:38:34.754] <TB0> INFO: Test took 63543ms.
[12:38:34.788] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:48.720] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:38:48.720] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:38:48.720] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:38:48.720] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:38:48.720] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:38:48.720] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:38:48.721] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:38:48.722] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:38:48.728] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:38:48.735] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:38:48.742] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:38:48.748] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:38:48.755] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:38:48.762] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:38:48.768] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:38:48.776] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:38:48.782] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:38:48.789] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:38:48.796] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:38:48.802] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:38:48.809] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:38:48.816] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:38:48.822] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:38:48.829] <TB0> INFO: PixTestTrim::trimTest() done
[12:38:48.829] <TB0> INFO: vtrim: 99 113 114 87 117 109 113 100 95 121 108 123 127 132 104 133
[12:38:48.829] <TB0> INFO: vthrcomp: 98 90 96 90 102 93 96 101 104 100 85 104 104 96 94 107
[12:38:48.829] <TB0> INFO: vcal mean: 34.97 34.86 34.49 34.98 35.01 34.83 34.72 34.96 35.02 35.00 35.02 34.98 34.98 34.87 34.84 34.87
[12:38:48.829] <TB0> INFO: vcal RMS: 1.13 2.28 4.03 1.02 0.94 2.52 3.03 0.93 0.86 1.17 1.01 0.80 0.94 2.22 2.12 2.19
[12:38:48.829] <TB0> INFO: bits mean: 9.58 9.61 8.71 8.59 9.13 8.63 9.35 9.40 9.15 9.38 9.14 9.31 8.41 9.26 9.61 8.48
[12:38:48.829] <TB0> INFO: bits RMS: 2.70 2.57 2.49 3.02 2.72 2.95 2.62 2.85 2.63 2.78 2.86 2.55 2.62 2.61 2.68 2.70
[12:38:48.837] <TB0> INFO: ----------------------------------------------------------------------
[12:38:48.837] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:38:48.837] <TB0> INFO: ----------------------------------------------------------------------
[12:38:48.839] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:38:48.848] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:38:48.848] <TB0> INFO: run 1 of 1
[12:38:49.155] <TB0> INFO: Expecting 8320000 events.
[12:39:26.476] <TB0> INFO: 1177650 events read in total (36606ms).
[12:40:08.763] <TB0> INFO: 2341710 events read in total (78893ms).
[12:40:48.311] <TB0> INFO: 3501360 events read in total (118441ms).
[12:41:31.021] <TB0> INFO: 4651970 events read in total (161151ms).
[12:42:13.294] <TB0> INFO: 5794670 events read in total (203424ms).
[12:42:51.828] <TB0> INFO: 6936300 events read in total (241958ms).
[12:43:33.611] <TB0> INFO: 8081950 events read in total (283741ms).
[12:43:42.547] <TB0> INFO: 8320000 events read in total (292677ms).
[12:43:42.593] <TB0> INFO: Test took 293745ms.
[12:43:42.697] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:08.152] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[12:44:08.161] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:44:08.161] <TB0> INFO: run 1 of 1
[12:44:08.464] <TB0> INFO: Expecting 8153600 events.
[12:44:47.528] <TB0> INFO: 1138760 events read in total (38349ms).
[12:45:22.791] <TB0> INFO: 2266780 events read in total (73612ms).
[12:46:01.684] <TB0> INFO: 3390240 events read in total (112506ms).
[12:46:42.326] <TB0> INFO: 4506210 events read in total (153147ms).
[12:47:20.283] <TB0> INFO: 5614500 events read in total (191104ms).
[12:48:02.497] <TB0> INFO: 6721700 events read in total (233318ms).
[12:48:44.286] <TB0> INFO: 7831810 events read in total (275107ms).
[12:48:55.882] <TB0> INFO: 8153600 events read in total (286703ms).
[12:48:55.941] <TB0> INFO: Test took 287780ms.
[12:48:56.056] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:22.063] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[12:49:22.072] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:49:22.072] <TB0> INFO: run 1 of 1
[12:49:22.375] <TB0> INFO: Expecting 7612800 events.
[12:50:02.173] <TB0> INFO: 1178970 events read in total (39083ms).
[12:50:38.838] <TB0> INFO: 2345860 events read in total (75748ms).
[12:51:20.962] <TB0> INFO: 3507490 events read in total (117872ms).
[12:52:03.437] <TB0> INFO: 4656670 events read in total (160347ms).
[12:52:46.672] <TB0> INFO: 5800720 events read in total (203582ms).
[12:53:29.659] <TB0> INFO: 6946070 events read in total (246569ms).
[12:53:55.398] <TB0> INFO: 7612800 events read in total (272308ms).
[12:53:55.441] <TB0> INFO: Test took 273369ms.
[12:53:55.548] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:24.758] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 180 (-1/-1) hits flags = 528 (plus default)
[12:54:24.767] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:54:24.767] <TB0> INFO: run 1 of 1
[12:54:25.101] <TB0> INFO: Expecting 7529600 events.
[12:55:02.076] <TB0> INFO: 1185200 events read in total (36259ms).
[12:55:46.206] <TB0> INFO: 2357870 events read in total (80389ms).
[12:56:24.977] <TB0> INFO: 3525200 events read in total (119160ms).
[12:57:07.640] <TB0> INFO: 4678940 events read in total (161823ms).
[12:57:48.505] <TB0> INFO: 5829050 events read in total (202688ms).
[12:58:29.885] <TB0> INFO: 6979440 events read in total (244068ms).
[12:58:50.868] <TB0> INFO: 7529600 events read in total (265051ms).
[12:58:50.901] <TB0> INFO: Test took 266133ms.
[12:58:50.989] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:15.884] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 163 (-1/-1) hits flags = 528 (plus default)
[12:59:15.892] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[12:59:15.892] <TB0> INFO: run 1 of 1
[12:59:16.194] <TB0> INFO: Expecting 6822400 events.
[13:00:01.655] <TB0> INFO: 1254570 events read in total (44746ms).
[13:00:47.054] <TB0> INFO: 2495400 events read in total (90145ms).
[13:01:32.040] <TB0> INFO: 3724720 events read in total (135131ms).
[13:02:12.825] <TB0> INFO: 4939390 events read in total (175916ms).
[13:02:59.244] <TB0> INFO: 6153170 events read in total (222335ms).
[13:03:25.096] <TB0> INFO: 6822400 events read in total (248187ms).
[13:03:25.130] <TB0> INFO: Test took 249239ms.
[13:03:25.209] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:49.572] <TB0> INFO: PixTestTrim::trimBitTest() done
[13:03:49.574] <TB0> INFO: PixTestTrim::doTest() done, duration: 3710 seconds
[13:03:49.574] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:49.574] <TB0> INFO: Decoding statistics:
[13:03:49.574] <TB0> INFO: General information:
[13:03:49.574] <TB0> INFO: 16bit words read: 0
[13:03:49.574] <TB0> INFO: valid events total: 0
[13:03:49.574] <TB0> INFO: empty events: 0
[13:03:49.574] <TB0> INFO: valid events with pixels: 0
[13:03:49.574] <TB0> INFO: valid pixel hits: 0
[13:03:49.574] <TB0> INFO: Event errors: 0
[13:03:49.574] <TB0> INFO: start marker: 0
[13:03:49.574] <TB0> INFO: stop marker: 0
[13:03:49.574] <TB0> INFO: overflow: 0
[13:03:49.574] <TB0> INFO: invalid 5bit words: 0
[13:03:49.574] <TB0> INFO: invalid XOR eye diagram: 0
[13:03:49.574] <TB0> INFO: TBM errors: 0
[13:03:49.574] <TB0> INFO: flawed TBM headers: 0
[13:03:49.574] <TB0> INFO: flawed TBM trailers: 0
[13:03:49.574] <TB0> INFO: event ID mismatches: 0
[13:03:49.574] <TB0> INFO: ROC errors: 0
[13:03:49.574] <TB0> INFO: missing ROC header(s): 0
[13:03:49.574] <TB0> INFO: misplaced readback start: 0
[13:03:49.574] <TB0> INFO: Pixel decoding errors: 0
[13:03:49.574] <TB0> INFO: pixel data incomplete: 0
[13:03:49.574] <TB0> INFO: pixel address: 0
[13:03:49.574] <TB0> INFO: pulse height fill bit: 0
[13:03:49.574] <TB0> INFO: buffer corruption: 0
[13:03:50.411] <TB0> INFO: ######################################################################
[13:03:50.411] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:03:50.411] <TB0> INFO: ######################################################################
[13:03:50.735] <TB0> INFO: Expecting 41600 events.
[13:03:55.286] <TB0> INFO: 41600 events read in total (3836ms).
[13:03:55.287] <TB0> INFO: Test took 4874ms.
[13:03:55.294] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:55.965] <TB0> INFO: Expecting 41600 events.
[13:04:00.512] <TB0> INFO: 41600 events read in total (3832ms).
[13:04:00.513] <TB0> INFO: Test took 4872ms.
[13:04:00.520] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:00.959] <TB0> INFO: Expecting 41600 events.
[13:04:05.787] <TB0> INFO: 41600 events read in total (4113ms).
[13:04:05.788] <TB0> INFO: Test took 5152ms.
[13:04:05.795] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:06.228] <TB0> INFO: Expecting 2560 events.
[13:04:07.189] <TB0> INFO: 2560 events read in total (247ms).
[13:04:07.190] <TB0> INFO: Test took 1388ms.
[13:04:07.697] <TB0> INFO: Expecting 2560 events.
[13:04:08.658] <TB0> INFO: 2560 events read in total (246ms).
[13:04:08.658] <TB0> INFO: Test took 1468ms.
[13:04:09.166] <TB0> INFO: Expecting 2560 events.
[13:04:10.129] <TB0> INFO: 2560 events read in total (249ms).
[13:04:10.129] <TB0> INFO: Test took 1471ms.
[13:04:10.636] <TB0> INFO: Expecting 2560 events.
[13:04:11.600] <TB0> INFO: 2560 events read in total (249ms).
[13:04:11.600] <TB0> INFO: Test took 1470ms.
[13:04:12.108] <TB0> INFO: Expecting 2560 events.
[13:04:13.085] <TB0> INFO: 2560 events read in total (262ms).
[13:04:13.085] <TB0> INFO: Test took 1485ms.
[13:04:13.592] <TB0> INFO: Expecting 2560 events.
[13:04:14.581] <TB0> INFO: 2560 events read in total (274ms).
[13:04:14.581] <TB0> INFO: Test took 1496ms.
[13:04:15.089] <TB0> INFO: Expecting 2560 events.
[13:04:16.046] <TB0> INFO: 2560 events read in total (242ms).
[13:04:16.047] <TB0> INFO: Test took 1465ms.
[13:04:16.554] <TB0> INFO: Expecting 2560 events.
[13:04:17.548] <TB0> INFO: 2560 events read in total (278ms).
[13:04:17.548] <TB0> INFO: Test took 1501ms.
[13:04:18.055] <TB0> INFO: Expecting 2560 events.
[13:04:19.033] <TB0> INFO: 2560 events read in total (263ms).
[13:04:19.033] <TB0> INFO: Test took 1485ms.
[13:04:19.541] <TB0> INFO: Expecting 2560 events.
[13:04:20.504] <TB0> INFO: 2560 events read in total (248ms).
[13:04:20.504] <TB0> INFO: Test took 1471ms.
[13:04:21.013] <TB0> INFO: Expecting 2560 events.
[13:04:21.976] <TB0> INFO: 2560 events read in total (248ms).
[13:04:21.978] <TB0> INFO: Test took 1473ms.
[13:04:22.484] <TB0> INFO: Expecting 2560 events.
[13:04:23.448] <TB0> INFO: 2560 events read in total (249ms).
[13:04:23.448] <TB0> INFO: Test took 1469ms.
[13:04:23.956] <TB0> INFO: Expecting 2560 events.
[13:04:24.933] <TB0> INFO: 2560 events read in total (262ms).
[13:04:24.933] <TB0> INFO: Test took 1484ms.
[13:04:25.440] <TB0> INFO: Expecting 2560 events.
[13:04:26.401] <TB0> INFO: 2560 events read in total (246ms).
[13:04:26.401] <TB0> INFO: Test took 1468ms.
[13:04:26.909] <TB0> INFO: Expecting 2560 events.
[13:04:27.897] <TB0> INFO: 2560 events read in total (273ms).
[13:04:27.897] <TB0> INFO: Test took 1460ms.
[13:04:28.405] <TB0> INFO: Expecting 2560 events.
[13:04:29.366] <TB0> INFO: 2560 events read in total (246ms).
[13:04:29.367] <TB0> INFO: Test took 1469ms.
[13:04:29.369] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:04:29.877] <TB0> INFO: Expecting 655360 events.
[13:04:43.039] <TB0> INFO: 655360 events read in total (12447ms).
[13:04:43.048] <TB0> INFO: Expecting 655360 events.
[13:04:56.088] <TB0> INFO: 655360 events read in total (12446ms).
[13:04:56.103] <TB0> INFO: Expecting 655360 events.
[13:05:09.245] <TB0> INFO: 655360 events read in total (12551ms).
[13:05:09.260] <TB0> INFO: Expecting 655360 events.
[13:05:22.373] <TB0> INFO: 655360 events read in total (12513ms).
[13:05:22.391] <TB0> INFO: Expecting 655360 events.
[13:05:34.134] <TB0> INFO: 655360 events read in total (11148ms).
[13:05:34.156] <TB0> INFO: Expecting 655360 events.
[13:05:45.887] <TB0> INFO: 655360 events read in total (11162ms).
[13:05:45.913] <TB0> INFO: Expecting 655360 events.
[13:05:57.715] <TB0> INFO: 655360 events read in total (11210ms).
[13:05:57.743] <TB0> INFO: Expecting 655360 events.
[13:06:10.889] <TB0> INFO: 655360 events read in total (12557ms).
[13:06:10.921] <TB0> INFO: Expecting 655360 events.
[13:06:24.172] <TB0> INFO: 655360 events read in total (12669ms).
[13:06:24.208] <TB0> INFO: Expecting 655360 events.
[13:06:37.273] <TB0> INFO: 655360 events read in total (12490ms).
[13:06:37.315] <TB0> INFO: Expecting 655360 events.
[13:06:50.299] <TB0> INFO: 655360 events read in total (12414ms).
[13:06:50.345] <TB0> INFO: Expecting 655360 events.
[13:07:03.643] <TB0> INFO: 655360 events read in total (12743ms).
[13:07:03.689] <TB0> INFO: Expecting 655360 events.
[13:07:16.842] <TB0> INFO: 655360 events read in total (12591ms).
[13:07:16.891] <TB0> INFO: Expecting 655360 events.
[13:07:30.078] <TB0> INFO: 655360 events read in total (12621ms).
[13:07:30.133] <TB0> INFO: Expecting 655360 events.
[13:07:43.247] <TB0> INFO: 655360 events read in total (12582ms).
[13:07:43.302] <TB0> INFO: Expecting 655360 events.
[13:07:56.448] <TB0> INFO: 655360 events read in total (12595ms).
[13:07:56.510] <TB0> INFO: Test took 207141ms.
[13:07:56.590] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:56.894] <TB0> INFO: Expecting 655360 events.
[13:08:10.136] <TB0> INFO: 655360 events read in total (12527ms).
[13:08:10.145] <TB0> INFO: Expecting 655360 events.
[13:08:23.622] <TB0> INFO: 655360 events read in total (12871ms).
[13:08:23.634] <TB0> INFO: Expecting 655360 events.
[13:08:37.016] <TB0> INFO: 655360 events read in total (12783ms).
[13:08:37.036] <TB0> INFO: Expecting 655360 events.
[13:08:49.975] <TB0> INFO: 655360 events read in total (12362ms).
[13:08:49.993] <TB0> INFO: Expecting 655360 events.
[13:09:03.064] <TB0> INFO: 655360 events read in total (12481ms).
[13:09:03.086] <TB0> INFO: Expecting 655360 events.
[13:09:16.612] <TB0> INFO: 655360 events read in total (12943ms).
[13:09:16.639] <TB0> INFO: Expecting 655360 events.
[13:09:29.669] <TB0> INFO: 655360 events read in total (12448ms).
[13:09:29.697] <TB0> INFO: Expecting 655360 events.
[13:09:42.806] <TB0> INFO: 655360 events read in total (12525ms).
[13:09:42.840] <TB0> INFO: Expecting 655360 events.
[13:09:55.651] <TB0> INFO: 655360 events read in total (12224ms).
[13:09:55.687] <TB0> INFO: Expecting 655360 events.
[13:10:08.376] <TB0> INFO: 655360 events read in total (12107ms).
[13:10:08.413] <TB0> INFO: Expecting 655360 events.
[13:10:21.077] <TB0> INFO: 655360 events read in total (12088ms).
[13:10:21.119] <TB0> INFO: Expecting 655360 events.
[13:10:33.740] <TB0> INFO: 655360 events read in total (12041ms).
[13:10:33.789] <TB0> INFO: Expecting 655360 events.
[13:10:46.217] <TB0> INFO: 655360 events read in total (11881ms).
[13:10:46.265] <TB0> INFO: Expecting 655360 events.
[13:10:58.709] <TB0> INFO: 655360 events read in total (11878ms).
[13:10:58.765] <TB0> INFO: Expecting 655360 events.
[13:11:11.720] <TB0> INFO: 655360 events read in total (12393ms).
[13:11:11.776] <TB0> INFO: Expecting 655360 events.
[13:11:24.363] <TB0> INFO: 655360 events read in total (12033ms).
[13:11:24.430] <TB0> INFO: Test took 207840ms.
[13:11:24.624] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.632] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.640] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.646] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.653] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.660] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.667] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:11:24.673] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:11:24.680] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:11:24.688] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[13:11:24.695] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[13:11:24.702] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[13:11:24.708] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[13:11:24.715] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[13:11:24.722] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[13:11:24.729] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[13:11:24.735] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[13:11:24.742] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.749] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.756] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:11:24.762] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:11:24.769] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:11:24.775] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[13:11:24.782] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.789] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.795] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.802] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.809] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.815] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.822] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.833] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:11:24.877] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:11:24.877] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:11:24.877] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:11:24.877] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:11:24.878] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:11:24.879] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:11:25.182] <TB0> INFO: Expecting 41600 events.
[13:11:29.196] <TB0> INFO: 41600 events read in total (3298ms).
[13:11:29.197] <TB0> INFO: Test took 4315ms.
[13:11:29.834] <TB0> INFO: Expecting 41600 events.
[13:11:33.819] <TB0> INFO: 41600 events read in total (3271ms).
[13:11:33.821] <TB0> INFO: Test took 4292ms.
[13:11:34.417] <TB0> INFO: Expecting 41600 events.
[13:11:38.454] <TB0> INFO: 41600 events read in total (3322ms).
[13:11:38.455] <TB0> INFO: Test took 4342ms.
[13:11:38.749] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:38.882] <TB0> INFO: Expecting 2560 events.
[13:11:39.839] <TB0> INFO: 2560 events read in total (242ms).
[13:11:39.840] <TB0> INFO: Test took 1091ms.
[13:11:39.842] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:40.349] <TB0> INFO: Expecting 2560 events.
[13:11:41.311] <TB0> INFO: 2560 events read in total (247ms).
[13:11:41.311] <TB0> INFO: Test took 1469ms.
[13:11:41.313] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:41.820] <TB0> INFO: Expecting 2560 events.
[13:11:42.782] <TB0> INFO: 2560 events read in total (247ms).
[13:11:42.783] <TB0> INFO: Test took 1470ms.
[13:11:42.785] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:43.291] <TB0> INFO: Expecting 2560 events.
[13:11:44.252] <TB0> INFO: 2560 events read in total (246ms).
[13:11:44.252] <TB0> INFO: Test took 1467ms.
[13:11:44.254] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:44.762] <TB0> INFO: Expecting 2560 events.
[13:11:45.727] <TB0> INFO: 2560 events read in total (250ms).
[13:11:45.727] <TB0> INFO: Test took 1473ms.
[13:11:45.729] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:46.236] <TB0> INFO: Expecting 2560 events.
[13:11:47.202] <TB0> INFO: 2560 events read in total (251ms).
[13:11:47.202] <TB0> INFO: Test took 1473ms.
[13:11:47.205] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:47.711] <TB0> INFO: Expecting 2560 events.
[13:11:48.676] <TB0> INFO: 2560 events read in total (250ms).
[13:11:48.676] <TB0> INFO: Test took 1471ms.
[13:11:48.679] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:49.184] <TB0> INFO: Expecting 2560 events.
[13:11:50.145] <TB0> INFO: 2560 events read in total (246ms).
[13:11:50.145] <TB0> INFO: Test took 1466ms.
[13:11:50.147] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:50.654] <TB0> INFO: Expecting 2560 events.
[13:11:51.615] <TB0> INFO: 2560 events read in total (246ms).
[13:11:51.616] <TB0> INFO: Test took 1469ms.
[13:11:51.618] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:52.124] <TB0> INFO: Expecting 2560 events.
[13:11:53.090] <TB0> INFO: 2560 events read in total (251ms).
[13:11:53.090] <TB0> INFO: Test took 1472ms.
[13:11:53.094] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:53.598] <TB0> INFO: Expecting 2560 events.
[13:11:54.559] <TB0> INFO: 2560 events read in total (246ms).
[13:11:54.559] <TB0> INFO: Test took 1466ms.
[13:11:54.562] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:55.068] <TB0> INFO: Expecting 2560 events.
[13:11:56.027] <TB0> INFO: 2560 events read in total (244ms).
[13:11:56.028] <TB0> INFO: Test took 1466ms.
[13:11:56.030] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:56.536] <TB0> INFO: Expecting 2560 events.
[13:11:57.497] <TB0> INFO: 2560 events read in total (246ms).
[13:11:57.498] <TB0> INFO: Test took 1468ms.
[13:11:57.501] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:58.006] <TB0> INFO: Expecting 2560 events.
[13:11:58.962] <TB0> INFO: 2560 events read in total (241ms).
[13:11:58.963] <TB0> INFO: Test took 1463ms.
[13:11:58.965] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:59.471] <TB0> INFO: Expecting 2560 events.
[13:12:00.446] <TB0> INFO: 2560 events read in total (260ms).
[13:12:00.447] <TB0> INFO: Test took 1482ms.
[13:12:00.449] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:00.955] <TB0> INFO: Expecting 2560 events.
[13:12:01.916] <TB0> INFO: 2560 events read in total (246ms).
[13:12:01.916] <TB0> INFO: Test took 1467ms.
[13:12:01.917] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:02.425] <TB0> INFO: Expecting 2560 events.
[13:12:03.387] <TB0> INFO: 2560 events read in total (247ms).
[13:12:03.387] <TB0> INFO: Test took 1470ms.
[13:12:03.389] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:03.896] <TB0> INFO: Expecting 2560 events.
[13:12:04.857] <TB0> INFO: 2560 events read in total (246ms).
[13:12:04.857] <TB0> INFO: Test took 1468ms.
[13:12:04.860] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:05.366] <TB0> INFO: Expecting 2560 events.
[13:12:06.327] <TB0> INFO: 2560 events read in total (246ms).
[13:12:06.327] <TB0> INFO: Test took 1468ms.
[13:12:06.330] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:06.836] <TB0> INFO: Expecting 2560 events.
[13:12:07.811] <TB0> INFO: 2560 events read in total (260ms).
[13:12:07.812] <TB0> INFO: Test took 1482ms.
[13:12:07.814] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:08.320] <TB0> INFO: Expecting 2560 events.
[13:12:09.281] <TB0> INFO: 2560 events read in total (246ms).
[13:12:09.281] <TB0> INFO: Test took 1467ms.
[13:12:09.284] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:09.790] <TB0> INFO: Expecting 2560 events.
[13:12:10.751] <TB0> INFO: 2560 events read in total (246ms).
[13:12:10.751] <TB0> INFO: Test took 1468ms.
[13:12:10.754] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:11.261] <TB0> INFO: Expecting 2560 events.
[13:12:12.222] <TB0> INFO: 2560 events read in total (246ms).
[13:12:12.223] <TB0> INFO: Test took 1470ms.
[13:12:12.225] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:12.731] <TB0> INFO: Expecting 2560 events.
[13:12:13.692] <TB0> INFO: 2560 events read in total (246ms).
[13:12:13.693] <TB0> INFO: Test took 1468ms.
[13:12:13.695] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:14.201] <TB0> INFO: Expecting 2560 events.
[13:12:15.162] <TB0> INFO: 2560 events read in total (246ms).
[13:12:15.163] <TB0> INFO: Test took 1468ms.
[13:12:15.165] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:15.671] <TB0> INFO: Expecting 2560 events.
[13:12:16.647] <TB0> INFO: 2560 events read in total (261ms).
[13:12:16.647] <TB0> INFO: Test took 1482ms.
[13:12:16.659] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:17.156] <TB0> INFO: Expecting 2560 events.
[13:12:18.112] <TB0> INFO: 2560 events read in total (241ms).
[13:12:18.112] <TB0> INFO: Test took 1453ms.
[13:12:18.114] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:18.621] <TB0> INFO: Expecting 2560 events.
[13:12:19.582] <TB0> INFO: 2560 events read in total (246ms).
[13:12:19.583] <TB0> INFO: Test took 1469ms.
[13:12:19.585] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:20.092] <TB0> INFO: Expecting 2560 events.
[13:12:21.053] <TB0> INFO: 2560 events read in total (246ms).
[13:12:21.053] <TB0> INFO: Test took 1468ms.
[13:12:21.055] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:21.562] <TB0> INFO: Expecting 2560 events.
[13:12:22.537] <TB0> INFO: 2560 events read in total (260ms).
[13:12:22.537] <TB0> INFO: Test took 1482ms.
[13:12:22.539] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:23.045] <TB0> INFO: Expecting 2560 events.
[13:12:24.006] <TB0> INFO: 2560 events read in total (246ms).
[13:12:24.007] <TB0> INFO: Test took 1468ms.
[13:12:24.010] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:24.516] <TB0> INFO: Expecting 2560 events.
[13:12:25.477] <TB0> INFO: 2560 events read in total (246ms).
[13:12:25.477] <TB0> INFO: Test took 1468ms.
[13:12:26.192] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 515 seconds
[13:12:26.192] <TB0> INFO: PH scale (per ROC): 80 74 78 78 79 80 79 80 81 74 78 87 78 84 80 77
[13:12:26.192] <TB0> INFO: PH offset (per ROC): 159 167 172 144 162 176 163 165 157 158 160 154 165 158 162 166
[13:12:26.199] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:26.199] <TB0> INFO: Decoding statistics:
[13:12:26.199] <TB0> INFO: General information:
[13:12:26.199] <TB0> INFO: 16bit words read: 66446
[13:12:26.199] <TB0> INFO: valid events total: 5120
[13:12:26.199] <TB0> INFO: empty events: 2617
[13:12:26.199] <TB0> INFO: valid events with pixels: 2503
[13:12:26.199] <TB0> INFO: valid pixel hits: 2503
[13:12:26.199] <TB0> INFO: Event errors: 0
[13:12:26.199] <TB0> INFO: start marker: 0
[13:12:26.199] <TB0> INFO: stop marker: 0
[13:12:26.199] <TB0> INFO: overflow: 0
[13:12:26.199] <TB0> INFO: invalid 5bit words: 0
[13:12:26.199] <TB0> INFO: invalid XOR eye diagram: 0
[13:12:26.199] <TB0> INFO: TBM errors: 0
[13:12:26.199] <TB0> INFO: flawed TBM headers: 0
[13:12:26.199] <TB0> INFO: flawed TBM trailers: 0
[13:12:26.199] <TB0> INFO: event ID mismatches: 0
[13:12:26.199] <TB0> INFO: ROC errors: 0
[13:12:26.200] <TB0> INFO: missing ROC header(s): 0
[13:12:26.200] <TB0> INFO: misplaced readback start: 0
[13:12:26.200] <TB0> INFO: Pixel decoding errors: 0
[13:12:26.200] <TB0> INFO: pixel data incomplete: 0
[13:12:26.200] <TB0> INFO: pixel address: 0
[13:12:26.200] <TB0> INFO: pulse height fill bit: 0
[13:12:26.200] <TB0> INFO: buffer corruption: 0
[13:12:26.368] <TB0> INFO: ######################################################################
[13:12:26.368] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:12:26.368] <TB0> INFO: ######################################################################
[13:12:26.378] <TB0> INFO: scanning low vcal = 10
[13:12:26.682] <TB0> INFO: Expecting 41600 events.
[13:12:30.439] <TB0> INFO: 41600 events read in total (3042ms).
[13:12:30.439] <TB0> INFO: Test took 4061ms.
[13:12:30.441] <TB0> INFO: scanning low vcal = 20
[13:12:30.947] <TB0> INFO: Expecting 41600 events.
[13:12:34.743] <TB0> INFO: 41600 events read in total (3081ms).
[13:12:34.743] <TB0> INFO: Test took 4302ms.
[13:12:34.745] <TB0> INFO: scanning low vcal = 30
[13:12:35.251] <TB0> INFO: Expecting 41600 events.
[13:12:39.052] <TB0> INFO: 41600 events read in total (3086ms).
[13:12:39.053] <TB0> INFO: Test took 4308ms.
[13:12:39.055] <TB0> INFO: scanning low vcal = 40
[13:12:39.552] <TB0> INFO: Expecting 41600 events.
[13:12:43.896] <TB0> INFO: 41600 events read in total (3629ms).
[13:12:43.896] <TB0> INFO: Test took 4841ms.
[13:12:43.899] <TB0> INFO: scanning low vcal = 50
[13:12:44.346] <TB0> INFO: Expecting 41600 events.
[13:12:48.789] <TB0> INFO: 41600 events read in total (3728ms).
[13:12:48.790] <TB0> INFO: Test took 4891ms.
[13:12:48.793] <TB0> INFO: scanning low vcal = 60
[13:12:49.213] <TB0> INFO: Expecting 41600 events.
[13:12:53.639] <TB0> INFO: 41600 events read in total (3711ms).
[13:12:53.640] <TB0> INFO: Test took 4847ms.
[13:12:53.642] <TB0> INFO: scanning low vcal = 70
[13:12:54.093] <TB0> INFO: Expecting 41600 events.
[13:12:58.546] <TB0> INFO: 41600 events read in total (3738ms).
[13:12:58.546] <TB0> INFO: Test took 4903ms.
[13:12:58.549] <TB0> INFO: scanning low vcal = 80
[13:12:58.978] <TB0> INFO: Expecting 41600 events.
[13:13:03.343] <TB0> INFO: 41600 events read in total (3650ms).
[13:13:03.343] <TB0> INFO: Test took 4794ms.
[13:13:03.346] <TB0> INFO: scanning low vcal = 90
[13:13:03.767] <TB0> INFO: Expecting 41600 events.
[13:13:08.139] <TB0> INFO: 41600 events read in total (3657ms).
[13:13:08.139] <TB0> INFO: Test took 4793ms.
[13:13:08.143] <TB0> INFO: scanning low vcal = 100
[13:13:08.573] <TB0> INFO: Expecting 41600 events.
[13:13:12.908] <TB0> INFO: 41600 events read in total (3620ms).
[13:13:12.908] <TB0> INFO: Test took 4765ms.
[13:13:12.911] <TB0> INFO: scanning low vcal = 110
[13:13:13.345] <TB0> INFO: Expecting 41600 events.
[13:13:17.554] <TB0> INFO: 41600 events read in total (3494ms).
[13:13:17.554] <TB0> INFO: Test took 4643ms.
[13:13:17.557] <TB0> INFO: scanning low vcal = 120
[13:13:18.008] <TB0> INFO: Expecting 41600 events.
[13:13:22.239] <TB0> INFO: 41600 events read in total (3516ms).
[13:13:22.239] <TB0> INFO: Test took 4682ms.
[13:13:22.242] <TB0> INFO: scanning low vcal = 130
[13:13:22.693] <TB0> INFO: Expecting 41600 events.
[13:13:26.890] <TB0> INFO: 41600 events read in total (3482ms).
[13:13:26.890] <TB0> INFO: Test took 4648ms.
[13:13:26.893] <TB0> INFO: scanning low vcal = 140
[13:13:27.343] <TB0> INFO: Expecting 41600 events.
[13:13:31.566] <TB0> INFO: 41600 events read in total (3508ms).
[13:13:31.566] <TB0> INFO: Test took 4673ms.
[13:13:31.569] <TB0> INFO: scanning low vcal = 150
[13:13:32.007] <TB0> INFO: Expecting 41600 events.
[13:13:36.242] <TB0> INFO: 41600 events read in total (3520ms).
[13:13:36.242] <TB0> INFO: Test took 4673ms.
[13:13:36.245] <TB0> INFO: scanning low vcal = 160
[13:13:36.692] <TB0> INFO: Expecting 41600 events.
[13:13:40.881] <TB0> INFO: 41600 events read in total (3474ms).
[13:13:40.881] <TB0> INFO: Test took 4636ms.
[13:13:40.886] <TB0> INFO: scanning low vcal = 170
[13:13:41.316] <TB0> INFO: Expecting 41600 events.
[13:13:45.795] <TB0> INFO: 41600 events read in total (3706ms).
[13:13:45.796] <TB0> INFO: Test took 4910ms.
[13:13:45.801] <TB0> INFO: scanning low vcal = 180
[13:13:46.225] <TB0> INFO: Expecting 41600 events.
[13:13:50.646] <TB0> INFO: 41600 events read in total (3706ms).
[13:13:50.646] <TB0> INFO: Test took 4845ms.
[13:13:50.649] <TB0> INFO: scanning low vcal = 190
[13:13:51.099] <TB0> INFO: Expecting 41600 events.
[13:13:55.474] <TB0> INFO: 41600 events read in total (3660ms).
[13:13:55.474] <TB0> INFO: Test took 4825ms.
[13:13:55.477] <TB0> INFO: scanning low vcal = 200
[13:13:55.910] <TB0> INFO: Expecting 41600 events.
[13:14:00.264] <TB0> INFO: 41600 events read in total (3639ms).
[13:14:00.264] <TB0> INFO: Test took 4787ms.
[13:14:00.267] <TB0> INFO: scanning low vcal = 210
[13:14:00.711] <TB0> INFO: Expecting 41600 events.
[13:14:05.122] <TB0> INFO: 41600 events read in total (3696ms).
[13:14:05.122] <TB0> INFO: Test took 4855ms.
[13:14:05.126] <TB0> INFO: scanning low vcal = 220
[13:14:05.571] <TB0> INFO: Expecting 41600 events.
[13:14:10.017] <TB0> INFO: 41600 events read in total (3731ms).
[13:14:10.017] <TB0> INFO: Test took 4891ms.
[13:14:10.020] <TB0> INFO: scanning low vcal = 230
[13:14:10.459] <TB0> INFO: Expecting 41600 events.
[13:14:14.938] <TB0> INFO: 41600 events read in total (3764ms).
[13:14:14.939] <TB0> INFO: Test took 4919ms.
[13:14:14.942] <TB0> INFO: scanning low vcal = 240
[13:14:15.365] <TB0> INFO: Expecting 41600 events.
[13:14:19.687] <TB0> INFO: 41600 events read in total (3607ms).
[13:14:19.688] <TB0> INFO: Test took 4746ms.
[13:14:19.690] <TB0> INFO: scanning low vcal = 250
[13:14:20.142] <TB0> INFO: Expecting 41600 events.
[13:14:24.570] <TB0> INFO: 41600 events read in total (3713ms).
[13:14:24.570] <TB0> INFO: Test took 4880ms.
[13:14:24.574] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[13:14:25.013] <TB0> INFO: Expecting 41600 events.
[13:14:29.332] <TB0> INFO: 41600 events read in total (3604ms).
[13:14:29.332] <TB0> INFO: Test took 4758ms.
[13:14:29.335] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[13:14:29.781] <TB0> INFO: Expecting 41600 events.
[13:14:34.267] <TB0> INFO: 41600 events read in total (3771ms).
[13:14:34.268] <TB0> INFO: Test took 4933ms.
[13:14:34.272] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[13:14:34.704] <TB0> INFO: Expecting 41600 events.
[13:14:39.017] <TB0> INFO: 41600 events read in total (3598ms).
[13:14:39.018] <TB0> INFO: Test took 4746ms.
[13:14:39.021] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[13:14:39.469] <TB0> INFO: Expecting 41600 events.
[13:14:43.780] <TB0> INFO: 41600 events read in total (3596ms).
[13:14:43.781] <TB0> INFO: Test took 4760ms.
[13:14:43.784] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:14:44.234] <TB0> INFO: Expecting 41600 events.
[13:14:48.558] <TB0> INFO: 41600 events read in total (3609ms).
[13:14:48.558] <TB0> INFO: Test took 4774ms.
[13:14:48.988] <TB0> INFO: PixTestGainPedestal::measure() done
[13:15:20.878] <TB0> INFO: PixTestGainPedestal::fit() done
[13:15:20.878] <TB0> INFO: non-linearity mean: 0.964 0.954 0.962 0.958 0.954 0.966 0.960 0.954 0.959 0.956 0.955 0.959 0.959 0.955 0.950 0.953
[13:15:20.878] <TB0> INFO: non-linearity RMS: 0.005 0.006 0.007 0.005 0.006 0.004 0.006 0.005 0.005 0.006 0.005 0.006 0.006 0.009 0.006 0.006
[13:15:20.878] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:15:20.896] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:15:20.915] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:15:20.932] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:15:20.950] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:15:20.968] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:15:20.986] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:15:21.004] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:15:21.023] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:15:21.041] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:15:21.059] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:15:21.078] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:15:21.096] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:15:21.114] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:15:21.132] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:15:21.151] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:15:21.169] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 174 seconds
[13:15:21.169] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:21.169] <TB0> INFO: Decoding statistics:
[13:15:21.169] <TB0> INFO: General information:
[13:15:21.169] <TB0> INFO: 16bit words read: 2328058
[13:15:21.169] <TB0> INFO: valid events total: 83200
[13:15:21.169] <TB0> INFO: empty events: 0
[13:15:21.169] <TB0> INFO: valid events with pixels: 83200
[13:15:21.169] <TB0> INFO: valid pixel hits: 664829
[13:15:21.169] <TB0> INFO: Event errors: 0
[13:15:21.169] <TB0> INFO: start marker: 0
[13:15:21.169] <TB0> INFO: stop marker: 0
[13:15:21.169] <TB0> INFO: overflow: 0
[13:15:21.169] <TB0> INFO: invalid 5bit words: 0
[13:15:21.169] <TB0> INFO: invalid XOR eye diagram: 0
[13:15:21.169] <TB0> INFO: TBM errors: 0
[13:15:21.169] <TB0> INFO: flawed TBM headers: 0
[13:15:21.169] <TB0> INFO: flawed TBM trailers: 0
[13:15:21.169] <TB0> INFO: event ID mismatches: 0
[13:15:21.169] <TB0> INFO: ROC errors: 0
[13:15:21.169] <TB0> INFO: missing ROC header(s): 0
[13:15:21.169] <TB0> INFO: misplaced readback start: 0
[13:15:21.169] <TB0> INFO: Pixel decoding errors: 0
[13:15:21.169] <TB0> INFO: pixel data incomplete: 0
[13:15:21.169] <TB0> INFO: pixel address: 0
[13:15:21.169] <TB0> INFO: pulse height fill bit: 0
[13:15:21.169] <TB0> INFO: buffer corruption: 0
[13:15:21.175] <TB0> INFO: readReadbackCal: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:15:21.176] <TB0> INFO: ######################################################################
[13:15:21.176] <TB0> INFO: PixTestReadback::doTest()
[13:15:21.176] <TB0> INFO: ######################################################################
[13:15:21.177] <TB0> INFO: PixTestReadback::RES sent once
[13:15:32.398] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[13:15:32.398] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[13:15:32.398] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[13:15:32.399] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[13:15:32.400] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:15:32.431] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[13:15:32.431] <TB0> INFO: PixTestReadback::RES sent once
[13:15:43.588] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[13:15:43.590] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[13:15:43.590] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[13:15:43.590] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[13:15:43.591] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[13:15:43.591] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[13:15:43.591] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[13:15:43.591] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[13:15:43.591] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[13:15:43.591] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[13:15:43.591] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[13:15:43.592] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[13:15:43.592] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[13:15:43.592] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[13:15:43.592] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[13:15:43.592] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:15:43.621] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[13:15:43.622] <TB0> INFO: PixTestReadback::RES sent once
[13:15:52.205] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[13:15:52.205] <TB0> INFO: Vbg will be calibrated using Vd calibration
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152calibrated Vbg = 1.2099 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 150.1calibrated Vbg = 1.20459 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 162calibrated Vbg = 1.21039 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149.1calibrated Vbg = 1.21685 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 155.7calibrated Vbg = 1.22464 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.1calibrated Vbg = 1.22359 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148.2calibrated Vbg = 1.22235 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153.4calibrated Vbg = 1.22291 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.8calibrated Vbg = 1.22261 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.2calibrated Vbg = 1.22036 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.5calibrated Vbg = 1.2233 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.6calibrated Vbg = 1.22684 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 152calibrated Vbg = 1.21982 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 158.1calibrated Vbg = 1.21544 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157.1calibrated Vbg = 1.21199 :::*/*/*/*/
[13:15:52.205] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150.1calibrated Vbg = 1.20134 :::*/*/*/*/
[13:15:52.209] <TB0> INFO: PixTestReadback::RES sent once
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[13:18:46.065] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[13:18:46.066] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[13:18:46.066] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[13:18:46.066] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[13:18:46.066] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[13:18:46.066] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[13:18:46.066] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:18:46.093] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[13:18:46.094] <TB0> INFO: PixTestReadback::doTest() done
[13:18:46.094] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:46.094] <TB0> INFO: Decoding statistics:
[13:18:46.094] <TB0> INFO: General information:
[13:18:46.094] <TB0> INFO: 16bit words read: 768
[13:18:46.094] <TB0> INFO: valid events total: 64
[13:18:46.094] <TB0> INFO: empty events: 64
[13:18:46.094] <TB0> INFO: valid events with pixels: 0
[13:18:46.094] <TB0> INFO: valid pixel hits: 0
[13:18:46.094] <TB0> INFO: Event errors: 0
[13:18:46.094] <TB0> INFO: start marker: 0
[13:18:46.094] <TB0> INFO: stop marker: 0
[13:18:46.094] <TB0> INFO: overflow: 0
[13:18:46.094] <TB0> INFO: invalid 5bit words: 0
[13:18:46.094] <TB0> INFO: invalid XOR eye diagram: 0
[13:18:46.094] <TB0> INFO: TBM errors: 0
[13:18:46.094] <TB0> INFO: flawed TBM headers: 0
[13:18:46.094] <TB0> INFO: flawed TBM trailers: 0
[13:18:46.094] <TB0> INFO: event ID mismatches: 0
[13:18:46.094] <TB0> INFO: ROC errors: 0
[13:18:46.094] <TB0> INFO: missing ROC header(s): 0
[13:18:46.094] <TB0> INFO: misplaced readback start: 0
[13:18:46.094] <TB0> INFO: Pixel decoding errors: 0
[13:18:46.094] <TB0> INFO: pixel data incomplete: 0
[13:18:46.094] <TB0> INFO: pixel address: 0
[13:18:46.094] <TB0> INFO: pulse height fill bit: 0
[13:18:46.094] <TB0> INFO: buffer corruption: 0
[13:18:46.106] <TB0> INFO: Decoding statistics:
[13:18:46.106] <TB0> INFO: General information:
[13:18:46.106] <TB0> INFO: 16bit words read: 2395272
[13:18:46.106] <TB0> INFO: valid events total: 88384
[13:18:46.106] <TB0> INFO: empty events: 2681
[13:18:46.106] <TB0> INFO: valid events with pixels: 85703
[13:18:46.106] <TB0> INFO: valid pixel hits: 667332
[13:18:46.106] <TB0> INFO: Event errors: 0
[13:18:46.106] <TB0> INFO: start marker: 0
[13:18:46.106] <TB0> INFO: stop marker: 0
[13:18:46.106] <TB0> INFO: overflow: 0
[13:18:46.106] <TB0> INFO: invalid 5bit words: 0
[13:18:46.106] <TB0> INFO: invalid XOR eye diagram: 0
[13:18:46.106] <TB0> INFO: TBM errors: 0
[13:18:46.106] <TB0> INFO: flawed TBM headers: 0
[13:18:46.106] <TB0> INFO: flawed TBM trailers: 0
[13:18:46.106] <TB0> INFO: event ID mismatches: 0
[13:18:46.106] <TB0> INFO: ROC errors: 0
[13:18:46.106] <TB0> INFO: missing ROC header(s): 0
[13:18:46.106] <TB0> INFO: misplaced readback start: 0
[13:18:46.106] <TB0> INFO: Pixel decoding errors: 0
[13:18:46.106] <TB0> INFO: pixel data incomplete: 0
[13:18:46.106] <TB0> INFO: pixel address: 0
[13:18:46.106] <TB0> INFO: pulse height fill bit: 0
[13:18:46.106] <TB0> INFO: buffer corruption: 0
[13:18:46.106] <TB0> INFO: enter test to run
[13:18:46.106] <TB0> INFO: test: exit no parameter change
[13:18:46.312] <TB0> QUIET: Connection to board 73 closed.
[13:18:46.392] <TB0> INFO: pXar: this is the end, my friend