[12:52:40.469] <TB0> INFO: *** Welcome to pxar ***
[12:52:40.469] <TB0> INFO: *** Today: 2015/07/08
[12:52:40.469] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C15.dat
[12:52:40.469] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:52:40.469] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//defaultMaskFile.dat
[12:52:40.469] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters_C15.dat
[12:52:40.536] <TB0> INFO: clk: 4
[12:52:40.536] <TB0> INFO: ctr: 4
[12:52:40.536] <TB0> INFO: sda: 19
[12:52:40.536] <TB0> INFO: tin: 9
[12:52:40.536] <TB0> INFO: level: 15
[12:52:40.536] <TB0> INFO: triggerdelay: 0
[12:52:40.536] <TB0> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[12:52:40.536] <TB0> INFO: Log level: INFO
[12:52:40.546] <TB0> INFO: Found DTB DTB_WWVASW
[12:52:40.565] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[12:52:40.568] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[12:52:40.570] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[12:52:42.110] <TB0> INFO: DUT info:
[12:52:42.110] <TB0> INFO: The DUT currently contains the following objects:
[12:52:42.110] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:52:42.110] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:52:42.110] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:52:42.110] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:52:42.110] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.110] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:42.511] <TB0> INFO: enter 'restricted' command line mode
[12:52:42.511] <TB0> INFO: enter test to run
[12:52:42.511] <TB0> INFO: test: pretest no parameter change
[12:52:42.512] <TB0> INFO: running: pretest
[12:52:42.516] <TB0> INFO: ######################################################################
[12:52:42.516] <TB0> INFO: PixTestPretest::doTest()
[12:52:42.516] <TB0> INFO: ######################################################################
[12:52:42.518] <TB0> INFO: ----------------------------------------------------------------------
[12:52:42.518] <TB0> INFO: PixTestPretest::programROC()
[12:52:42.518] <TB0> INFO: ----------------------------------------------------------------------
[12:53:00.536] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:53:00.536] <TB0> INFO: IA differences per ROC: 20.1 17.7 21.7 18.5 20.9 22.5 16.1 20.1 20.1 18.5 20.1 19.3 17.7 19.3 20.1 22.5
[12:53:00.756] <TB0> INFO: ----------------------------------------------------------------------
[12:53:00.756] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:53:00.756] <TB0> INFO: ----------------------------------------------------------------------
[12:53:05.634] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[12:53:05.637] <TB0> INFO: ----------------------------------------------------------------------
[12:53:05.637] <TB0> INFO: PixTestPretest::findWorkingPixel()
[12:53:05.637] <TB0> INFO: ----------------------------------------------------------------------
[12:53:13.829] <TB0> INFO: Test took 8186ms.
[12:53:14.133] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:53:14.171] <TB0> INFO: ----------------------------------------------------------------------
[12:53:14.171] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[12:53:14.171] <TB0> INFO: ----------------------------------------------------------------------
[12:53:22.330] <TB0> INFO: Test took 8152ms.
[12:53:22.641] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[12:53:22.641] <TB0> INFO: CalDel: 126 140 137 129 126 135 126 144 144 130 134 131 128 131 122 129
[12:53:22.641] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:53:22.645] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C0.dat
[12:53:22.645] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C1.dat
[12:53:22.645] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C2.dat
[12:53:22.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C3.dat
[12:53:22.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C4.dat
[12:53:22.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C5.dat
[12:53:22.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C6.dat
[12:53:22.647] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C7.dat
[12:53:22.647] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C8.dat
[12:53:22.648] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C9.dat
[12:53:22.648] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C10.dat
[12:53:22.648] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C11.dat
[12:53:22.649] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C12.dat
[12:53:22.649] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C13.dat
[12:53:22.649] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C14.dat
[12:53:22.650] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C15.dat
[12:53:22.650] <TB0> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[12:53:22.769] <TB0> INFO: enter test to run
[12:53:22.769] <TB0> INFO: test: fulltest no parameter change
[12:53:22.769] <TB0> INFO: running: fulltest
[12:53:22.769] <TB0> INFO: ######################################################################
[12:53:22.769] <TB0> INFO: PixTestFullTest::doTest()
[12:53:22.769] <TB0> INFO: ######################################################################
[12:53:22.771] <TB0> INFO: ######################################################################
[12:53:22.771] <TB0> INFO: PixTestAlive::doTest()
[12:53:22.771] <TB0> INFO: ######################################################################
[12:53:22.772] <TB0> INFO: ----------------------------------------------------------------------
[12:53:22.772] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:53:22.772] <TB0> INFO: ----------------------------------------------------------------------
[12:53:26.187] <TB0> INFO: Test took 3413ms.
[12:53:26.212] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:26.442] <TB0> INFO: PixTestAlive::aliveTest() done
[12:53:26.442] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0
[12:53:26.444] <TB0> INFO: ----------------------------------------------------------------------
[12:53:26.444] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:53:26.444] <TB0> INFO: ----------------------------------------------------------------------
[12:53:29.188] <TB0> INFO: Test took 2742ms.
[12:53:29.192] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:29.192] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:53:29.432] <TB0> INFO: PixTestAlive::maskTest() done
[12:53:29.432] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:53:29.434] <TB0> INFO: ----------------------------------------------------------------------
[12:53:29.434] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:53:29.434] <TB0> INFO: ----------------------------------------------------------------------
[12:53:32.842] <TB0> INFO: Test took 3407ms.
[12:53:32.866] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:33.092] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[12:53:33.092] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:53:33.092] <TB0> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:53:33.103] <TB0> INFO: ######################################################################
[12:53:33.103] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:53:33.103] <TB0> INFO: ######################################################################
[12:53:33.106] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:53:33.118] <TB0> INFO: dacScan step from 0 .. 29
[12:53:54.347] <TB0> INFO: Test took 21229ms.
[12:53:54.379] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:54.379] <TB0> INFO: dacScan step from 30 .. 59
[12:54:18.814] <TB0> INFO: Test took 24435ms.
[12:54:18.968] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:19.002] <TB0> INFO: dacScan step from 60 .. 89
[12:54:47.961] <TB0> INFO: Test took 28959ms.
[12:54:48.254] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:48.336] <TB0> INFO: dacScan step from 90 .. 119
[12:55:17.024] <TB0> INFO: Test took 28688ms.
[12:55:17.308] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:17.380] <TB0> INFO: dacScan step from 120 .. 149
[12:55:41.809] <TB0> INFO: Test took 24429ms.
[12:55:41.980] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:05.773] <TB0> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[12:56:05.773] <TB0> INFO: number of dead bumps (per ROC): 0 0 1 2 19 0 0 18 1 1 1 0 0 0 1 2
[12:56:05.773] <TB0> INFO: separation cut (per ROC): 77 64 84 79 63 69 71 65 90 66 72 66 83 64 70 76
[12:56:05.869] <TB0> INFO: ######################################################################
[12:56:05.869] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[12:56:05.869] <TB0> INFO: ######################################################################
[12:56:05.869] <TB0> INFO: ----------------------------------------------------------------------
[12:56:05.869] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:56:05.869] <TB0> INFO: ----------------------------------------------------------------------
[12:56:05.870] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:56:05.878] <TB0> INFO: dacScan step from 0 .. 3
[12:56:23.627] <TB0> INFO: Test took 17749ms.
[12:56:23.661] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:23.661] <TB0> INFO: dacScan step from 4 .. 7
[12:56:40.885] <TB0> INFO: Test took 17224ms.
[12:56:40.910] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:40.910] <TB0> INFO: dacScan step from 8 .. 11
[12:56:58.949] <TB0> INFO: Test took 18039ms.
[12:56:58.974] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:58.974] <TB0> INFO: dacScan step from 12 .. 15
[12:57:17.576] <TB0> INFO: Test took 18602ms.
[12:57:17.604] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:17.604] <TB0> INFO: dacScan step from 16 .. 19
[12:57:36.468] <TB0> INFO: Test took 18864ms.
[12:57:36.499] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:36.499] <TB0> INFO: dacScan step from 20 .. 23
[12:57:55.326] <TB0> INFO: Test took 18827ms.
[12:57:55.357] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:55.358] <TB0> INFO: dacScan step from 24 .. 27
[12:58:14.205] <TB0> INFO: Test took 18847ms.
[12:58:14.233] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:14.233] <TB0> INFO: dacScan step from 28 .. 31
[12:58:32.922] <TB0> INFO: Test took 18688ms.
[12:58:32.949] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:32.949] <TB0> INFO: dacScan step from 32 .. 35
[12:58:51.738] <TB0> INFO: Test took 18788ms.
[12:58:51.765] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:51.765] <TB0> INFO: dacScan step from 36 .. 39
[12:59:10.558] <TB0> INFO: Test took 18793ms.
[12:59:10.585] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:10.585] <TB0> INFO: dacScan step from 40 .. 43
[12:59:29.388] <TB0> INFO: Test took 18802ms.
[12:59:29.418] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:29.418] <TB0> INFO: dacScan step from 44 .. 47
[12:59:48.278] <TB0> INFO: Test took 18860ms.
[12:59:48.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:48.310] <TB0> INFO: dacScan step from 48 .. 51
[13:00:07.193] <TB0> INFO: Test took 18882ms.
[13:00:07.227] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:07.227] <TB0> INFO: dacScan step from 52 .. 55
[13:00:26.047] <TB0> INFO: Test took 18820ms.
[13:00:26.080] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:26.080] <TB0> INFO: dacScan step from 56 .. 59
[13:00:45.048] <TB0> INFO: Test took 18968ms.
[13:00:45.080] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:45.081] <TB0> INFO: dacScan step from 60 .. 63
[13:01:04.287] <TB0> INFO: Test took 19206ms.
[13:01:04.342] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:04.343] <TB0> INFO: dacScan step from 64 .. 67
[13:01:24.256] <TB0> INFO: Test took 19913ms.
[13:01:24.317] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:24.319] <TB0> INFO: dacScan step from 68 .. 71
[13:01:45.267] <TB0> INFO: Test took 20948ms.
[13:01:45.353] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:45.356] <TB0> INFO: dacScan step from 72 .. 75
[13:02:07.296] <TB0> INFO: Test took 21940ms.
[13:02:07.407] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:07.411] <TB0> INFO: dacScan step from 76 .. 79
[13:02:30.832] <TB0> INFO: Test took 23421ms.
[13:02:30.973] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:30.978] <TB0> INFO: dacScan step from 80 .. 83
[13:02:57.026] <TB0> INFO: Test took 26048ms.
[13:02:57.231] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:57.240] <TB0> INFO: dacScan step from 84 .. 87
[13:03:24.802] <TB0> INFO: Test took 27562ms.
[13:03:25.037] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:25.046] <TB0> INFO: dacScan step from 88 .. 91
[13:03:53.344] <TB0> INFO: Test took 28298ms.
[13:03:53.583] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:53.596] <TB0> INFO: dacScan step from 92 .. 95




[13:04:22.468] <TB0> INFO: Test took 28872ms.
[13:04:22.708] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:22.720] <TB0> INFO: dacScan step from 96 .. 99



[13:04:49.334] <TB0> INFO: Test took 26615ms.
[13:04:49.570] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:49.582] <TB0> INFO: dacScan step from 100 .. 103



[13:05:17.511] <TB0> INFO: Test took 27929ms.
[13:05:17.759] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:17.771] <TB0> INFO: dacScan step from 104 .. 107



[13:05:46.977] <TB0> INFO: Test took 29206ms.
[13:05:47.226] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:47.238] <TB0> INFO: dacScan step from 108 .. 111



[13:06:16.381] <TB0> INFO: Test took 29143ms.
[13:06:16.624] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:16.636] <TB0> INFO: dacScan step from 112 .. 115




[13:06:45.684] <TB0> INFO: Test took 29048ms.
[13:06:45.904] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:45.917] <TB0> INFO: dacScan step from 116 .. 119
[13:07:14.773] <TB0> INFO: Test took 28856ms.
[13:07:15.002] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:15.015] <TB0> INFO: dacScan step from 120 .. 123
[13:07:43.922] <TB0> INFO: Test took 28907ms.
[13:07:44.158] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:44.170] <TB0> INFO: dacScan step from 124 .. 127
[13:08:12.972] <TB0> INFO: Test took 28802ms.
[13:08:13.205] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:13.217] <TB0> INFO: dacScan step from 128 .. 131
[13:08:42.023] <TB0> INFO: Test took 28806ms.
[13:08:42.271] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:42.282] <TB0> INFO: dacScan step from 132 .. 135
[13:09:11.210] <TB0> INFO: Test took 28928ms.
[13:09:11.441] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:11.452] <TB0> INFO: dacScan step from 136 .. 139
[13:09:40.161] <TB0> INFO: Test took 28709ms.
[13:09:40.402] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:40.413] <TB0> INFO: dacScan step from 140 .. 143
[13:10:09.405] <TB0> INFO: Test took 28992ms.
[13:10:09.656] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:09.668] <TB0> INFO: dacScan step from 144 .. 147
[13:10:38.540] <TB0> INFO: Test took 28872ms.
[13:10:38.784] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:38.796] <TB0> INFO: dacScan step from 148 .. 149
[13:10:54.521] <TB0> INFO: Test took 15725ms.
[13:10:54.707] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:54.715] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:10:56.308] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:10:57.953] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:10:59.439] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:00.981] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:02.564] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:04.140] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:05.581] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:07.055] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:08.579] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:10.185] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:11.748] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:13.371] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:14.899] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:16.530] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:18.074] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:11:19.526] <TB0> INFO: PixTestScurves::scurves() done
[13:11:19.526] <TB0> INFO: Vcal mean: 83.95 65.37 86.09 86.42 71.68 77.23 82.07 83.02 95.09 75.97 81.76 71.06 88.45 73.40 76.20 82.45
[13:11:19.526] <TB0> INFO: Vcal RMS: 4.67 4.53 6.50 5.98 4.71 4.29 4.32 4.69 5.49 4.53 4.91 4.79 5.89 4.76 4.13 4.31
[13:11:19.526] <TB0> INFO: PixTestScurves::fullTest() done, duration: 913 seconds
[13:11:19.597] <TB0> INFO: ######################################################################
[13:11:19.597] <TB0> INFO: PixTestTrim::doTest()
[13:11:19.597] <TB0> INFO: ######################################################################
[13:11:19.598] <TB0> INFO: ----------------------------------------------------------------------
[13:11:19.598] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:11:19.598] <TB0> INFO: ----------------------------------------------------------------------
[13:11:19.682] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:11:19.682] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:11:19.690] <TB0> INFO: dacScan step from 0 .. 19
[13:11:34.149] <TB0> INFO: Test took 14459ms.
[13:11:34.168] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:34.168] <TB0> INFO: dacScan step from 20 .. 39
[13:11:49.194] <TB0> INFO: Test took 15026ms.
[13:11:49.216] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:49.216] <TB0> INFO: dacScan step from 40 .. 59
[13:12:04.260] <TB0> INFO: Test took 15044ms.
[13:12:04.287] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:04.287] <TB0> INFO: dacScan step from 60 .. 79
[13:12:19.296] <TB0> INFO: Test took 15009ms.
[13:12:19.321] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:19.321] <TB0> INFO: dacScan step from 80 .. 99
[13:12:36.046] <TB0> INFO: Test took 16725ms.
[13:12:36.155] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:36.173] <TB0> INFO: dacScan step from 100 .. 119
[13:12:55.623] <TB0> INFO: Test took 19449ms.
[13:12:55.816] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:55.850] <TB0> INFO: dacScan step from 120 .. 139
[13:13:13.699] <TB0> INFO: Test took 17849ms.
[13:13:13.851] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:13.876] <TB0> INFO: dacScan step from 140 .. 159
[13:13:29.478] <TB0> INFO: Test took 15602ms.
[13:13:29.530] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:54.238] <TB0> INFO: ROC 0 VthrComp = 90
[13:13:54.238] <TB0> INFO: ROC 1 VthrComp = 72
[13:13:54.238] <TB0> INFO: ROC 2 VthrComp = 89
[13:13:54.238] <TB0> INFO: ROC 3 VthrComp = 88
[13:13:54.239] <TB0> INFO: ROC 4 VthrComp = 77
[13:13:54.239] <TB0> INFO: ROC 5 VthrComp = 85
[13:13:54.239] <TB0> INFO: ROC 6 VthrComp = 85
[13:13:54.239] <TB0> INFO: ROC 7 VthrComp = 90
[13:13:54.239] <TB0> INFO: ROC 8 VthrComp = 99
[13:13:54.239] <TB0> INFO: ROC 9 VthrComp = 79
[13:13:54.239] <TB0> INFO: ROC 10 VthrComp = 85
[13:13:54.239] <TB0> INFO: ROC 11 VthrComp = 76
[13:13:54.239] <TB0> INFO: ROC 12 VthrComp = 91
[13:13:54.239] <TB0> INFO: ROC 13 VthrComp = 77
[13:13:54.239] <TB0> INFO: ROC 14 VthrComp = 81
[13:13:54.240] <TB0> INFO: ROC 15 VthrComp = 91
[13:13:54.240] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:13:54.240] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:13:54.248] <TB0> INFO: dacScan step from 0 .. 19
[13:14:08.529] <TB0> INFO: Test took 14281ms.
[13:14:08.550] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:08.550] <TB0> INFO: dacScan step from 20 .. 39
[13:14:23.752] <TB0> INFO: Test took 15202ms.
[13:14:23.783] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:23.788] <TB0> INFO: dacScan step from 40 .. 59
[13:14:41.580] <TB0> INFO: Test took 17792ms.
[13:14:41.768] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:41.807] <TB0> INFO: dacScan step from 60 .. 79
[13:15:00.892] <TB0> INFO: Test took 19085ms.
[13:15:01.059] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:01.110] <TB0> INFO: dacScan step from 80 .. 99
[13:15:21.188] <TB0> INFO: Test took 20078ms.
[13:15:21.421] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:21.476] <TB0> INFO: dacScan step from 100 .. 119
[13:15:41.669] <TB0> INFO: Test took 20193ms.
[13:15:41.869] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:41.927] <TB0> INFO: dacScan step from 120 .. 139
[13:16:01.960] <TB0> INFO: Test took 20033ms.
[13:16:02.182] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:02.239] <TB0> INFO: dacScan step from 140 .. 159
[13:16:22.352] <TB0> INFO: Test took 20112ms.
[13:16:22.519] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:49.909] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 57.5295 for pixel 2/79 mean/min/max = 45.1247/32.6623/57.5871
[13:16:49.909] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 56.4856 for pixel 6/23 mean/min/max = 45.5181/34.5299/56.5062
[13:16:49.910] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 64.7085 for pixel 14/70 mean/min/max = 47.8668/31.0043/64.7292
[13:16:49.910] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 62.3991 for pixel 0/71 mean/min/max = 47.4373/32.3698/62.5048
[13:16:49.910] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 58.0281 for pixel 3/5 mean/min/max = 46.6653/35.188/58.1426
[13:16:49.911] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 56.8739 for pixel 9/78 mean/min/max = 44.6532/32.4326/56.8739
[13:16:49.911] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 57.4438 for pixel 40/15 mean/min/max = 45.4208/33.1956/57.6461
[13:16:49.911] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.1402 for pixel 1/75 mean/min/max = 44.8408/32.3627/57.3189
[13:16:49.912] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 57.8795 for pixel 2/53 mean/min/max = 44.8927/31.7656/58.0198
[13:16:49.912] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 60.1724 for pixel 13/67 mean/min/max = 47.3901/34.5583/60.222
[13:16:49.912] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 59.4378 for pixel 0/8 mean/min/max = 45.5547/31.6531/59.4564
[13:16:49.913] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.2177 for pixel 51/14 mean/min/max = 46.5394/34.8339/58.2448
[13:16:49.913] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 61.0121 for pixel 22/0 mean/min/max = 46.7198/32.3827/61.0569
[13:16:49.913] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 58.9467 for pixel 15/4 mean/min/max = 46.6396/34.2126/59.0665
[13:16:49.914] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 57.135 for pixel 26/3 mean/min/max = 44.894/32.5817/57.2063
[13:16:49.914] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 56.3082 for pixel 39/77 mean/min/max = 44.7092/32.7802/56.6381
[13:16:49.914] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:18:22.004] <TB0> INFO: Test took 92090ms.
[13:18:23.644] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:18:23.653] <TB0> INFO: dacScan step from 0 .. 19
[13:18:46.055] <TB0> INFO: Test took 22402ms.
[13:18:46.100] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:46.102] <TB0> INFO: dacScan step from 20 .. 39
[13:19:14.385] <TB0> INFO: Test took 28283ms.
[13:19:14.628] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:14.662] <TB0> INFO: dacScan step from 40 .. 59


[13:19:47.413] <TB0> INFO: Test took 32751ms.
[13:19:47.711] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:47.769] <TB0> INFO: dacScan step from 60 .. 79



[13:20:20.583] <TB0> INFO: Test took 32814ms.
[13:20:20.884] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:20.934] <TB0> INFO: dacScan step from 80 .. 99






[13:20:51.440] <TB0> INFO: Test took 30506ms.
[13:20:51.713] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:51.767] <TB0> INFO: dacScan step from 100 .. 119



[13:21:24.582] <TB0> INFO: Test took 32815ms.
[13:21:24.855] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:24.908] <TB0> INFO: dacScan step from 120 .. 139


[13:21:57.695] <TB0> INFO: Test took 32787ms.
[13:21:57.992] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:58.052] <TB0> INFO: dacScan step from 140 .. 159



[13:22:31.119] <TB0> INFO: Test took 33067ms.
[13:22:31.408] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:31.462] <TB0> INFO: dacScan step from 160 .. 179



[13:23:04.218] <TB0> INFO: Test took 32756ms.
[13:23:04.522] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:04.578] <TB0> INFO: dacScan step from 180 .. 199



[13:23:38.431] <TB0> INFO: Test took 33853ms.
[13:23:38.716] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:05.826] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.100646 .. 59.803583
[13:24:05.906] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 69 (20) hits flags = 16 (plus default)
[13:24:05.914] <TB0> INFO: dacScan step from 0 .. 19
[13:24:18.979] <TB0> INFO: Test took 13065ms.
[13:24:18.999] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:18.999] <TB0> INFO: dacScan step from 20 .. 39
[13:24:33.744] <TB0> INFO: Test took 14745ms.
[13:24:33.848] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:33.866] <TB0> INFO: dacScan step from 40 .. 59
[13:24:51.498] <TB0> INFO: Test took 17632ms.
[13:24:51.680] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:51.741] <TB0> INFO: dacScan step from 60 .. 69
[13:25:02.035] <TB0> INFO: Test took 10294ms.
[13:25:02.108] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:20.517] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 14.499999 .. 49.188808
[13:25:20.598] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 59 (20) hits flags = 16 (plus default)
[13:25:20.606] <TB0> INFO: dacScan step from 4 .. 23
[13:25:34.152] <TB0> INFO: Test took 13546ms.
[13:25:34.176] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:34.176] <TB0> INFO: dacScan step from 24 .. 43
[13:25:49.710] <TB0> INFO: Test took 15534ms.
[13:25:49.836] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:49.866] <TB0> INFO: dacScan step from 44 .. 59
[13:26:04.575] <TB0> INFO: Test took 14709ms.
[13:26:04.732] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:23.148] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 20.115524 .. 46.315614
[13:26:23.228] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 56 (20) hits flags = 16 (plus default)
[13:26:23.236] <TB0> INFO: dacScan step from 10 .. 29
[13:26:36.815] <TB0> INFO: Test took 13578ms.
[13:26:36.842] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:36.843] <TB0> INFO: dacScan step from 30 .. 49
[13:26:53.502] <TB0> INFO: Test took 16659ms.
[13:26:53.642] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:53.688] <TB0> INFO: dacScan step from 50 .. 56
[13:27:01.734] <TB0> INFO: Test took 8046ms.
[13:27:01.786] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:19.869] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 22.573734 .. 45.793975
[13:27:19.951] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 12 .. 55 (20) hits flags = 16 (plus default)
[13:27:19.959] <TB0> INFO: dacScan step from 12 .. 31
[13:27:33.606] <TB0> INFO: Test took 13647ms.
[13:27:33.639] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:33.641] <TB0> INFO: dacScan step from 32 .. 51
[13:27:50.864] <TB0> INFO: Test took 17223ms.
[13:27:51.034] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:51.086] <TB0> INFO: dacScan step from 52 .. 55
[13:27:56.821] <TB0> INFO: Test took 5735ms.
[13:27:56.868] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:13.375] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:28:13.375] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:28:13.383] <TB0> INFO: dacScan step from 15 .. 34
[13:28:35.208] <TB0> INFO: Test took 21825ms.
[13:28:35.278] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:35.287] <TB0> INFO: dacScan step from 35 .. 54
[13:29:07.052] <TB0> INFO: Test took 31765ms.
[13:29:07.372] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:07.430] <TB0> INFO: dacScan step from 55 .. 55
[13:29:11.613] <TB0> INFO: Test took 4183ms.
[13:29:11.628] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:29.474] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:29:29.475] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:29:29.475] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:29:29.475] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:29:29.475] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:29:29.475] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:29:29.475] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:29:29.475] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:29:29.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:29:29.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:29:29.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:29:29.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:29:29.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:29:29.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:29:29.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:29:29.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:29:29.499] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:29:29.508] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:29:29.517] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:29:29.527] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:29:29.537] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:29:29.546] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:29:29.556] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:29:29.565] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:29:29.575] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:29:29.581] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:29:29.590] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:29:29.600] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:29:29.609] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:29:29.615] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:29:29.620] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:29:29.626] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:29:29.632] <TB0> INFO: PixTestTrim::trimTest() done
[13:29:29.632] <TB0> INFO: vtrim: 103 94 137 97 109 112 95 113 110 106 109 96 112 106 106 109
[13:29:29.632] <TB0> INFO: vthrcomp: 90 72 89 88 77 85 85 90 99 79 85 76 91 77 81 91
[13:29:29.632] <TB0> INFO: vcal mean: 35.04 35.04 35.04 35.06 35.10 35.05 35.07 35.02 35.05 35.07 35.01 35.04 35.03 35.06 35.04 34.99
[13:29:29.632] <TB0> INFO: vcal RMS: 1.04 0.95 1.09 1.32 0.98 0.99 1.07 1.12 1.04 1.03 1.07 0.93 1.10 1.00 0.97 1.02
[13:29:29.632] <TB0> INFO: bits mean: 9.72 9.39 9.63 9.05 9.12 10.42 9.80 10.33 10.20 9.12 9.85 8.67 9.96 9.35 9.92 9.90
[13:29:29.632] <TB0> INFO: bits RMS: 2.57 2.42 2.64 2.73 2.39 2.29 2.47 2.32 2.48 2.39 2.66 2.63 2.42 2.42 2.54 2.46
[13:29:29.637] <TB0> INFO: ----------------------------------------------------------------------
[13:29:29.637] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[13:29:29.637] <TB0> INFO: ----------------------------------------------------------------------
[13:29:29.639] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:29:29.647] <TB0> INFO: dacScan step from 0 .. 19
[13:29:52.459] <TB0> INFO: Test took 22812ms.
[13:29:52.494] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:52.494] <TB0> INFO: dacScan step from 20 .. 39
[13:30:14.277] <TB0> INFO: Test took 21783ms.
[13:30:14.346] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:14.350] <TB0> INFO: dacScan step from 40 .. 59
[13:30:42.398] <TB0> INFO: Test took 28048ms.
[13:30:42.649] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:42.688] <TB0> INFO: dacScan step from 60 .. 79



[13:31:13.421] <TB0> INFO: Test took 30733ms.
[13:31:13.721] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:13.778] <TB0> INFO: dacScan step from 80 .. 99
[13:31:44.151] <TB0> INFO: Test took 30373ms.
[13:31:44.470] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:44.527] <TB0> INFO: dacScan step from 100 .. 119
[13:32:16.760] <TB0> INFO: Test took 32233ms.
[13:32:17.037] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:17.091] <TB0> INFO: dacScan step from 120 .. 139
[13:32:48.373] <TB0> INFO: Test took 31282ms.
[13:32:48.716] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:48.772] <TB0> INFO: dacScan step from 140 .. 159
[13:33:21.077] <TB0> INFO: Test took 32305ms.
[13:33:21.373] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:21.437] <TB0> INFO: dacScan step from 160 .. 179
[13:33:54.327] <TB0> INFO: Test took 32890ms.
[13:33:54.634] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:54.687] <TB0> INFO: dacScan step from 180 .. 199
[13:34:28.550] <TB0> INFO: Test took 33863ms.
[13:34:28.840] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:57.058] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 91 (20) hits flags = 16 (plus default)
[13:34:57.066] <TB0> INFO: dacScan step from 0 .. 19
[13:35:19.649] <TB0> INFO: Test took 22583ms.
[13:35:19.696] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:19.696] <TB0> INFO: dacScan step from 20 .. 39
[13:35:43.633] <TB0> INFO: Test took 23937ms.
[13:35:43.731] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:43.744] <TB0> INFO: dacScan step from 40 .. 59
[13:36:15.488] <TB0> INFO: Test took 31744ms.
[13:36:15.778] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:15.824] <TB0> INFO: dacScan step from 60 .. 79



[13:36:48.837] <TB0> INFO: Test took 33012ms.
[13:36:49.110] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:49.160] <TB0> INFO: dacScan step from 80 .. 91
[13:37:09.715] <TB0> INFO: Test took 20555ms.
[13:37:09.905] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:29.472] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 86 (20) hits flags = 16 (plus default)
[13:37:29.481] <TB0> INFO: dacScan step from 0 .. 19
[13:37:50.748] <TB0> INFO: Test took 21267ms.
[13:37:50.784] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:50.784] <TB0> INFO: dacScan step from 20 .. 39
[13:38:15.728] <TB0> INFO: Test took 24944ms.
[13:38:15.873] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:15.889] <TB0> INFO: dacScan step from 40 .. 59



[13:38:48.500] <TB0> INFO: Test took 32611ms.
[13:38:48.867] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:48.920] <TB0> INFO: dacScan step from 60 .. 79
[13:39:21.740] <TB0> INFO: Test took 32820ms.
[13:39:22.021] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:22.073] <TB0> INFO: dacScan step from 80 .. 86
[13:39:35.181] <TB0> INFO: Test took 13108ms.
[13:39:35.295] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:54.743] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 82 (20) hits flags = 16 (plus default)
[13:39:54.751] <TB0> INFO: dacScan step from 0 .. 19
[13:40:16.095] <TB0> INFO: Test took 21344ms.
[13:40:16.131] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:16.131] <TB0> INFO: dacScan step from 20 .. 39
[13:40:42.185] <TB0> INFO: Test took 26054ms.
[13:40:42.367] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:42.389] <TB0> INFO: dacScan step from 40 .. 59




[13:41:12.376] <TB0> INFO: Test took 29987ms.
[13:41:12.686] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:12.741] <TB0> INFO: dacScan step from 60 .. 79
[13:41:45.676] <TB0> INFO: Test took 32935ms.
[13:41:45.944] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:45.999] <TB0> INFO: dacScan step from 80 .. 82
[13:41:53.303] <TB0> INFO: Test took 7304ms.
[13:41:53.347] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:10.202] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 81 (20) hits flags = 16 (plus default)
[13:42:10.211] <TB0> INFO: dacScan step from 0 .. 19
[13:42:31.385] <TB0> INFO: Test took 21174ms.
[13:42:31.426] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:31.427] <TB0> INFO: dacScan step from 20 .. 39
[13:42:59.511] <TB0> INFO: Test took 28084ms.
[13:42:59.734] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:59.764] <TB0> INFO: dacScan step from 40 .. 59
[13:43:32.782] <TB0> INFO: Test took 33018ms.
[13:43:33.082] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:33.134] <TB0> INFO: dacScan step from 60 .. 79




[13:44:03.621] <TB0> INFO: Test took 30487ms.
[13:44:03.933] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:03.988] <TB0> INFO: dacScan step from 80 .. 81
[13:44:09.828] <TB0> INFO: Test took 5840ms.
[13:44:09.855] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:28.426] <TB0> INFO: PixTestTrim::trimBitTest() done
[13:44:28.427] <TB0> INFO: PixTestTrim::doTest() done, duration: 1988 seconds
[13:44:29.155] <TB0> INFO: ######################################################################
[13:44:29.155] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:44:29.155] <TB0> INFO: ######################################################################
[13:44:32.433] <TB0> INFO: Test took 3276ms.
[13:44:32.460] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:36.070] <TB0> INFO: Test took 3411ms.
[13:44:36.133] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:39.582] <TB0> INFO: Test took 3439ms.
[13:44:39.643] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:39.650] <TB0> INFO: The DUT currently contains the following objects:
[13:44:39.650] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:39.650] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:39.650] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:39.650] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:39.650] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:39.650] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.758] <TB0> INFO: Test took 1108ms.
[13:44:40.759] <TB0> INFO: The DUT currently contains the following objects:
[13:44:40.759] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:40.759] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:40.759] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:40.760] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:40.760] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:40.760] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.868] <TB0> INFO: Test took 1108ms.
[13:44:41.870] <TB0> INFO: The DUT currently contains the following objects:
[13:44:41.870] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:41.870] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:41.870] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:41.870] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:41.870] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:41.870] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.976] <TB0> INFO: Test took 1106ms.
[13:44:42.978] <TB0> INFO: The DUT currently contains the following objects:
[13:44:42.978] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:42.978] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:42.978] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:42.978] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:42.978] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:42.978] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.087] <TB0> INFO: Test took 1109ms.
[13:44:44.089] <TB0> INFO: The DUT currently contains the following objects:
[13:44:44.089] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:44.089] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:44.089] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:44.089] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:44.089] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:44.089] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.196] <TB0> INFO: Test took 1107ms.
[13:44:45.197] <TB0> INFO: The DUT currently contains the following objects:
[13:44:45.197] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:45.197] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:45.197] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:45.197] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:45.197] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.197] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.197] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.197] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.197] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.197] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.197] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.197] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:45.198] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.306] <TB0> INFO: Test took 1108ms.
[13:44:46.307] <TB0> INFO: The DUT currently contains the following objects:
[13:44:46.307] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:46.307] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:46.307] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:46.307] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:46.307] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.307] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.308] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.308] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.308] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.308] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.308] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.308] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:46.308] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.411] <TB0> INFO: Test took 1103ms.
[13:44:47.412] <TB0> INFO: The DUT currently contains the following objects:
[13:44:47.412] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:47.412] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:47.412] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:47.412] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:47.412] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:47.412] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.523] <TB0> INFO: Test took 1111ms.
[13:44:48.524] <TB0> INFO: The DUT currently contains the following objects:
[13:44:48.524] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:48.524] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:48.524] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:48.524] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:48.524] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.524] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:48.525] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.633] <TB0> INFO: Test took 1108ms.
[13:44:49.634] <TB0> INFO: The DUT currently contains the following objects:
[13:44:49.634] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:49.634] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:49.634] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:49.634] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:49.634] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:49.634] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.738] <TB0> INFO: Test took 1104ms.
[13:44:50.738] <TB0> INFO: The DUT currently contains the following objects:
[13:44:50.738] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:50.738] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:50.738] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:50.738] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:50.739] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:50.739] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.842] <TB0> INFO: Test took 1103ms.
[13:44:51.843] <TB0> INFO: The DUT currently contains the following objects:
[13:44:51.843] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:51.843] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:51.843] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:51.843] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:51.843] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:51.843] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.950] <TB0> INFO: Test took 1107ms.
[13:44:52.951] <TB0> INFO: The DUT currently contains the following objects:
[13:44:52.951] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:52.951] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:52.951] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:52.951] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:52.951] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.951] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.952] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.952] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.952] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.952] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.952] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:52.952] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.061] <TB0> INFO: Test took 1109ms.
[13:44:54.062] <TB0> INFO: The DUT currently contains the following objects:
[13:44:54.062] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:54.062] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:54.062] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:54.062] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:54.062] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.062] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.063] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.063] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.063] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.063] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.063] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:54.063] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.170] <TB0> INFO: Test took 1107ms.
[13:44:55.171] <TB0> INFO: The DUT currently contains the following objects:
[13:44:55.171] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:55.171] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:55.171] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:55.171] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:55.171] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.171] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.172] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.172] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.172] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.172] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.172] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.172] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:55.172] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.279] <TB0> INFO: Test took 1107ms.
[13:44:56.281] <TB0> INFO: The DUT currently contains the following objects:
[13:44:56.281] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:44:56.281] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:44:56.281] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:44:56.281] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:44:56.281] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.281] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.281] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.281] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.281] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.282] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.282] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.282] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.282] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.282] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.283] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.283] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.283] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.283] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.283] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:56.283] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:44:57.391] <TB0> INFO: Test took 1108ms.
[13:44:57.395] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:48:38.259] <TB0> INFO: Test took 220864ms.
[13:48:40.279] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:24.217] <TB0> INFO: Test took 223938ms.
[13:52:26.258] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.265] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.274] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.282] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.291] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.299] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.307] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.315] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.323] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.331] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.340] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.349] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.357] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.365] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.372] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.379] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:52:26.412] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:52:26.413] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:52:26.413] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:52:26.413] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:52:26.413] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:52:26.413] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:52:26.413] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:52:26.414] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:52:26.414] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:52:26.414] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:52:26.414] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:52:26.415] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:52:26.415] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:52:26.415] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:52:26.415] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:52:26.416] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:52:29.828] <TB0> INFO: Test took 3409ms.
[13:52:33.537] <TB0> INFO: Test took 3433ms.
[13:52:37.264] <TB0> INFO: Test took 3449ms.
[13:52:37.545] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:38.465] <TB0> INFO: Test took 920ms.
[13:52:38.468] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:39.576] <TB0> INFO: Test took 1108ms.
[13:52:39.579] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:40.687] <TB0> INFO: Test took 1108ms.
[13:52:40.690] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:41.800] <TB0> INFO: Test took 1110ms.
[13:52:41.806] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:42.912] <TB0> INFO: Test took 1106ms.
[13:52:42.916] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:44.024] <TB0> INFO: Test took 1108ms.
[13:52:44.028] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:45.134] <TB0> INFO: Test took 1106ms.
[13:52:45.138] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:46.247] <TB0> INFO: Test took 1109ms.
[13:52:46.251] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:47.357] <TB0> INFO: Test took 1107ms.
[13:52:47.361] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:48.471] <TB0> INFO: Test took 1110ms.
[13:52:48.474] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:49.584] <TB0> INFO: Test took 1110ms.
[13:52:49.587] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:50.690] <TB0> INFO: Test took 1103ms.
[13:52:50.693] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:51.801] <TB0> INFO: Test took 1108ms.
[13:52:51.804] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:52.910] <TB0> INFO: Test took 1106ms.
[13:52:52.913] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:54.020] <TB0> INFO: Test took 1108ms.
[13:52:54.024] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:55.131] <TB0> INFO: Test took 1107ms.
[13:52:55.135] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:56.243] <TB0> INFO: Test took 1108ms.
[13:52:56.247] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:57.356] <TB0> INFO: Test took 1109ms.
[13:52:57.360] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:58.469] <TB0> INFO: Test took 1109ms.
[13:52:58.473] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:59.581] <TB0> INFO: Test took 1108ms.
[13:52:59.585] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:00.694] <TB0> INFO: Test took 1109ms.
[13:53:00.697] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:01.804] <TB0> INFO: Test took 1107ms.
[13:53:01.808] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:02.910] <TB0> INFO: Test took 1102ms.
[13:53:02.913] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:04.021] <TB0> INFO: Test took 1108ms.
[13:53:04.025] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:05.132] <TB0> INFO: Test took 1107ms.
[13:53:05.137] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:06.246] <TB0> INFO: Test took 1110ms.
[13:53:06.250] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:07.358] <TB0> INFO: Test took 1109ms.
[13:53:07.361] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:08.474] <TB0> INFO: Test took 1113ms.
[13:53:08.477] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:09.586] <TB0> INFO: Test took 1109ms.
[13:53:09.590] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:10.699] <TB0> INFO: Test took 1110ms.
[13:53:10.702] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:11.810] <TB0> INFO: Test took 1108ms.
[13:53:11.815] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:12.923] <TB0> INFO: Test took 1108ms.
[13:53:13.469] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 524 seconds
[13:53:13.469] <TB0> INFO: PH scale (per ROC): 94 93 83 81 91 91 87 80 80 91 86 89 80 88 98 90
[13:53:13.469] <TB0> INFO: PH offset (per ROC): 144 145 167 154 158 140 140 149 151 146 162 126 172 154 146 158
[13:53:13.663] <TB0> INFO: ######################################################################
[13:53:13.663] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:53:13.663] <TB0> INFO: ######################################################################
[13:53:13.674] <TB0> INFO: scanning low vcal = 50
[13:53:18.020] <TB0> INFO: Test took 4346ms.
[13:53:18.087] <TB0> INFO: scanning low vcal = 100
[13:53:22.417] <TB0> INFO: Test took 4330ms.
[13:53:22.495] <TB0> INFO: scanning low vcal = 150
[13:53:26.834] <TB0> INFO: Test took 4338ms.
[13:53:26.893] <TB0> INFO: scanning low vcal = 200
[13:53:31.270] <TB0> INFO: Test took 4377ms.
[13:53:31.332] <TB0> INFO: scanning low vcal = 250
[13:53:35.698] <TB0> INFO: Test took 4366ms.
[13:53:35.768] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[13:53:40.141] <TB0> INFO: Test took 4373ms.
[13:53:40.211] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[13:53:44.560] <TB0> INFO: Test took 4349ms.
[13:53:44.619] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[13:53:48.986] <TB0> INFO: Test took 4367ms.
[13:53:49.056] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[13:53:53.412] <TB0> INFO: Test took 4356ms.
[13:53:53.473] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:53:57.802] <TB0> INFO: Test took 4329ms.
[13:53:58.174] <TB0> INFO: PixTestGainPedestal::measure() done
[13:54:25.162] <TB0> INFO: PixTestGainPedestal::fit() done
[13:54:25.162] <TB0> INFO: non-linearity mean: 0.955 0.949 0.949 0.947 0.949 0.947 0.954 0.951 0.957 0.956 0.948 0.954 0.950 0.946 0.958 0.952
[13:54:25.162] <TB0> INFO: non-linearity RMS: 0.006 0.006 0.005 0.006 0.006 0.005 0.005 0.007 0.005 0.005 0.006 0.005 0.006 0.007 0.006 0.006
[13:54:25.162] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:54:25.181] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:54:25.200] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:54:25.222] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:54:25.242] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:54:25.263] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:54:25.284] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:54:25.306] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:54:25.328] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:54:25.350] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:54:25.370] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:54:25.391] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:54:25.412] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:54:25.433] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:54:25.454] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:54:25.475] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:54:25.495] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 71 seconds
[13:54:25.502] <TB0> INFO: enter test to run
[13:54:25.502] <TB0> INFO: test: exit no parameter change
[13:54:26.136] <TB0> QUIET: Connection to board 126 closed.
[13:54:26.216] <TB0> INFO: pXar: this is the end, my friend