[12:27:47.444] <TB1> INFO: *** Welcome to pxar ***
[12:27:47.444] <TB1> INFO: *** Today: 2015/08/13
[12:27:47.444] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C15.dat
[12:27:47.444] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//tbmParameters_C0b.dat
[12:27:47.444] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//defaultMaskFile.dat
[12:27:47.445] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters_C15.dat
[12:27:47.511] <TB1> INFO: clk: 4
[12:27:47.511] <TB1> INFO: ctr: 4
[12:27:47.511] <TB1> INFO: sda: 19
[12:27:47.511] <TB1> INFO: tin: 9
[12:27:47.511] <TB1> INFO: level: 15
[12:27:47.511] <TB1> INFO: triggerdelay: 0
[12:27:47.511] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[12:27:47.511] <TB1> INFO: Log level: INFO
[12:27:47.518] <TB1> INFO: Found DTB DTB_WXBYFL
[12:27:47.532] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[12:27:47.536] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[12:27:47.539] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[12:27:49.079] <TB1> INFO: DUT info:
[12:27:49.079] <TB1> INFO: The DUT currently contains the following objects:
[12:27:49.079] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:27:49.079] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:27:49.079] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:27:49.079] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:27:49.079] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.079] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.079] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.079] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.079] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.079] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.080] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:49.481] <TB1> INFO: enter 'restricted' command line mode
[12:27:49.481] <TB1> INFO: enter test to run
[12:27:49.481] <TB1> INFO: test: pretest no parameter change
[12:27:49.481] <TB1> INFO: running: pretest
[12:27:49.490] <TB1> INFO: ######################################################################
[12:27:49.490] <TB1> INFO: PixTestPretest::doTest()
[12:27:49.490] <TB1> INFO: ######################################################################
[12:27:49.491] <TB1> INFO: ----------------------------------------------------------------------
[12:27:49.491] <TB1> INFO: PixTestPretest::programROC()
[12:27:49.491] <TB1> INFO: ----------------------------------------------------------------------
[12:28:07.513] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:28:07.513] <TB1> INFO: IA differences per ROC: 19.3 18.5 18.5 20.1 20.1 19.3 19.3 18.5 17.7 17.7 16.9 19.3 15.3 18.5 20.1 18.5
[12:28:07.607] <TB1> INFO: ----------------------------------------------------------------------
[12:28:07.607] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:28:07.607] <TB1> INFO: ----------------------------------------------------------------------
[12:28:11.798] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 393.9 mA = 24.6187 mA/ROC
[12:28:11.801] <TB1> INFO: ----------------------------------------------------------------------
[12:28:11.801] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:28:11.801] <TB1> INFO: ----------------------------------------------------------------------
































































































































































































































































































































































































































































































































[12:28:20.265] <TB1> INFO: Test took 8460ms.
[12:28:20.558] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:28:20.608] <TB1> INFO: ----------------------------------------------------------------------
[12:28:20.608] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:28:20.608] <TB1> INFO: ----------------------------------------------------------------------
[12:28:28.968] <TB1> INFO: Test took 8344ms.
[12:28:29.307] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:28:29.307] <TB1> INFO: CalDel: 132 113 114 129 118 127 128 111 112 144 114 137 120 143 116 121
[12:28:29.307] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:28:29.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C0.dat
[12:28:29.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C1.dat
[12:28:29.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C2.dat
[12:28:29.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C3.dat
[12:28:29.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C4.dat
[12:28:29.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C5.dat
[12:28:29.314] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C6.dat
[12:28:29.314] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C7.dat
[12:28:29.314] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C8.dat
[12:28:29.315] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C9.dat
[12:28:29.315] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C10.dat
[12:28:29.315] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C11.dat
[12:28:29.315] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C12.dat
[12:28:29.316] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C13.dat
[12:28:29.316] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C14.dat
[12:28:29.316] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters_C15.dat
[12:28:29.316] <TB1> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[12:28:29.416] <TB1> INFO: enter test to run
[12:28:29.416] <TB1> INFO: test: fulltest no parameter change
[12:28:29.416] <TB1> INFO: running: fulltest
[12:28:29.417] <TB1> INFO: ######################################################################
[12:28:29.417] <TB1> INFO: PixTestFullTest::doTest()
[12:28:29.417] <TB1> INFO: ######################################################################
[12:28:29.418] <TB1> INFO: ######################################################################
[12:28:29.418] <TB1> INFO: PixTestAlive::doTest()
[12:28:29.418] <TB1> INFO: ######################################################################
[12:28:29.420] <TB1> INFO: ----------------------------------------------------------------------
[12:28:29.420] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:28:29.420] <TB1> INFO: ----------------------------------------------------------------------
[12:28:32.902] <TB1> INFO: Test took 3479ms.
[12:28:32.929] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:33.173] <TB1> INFO: PixTestAlive::aliveTest() done
[12:28:33.173] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:28:33.175] <TB1> INFO: ----------------------------------------------------------------------
[12:28:33.175] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:28:33.175] <TB1> INFO: ----------------------------------------------------------------------
[12:28:35.943] <TB1> INFO: Test took 2765ms.
[12:28:35.947] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:35.948] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:28:36.194] <TB1> INFO: PixTestAlive::maskTest() done
[12:28:36.194] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:28:36.196] <TB1> INFO: ----------------------------------------------------------------------
[12:28:36.196] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:28:36.196] <TB1> INFO: ----------------------------------------------------------------------
[12:28:39.681] <TB1> INFO: Test took 3482ms.
[12:28:39.708] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:39.951] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:28:39.951] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:28:39.951] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:28:39.961] <TB1> INFO: ######################################################################
[12:28:39.961] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:28:39.961] <TB1> INFO: ######################################################################
[12:28:39.966] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:28:39.981] <TB1> INFO: dacScan step from 0 .. 29
[12:29:01.361] <TB1> INFO: Test took 21380ms.
[12:29:01.398] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:01.398] <TB1> INFO: dacScan step from 30 .. 59
[12:29:22.950] <TB1> INFO: Test took 21552ms.
[12:29:23.004] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:23.006] <TB1> INFO: dacScan step from 60 .. 89
[12:29:50.873] <TB1> INFO: Test took 27867ms.
[12:29:51.150] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:51.211] <TB1> INFO: dacScan step from 90 .. 119
[12:30:20.506] <TB1> INFO: Test took 29295ms.
[12:30:20.763] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:20.842] <TB1> INFO: dacScan step from 120 .. 149
[12:30:48.334] <TB1> INFO: Test took 27492ms.
[12:30:48.647] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:14.885] <TB1> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[12:31:14.885] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0
[12:31:14.885] <TB1> INFO: separation cut (per ROC): 92 105 104 90 100 102 95 101 101 100 97 101 92 89 99 95
[12:31:14.954] <TB1> INFO: ######################################################################
[12:31:14.954] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[12:31:14.954] <TB1> INFO: ######################################################################
[12:31:14.954] <TB1> INFO: ----------------------------------------------------------------------
[12:31:14.954] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:31:14.954] <TB1> INFO: ----------------------------------------------------------------------
[12:31:14.954] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:31:14.962] <TB1> INFO: dacScan step from 0 .. 3
[12:31:32.602] <TB1> INFO: Test took 17640ms.
[12:31:32.636] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:32.636] <TB1> INFO: dacScan step from 4 .. 7
[12:31:51.082] <TB1> INFO: Test took 18446ms.
[12:31:51.110] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:51.110] <TB1> INFO: dacScan step from 8 .. 11
[12:32:10.143] <TB1> INFO: Test took 19033ms.
[12:32:10.173] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:10.173] <TB1> INFO: dacScan step from 12 .. 15
[12:32:29.331] <TB1> INFO: Test took 19158ms.
[12:32:29.362] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:29.362] <TB1> INFO: dacScan step from 16 .. 19
[12:32:48.571] <TB1> INFO: Test took 19209ms.
[12:32:48.601] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:48.601] <TB1> INFO: dacScan step from 20 .. 23
[12:33:07.812] <TB1> INFO: Test took 19211ms.
[12:33:07.839] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:07.839] <TB1> INFO: dacScan step from 24 .. 27
[12:33:27.028] <TB1> INFO: Test took 19189ms.
[12:33:27.062] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:27.062] <TB1> INFO: dacScan step from 28 .. 31
[12:33:46.359] <TB1> INFO: Test took 19297ms.
[12:33:46.388] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:46.388] <TB1> INFO: dacScan step from 32 .. 35
[12:34:05.564] <TB1> INFO: Test took 19176ms.
[12:34:05.595] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:05.595] <TB1> INFO: dacScan step from 36 .. 39
[12:34:24.811] <TB1> INFO: Test took 19216ms.
[12:34:24.840] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:24.840] <TB1> INFO: dacScan step from 40 .. 43
[12:34:44.066] <TB1> INFO: Test took 19226ms.
[12:34:44.097] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:44.097] <TB1> INFO: dacScan step from 44 .. 47
[12:35:03.328] <TB1> INFO: Test took 19231ms.
[12:35:03.358] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:03.358] <TB1> INFO: dacScan step from 48 .. 51
[12:35:20.948] <TB1> INFO: Test took 17590ms.
[12:35:20.976] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:20.976] <TB1> INFO: dacScan step from 52 .. 55
[12:35:40.073] <TB1> INFO: Test took 19097ms.
[12:35:40.104] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:40.104] <TB1> INFO: dacScan step from 56 .. 59
[12:35:58.028] <TB1> INFO: Test took 17924ms.
[12:35:58.055] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:58.055] <TB1> INFO: dacScan step from 60 .. 63
[12:36:15.950] <TB1> INFO: Test took 17895ms.
[12:36:15.977] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:15.977] <TB1> INFO: dacScan step from 64 .. 67
[12:36:33.773] <TB1> INFO: Test took 17795ms.
[12:36:33.802] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:33.802] <TB1> INFO: dacScan step from 68 .. 71
[12:36:52.595] <TB1> INFO: Test took 18793ms.
[12:36:52.622] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:52.622] <TB1> INFO: dacScan step from 72 .. 75
[12:37:11.819] <TB1> INFO: Test took 19197ms.
[12:37:11.853] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:11.853] <TB1> INFO: dacScan step from 76 .. 79
[12:37:31.112] <TB1> INFO: Test took 19259ms.
[12:37:31.146] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:31.146] <TB1> INFO: dacScan step from 80 .. 83
[12:37:51.124] <TB1> INFO: Test took 19978ms.
[12:37:51.186] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:51.188] <TB1> INFO: dacScan step from 84 .. 87
[12:38:12.366] <TB1> INFO: Test took 21178ms.
[12:38:12.455] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:12.459] <TB1> INFO: dacScan step from 88 .. 91
[12:38:34.956] <TB1> INFO: Test took 22497ms.
[12:38:35.065] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:35.071] <TB1> INFO: dacScan step from 92 .. 95
[12:38:59.583] <TB1> INFO: Test took 24512ms.
[12:38:59.758] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:59.771] <TB1> INFO: dacScan step from 96 .. 99
[12:39:26.820] <TB1> INFO: Test took 27049ms.
[12:39:27.021] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:27.030] <TB1> INFO: dacScan step from 100 .. 103
[12:39:55.683] <TB1> INFO: Test took 28652ms.
[12:39:55.922] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:55.935] <TB1> INFO: dacScan step from 104 .. 107


[12:40:25.167] <TB1> INFO: Test took 29232ms.
[12:40:25.461] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:25.475] <TB1> INFO: dacScan step from 108 .. 111


[12:40:55.274] <TB1> INFO: Test took 29799ms.
[12:40:55.574] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:55.589] <TB1> INFO: dacScan step from 112 .. 115


[12:41:25.458] <TB1> INFO: Test took 29869ms.
[12:41:25.734] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:25.748] <TB1> INFO: dacScan step from 116 .. 119
[12:41:55.377] <TB1> INFO: Test took 29628ms.
[12:41:55.622] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:55.637] <TB1> INFO: dacScan step from 120 .. 123


[12:42:25.223] <TB1> INFO: Test took 29586ms.
[12:42:25.470] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:25.486] <TB1> INFO: dacScan step from 124 .. 127


[12:42:55.052] <TB1> INFO: Test took 29566ms.
[12:42:55.282] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:55.295] <TB1> INFO: dacScan step from 128 .. 131



[12:43:24.812] <TB1> INFO: Test took 29517ms.
[12:43:25.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:25.125] <TB1> INFO: dacScan step from 132 .. 135





[12:43:54.924] <TB1> INFO: Test took 29799ms.
[12:43:55.174] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:55.186] <TB1> INFO: dacScan step from 136 .. 139
[12:44:24.757] <TB1> INFO: Test took 29571ms.
[12:44:25.014] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:25.030] <TB1> INFO: dacScan step from 140 .. 143
[12:44:54.701] <TB1> INFO: Test took 29671ms.
[12:44:54.994] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:55.010] <TB1> INFO: dacScan step from 144 .. 147
[12:45:24.748] <TB1> INFO: Test took 29738ms.
[12:45:24.973] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:24.994] <TB1> INFO: dacScan step from 148 .. 149
[12:45:41.107] <TB1> INFO: Test took 16113ms.
[12:45:41.232] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:41.240] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:42.713] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:44.154] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:45.803] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:47.333] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:48.924] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:50.431] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:52.094] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:53.610] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:55.183] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:56.726] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:58.352] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:45:59.892] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:46:01.496] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:46:03.135] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:46:04.708] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:46:06.423] <TB1> INFO: PixTestScurves::scurves() done
[12:46:06.423] <TB1> INFO: Vcal mean: 93.87 106.66 101.01 92.96 91.56 92.49 96.06 97.98 96.38 98.93 92.28 96.17 85.59 86.43 98.71 103.06
[12:46:06.423] <TB1> INFO: Vcal RMS: 5.10 5.56 5.66 7.10 5.44 4.73 5.93 5.48 5.02 6.40 4.55 5.41 5.47 4.86 5.42 5.05
[12:46:06.423] <TB1> INFO: PixTestScurves::fullTest() done, duration: 891 seconds
[12:46:06.507] <TB1> INFO: ######################################################################
[12:46:06.507] <TB1> INFO: PixTestTrim::doTest()
[12:46:06.507] <TB1> INFO: ######################################################################
[12:46:06.509] <TB1> INFO: ----------------------------------------------------------------------
[12:46:06.509] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:46:06.509] <TB1> INFO: ----------------------------------------------------------------------
[12:46:06.607] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:46:06.607] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:46:06.616] <TB1> INFO: dacScan step from 0 .. 19
[12:46:20.995] <TB1> INFO: Test took 14379ms.
[12:46:21.016] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:21.016] <TB1> INFO: dacScan step from 20 .. 39
[12:46:36.130] <TB1> INFO: Test took 15114ms.
[12:46:36.156] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:36.156] <TB1> INFO: dacScan step from 40 .. 59
[12:46:51.471] <TB1> INFO: Test took 15315ms.
[12:46:51.503] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:51.503] <TB1> INFO: dacScan step from 60 .. 79
[12:47:05.949] <TB1> INFO: Test took 14446ms.
[12:47:05.972] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:05.972] <TB1> INFO: dacScan step from 80 .. 99
[12:47:20.569] <TB1> INFO: Test took 14597ms.
[12:47:20.601] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:20.603] <TB1> INFO: dacScan step from 100 .. 119
[12:47:37.611] <TB1> INFO: Test took 17008ms.
[12:47:37.755] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:37.788] <TB1> INFO: dacScan step from 120 .. 139
[12:47:57.802] <TB1> INFO: Test took 20014ms.
[12:47:57.990] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:58.031] <TB1> INFO: dacScan step from 140 .. 159
[12:48:15.006] <TB1> INFO: Test took 16975ms.
[12:48:15.104] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:39.344] <TB1> INFO: ROC 0 VthrComp = 100
[12:48:39.344] <TB1> INFO: ROC 1 VthrComp = 104
[12:48:39.344] <TB1> INFO: ROC 2 VthrComp = 104
[12:48:39.344] <TB1> INFO: ROC 3 VthrComp = 94
[12:48:39.344] <TB1> INFO: ROC 4 VthrComp = 97
[12:48:39.344] <TB1> INFO: ROC 5 VthrComp = 99
[12:48:39.345] <TB1> INFO: ROC 6 VthrComp = 100
[12:48:39.345] <TB1> INFO: ROC 7 VthrComp = 98
[12:48:39.345] <TB1> INFO: ROC 8 VthrComp = 99
[12:48:39.345] <TB1> INFO: ROC 9 VthrComp = 100
[12:48:39.345] <TB1> INFO: ROC 10 VthrComp = 97
[12:48:39.345] <TB1> INFO: ROC 11 VthrComp = 100
[12:48:39.345] <TB1> INFO: ROC 12 VthrComp = 85
[12:48:39.345] <TB1> INFO: ROC 13 VthrComp = 92
[12:48:39.346] <TB1> INFO: ROC 14 VthrComp = 99
[12:48:39.346] <TB1> INFO: ROC 15 VthrComp = 104
[12:48:39.346] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:48:39.346] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:48:39.355] <TB1> INFO: dacScan step from 0 .. 19
[12:48:53.739] <TB1> INFO: Test took 14384ms.
[12:48:53.763] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:53.763] <TB1> INFO: dacScan step from 20 .. 39
[12:49:09.235] <TB1> INFO: Test took 15472ms.
[12:49:09.271] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:09.274] <TB1> INFO: dacScan step from 40 .. 59
[12:49:28.181] <TB1> INFO: Test took 18907ms.
[12:49:28.355] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:28.401] <TB1> INFO: dacScan step from 60 .. 79
[12:49:47.429] <TB1> INFO: Test took 19028ms.
[12:49:47.598] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:47.647] <TB1> INFO: dacScan step from 80 .. 99
[12:50:06.610] <TB1> INFO: Test took 18962ms.
[12:50:06.873] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:06.930] <TB1> INFO: dacScan step from 100 .. 119
[12:50:27.209] <TB1> INFO: Test took 20279ms.
[12:50:27.414] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:27.463] <TB1> INFO: dacScan step from 120 .. 139
[12:50:47.803] <TB1> INFO: Test took 20339ms.
[12:50:47.960] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:48.012] <TB1> INFO: dacScan step from 140 .. 159
[12:51:08.210] <TB1> INFO: Test took 20198ms.
[12:51:08.428] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:36.171] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 56.6412 for pixel 0/6 mean/min/max = 44.3306/31.7244/56.9367
[12:51:36.171] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 64.7994 for pixel 8/2 mean/min/max = 49.7338/34.6011/64.8665
[12:51:36.171] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 60.612 for pixel 15/79 mean/min/max = 47.2325/33.8478/60.6171
[12:51:36.172] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 62.1657 for pixel 10/76 mean/min/max = 46.8035/31.4278/62.1791
[12:51:36.172] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.4197 for pixel 0/3 mean/min/max = 44.9582/31.4305/58.4859
[12:51:36.172] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 56.3043 for pixel 1/10 mean/min/max = 44.1907/32.0253/56.3561
[12:51:36.173] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.4355 for pixel 10/79 mean/min/max = 44.9497/31.3341/58.5652
[12:51:36.173] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.1769 for pixel 7/0 mean/min/max = 46.1465/31.8886/60.4044
[12:51:36.174] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 57.6104 for pixel 18/22 mean/min/max = 44.895/32.1678/57.6222
[12:51:36.174] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.8979 for pixel 19/78 mean/min/max = 45.9816/32.0386/59.9245
[12:51:36.174] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 57.0997 for pixel 7/5 mean/min/max = 45.0396/32.8962/57.1831
[12:51:36.175] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 57.1274 for pixel 0/4 mean/min/max = 44.369/31.5405/57.1975
[12:51:36.175] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.1654 for pixel 13/2 mean/min/max = 46.2553/32.2764/60.2341
[12:51:36.175] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.0269 for pixel 0/49 mean/min/max = 45.1145/33.1607/57.0683
[12:51:36.176] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 60.5801 for pixel 3/3 mean/min/max = 46.3873/32.0995/60.6752
[12:51:36.176] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.9999 for pixel 19/79 mean/min/max = 46.8139/34.4586/59.1691
[12:51:36.176] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:53:07.551] <TB1> INFO: Test took 91375ms.
[12:53:09.020] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:53:09.029] <TB1> INFO: dacScan step from 0 .. 19
[12:53:32.054] <TB1> INFO: Test took 23025ms.
[12:53:32.110] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:32.112] <TB1> INFO: dacScan step from 20 .. 39
[12:54:01.034] <TB1> INFO: Test took 28922ms.
[12:54:01.265] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:01.298] <TB1> INFO: dacScan step from 40 .. 59


[12:54:34.691] <TB1> INFO: Test took 33393ms.
[12:54:34.971] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:35.018] <TB1> INFO: dacScan step from 60 .. 79



[12:55:08.377] <TB1> INFO: Test took 33359ms.
[12:55:08.654] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:08.703] <TB1> INFO: dacScan step from 80 .. 99

[12:55:42.170] <TB1> INFO: Test took 33467ms.
[12:55:42.471] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:42.523] <TB1> INFO: dacScan step from 100 .. 119

[12:56:15.967] <TB1> INFO: Test took 33444ms.
[12:56:16.239] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:16.286] <TB1> INFO: dacScan step from 120 .. 139


[12:56:49.556] <TB1> INFO: Test took 33270ms.
[12:56:49.827] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:49.874] <TB1> INFO: dacScan step from 140 .. 159

[12:57:23.205] <TB1> INFO: Test took 33331ms.
[12:57:23.487] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:23.545] <TB1> INFO: dacScan step from 160 .. 179


[12:57:56.936] <TB1> INFO: Test took 33391ms.
[12:57:57.241] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:57.297] <TB1> INFO: dacScan step from 180 .. 199



[12:58:31.713] <TB1> INFO: Test took 34416ms.
[12:58:32.031] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:00.584] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.013984 .. 255.000000
[12:59:00.665] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:59:00.674] <TB1> INFO: dacScan step from 0 .. 19
[12:59:14.343] <TB1> INFO: Test took 13669ms.
[12:59:14.371] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:14.371] <TB1> INFO: dacScan step from 20 .. 39
[12:59:29.317] <TB1> INFO: Test took 14946ms.
[12:59:29.421] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:29.441] <TB1> INFO: dacScan step from 40 .. 59
[12:59:47.322] <TB1> INFO: Test took 17881ms.
[12:59:47.495] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:47.547] <TB1> INFO: dacScan step from 60 .. 79
[13:00:05.392] <TB1> INFO: Test took 17845ms.
[13:00:05.555] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:05.608] <TB1> INFO: dacScan step from 80 .. 99
[13:00:22.213] <TB1> INFO: Test took 16605ms.
[13:00:22.362] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:22.416] <TB1> INFO: dacScan step from 100 .. 119
[13:00:39.175] <TB1> INFO: Test took 16758ms.
[13:00:39.327] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:39.381] <TB1> INFO: dacScan step from 120 .. 139
[13:00:56.054] <TB1> INFO: Test took 16673ms.
[13:00:56.287] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:56.370] <TB1> INFO: dacScan step from 140 .. 159
[13:01:14.307] <TB1> INFO: Test took 17937ms.
[13:01:14.460] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:14.510] <TB1> INFO: dacScan step from 160 .. 179
[13:01:32.406] <TB1> INFO: Test took 17895ms.
[13:01:32.566] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:32.617] <TB1> INFO: dacScan step from 180 .. 199
[13:01:51.349] <TB1> INFO: Test took 18732ms.
[13:01:51.571] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:51.651] <TB1> INFO: dacScan step from 200 .. 219
[13:02:09.635] <TB1> INFO: Test took 17984ms.
[13:02:09.794] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:09.842] <TB1> INFO: dacScan step from 220 .. 239
[13:02:27.761] <TB1> INFO: Test took 17919ms.
[13:02:27.900] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:27.946] <TB1> INFO: dacScan step from 240 .. 255
[13:02:42.871] <TB1> INFO: Test took 14925ms.
[13:02:42.989] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:15.769] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 13.866685 .. 46.525311
[13:03:15.864] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 56 (20) hits flags = 16 (plus default)
[13:03:15.873] <TB1> INFO: dacScan step from 3 .. 22
[13:03:29.418] <TB1> INFO: Test took 13545ms.
[13:03:29.449] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:29.449] <TB1> INFO: dacScan step from 23 .. 42
[13:03:44.947] <TB1> INFO: Test took 15498ms.
[13:03:45.055] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:45.080] <TB1> INFO: dacScan step from 43 .. 56
[13:03:58.482] <TB1> INFO: Test took 13402ms.
[13:03:58.590] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:13.847] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 16.428310 .. 41.870404
[13:04:13.922] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 6 .. 51 (20) hits flags = 16 (plus default)
[13:04:13.931] <TB1> INFO: dacScan step from 6 .. 25
[13:04:27.434] <TB1> INFO: Test took 13503ms.
[13:04:27.460] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:27.460] <TB1> INFO: dacScan step from 26 .. 45
[13:04:43.197] <TB1> INFO: Test took 15737ms.
[13:04:43.328] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:43.363] <TB1> INFO: dacScan step from 46 .. 51
[13:04:50.365] <TB1> INFO: Test took 7002ms.
[13:04:50.409] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:06.071] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 1.173788 .. 41.870404
[13:05:06.194] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 51 (20) hits flags = 16 (plus default)
[13:05:06.206] <TB1> INFO: dacScan step from 1 .. 20
[13:05:19.397] <TB1> INFO: Test took 13191ms.
[13:05:19.423] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:19.423] <TB1> INFO: dacScan step from 21 .. 40
[13:05:33.683] <TB1> INFO: Test took 14260ms.
[13:05:33.771] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:33.795] <TB1> INFO: dacScan step from 41 .. 51
[13:05:44.336] <TB1> INFO: Test took 10541ms.
[13:05:44.427] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:00.169] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:06:00.169] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:06:00.178] <TB1> INFO: dacScan step from 15 .. 34
[13:06:22.431] <TB1> INFO: Test took 22253ms.
[13:06:22.532] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:22.549] <TB1> INFO: dacScan step from 35 .. 54



[13:06:53.114] <TB1> INFO: Test took 30565ms.
[13:06:53.579] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:53.660] <TB1> INFO: dacScan step from 55 .. 55
[13:06:57.958] <TB1> INFO: Test took 4298ms.
[13:06:57.976] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:11.451] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:07:11.451] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:07:11.452] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:07:11.452] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:07:11.452] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:07:11.453] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:07:11.453] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:07:11.453] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:07:11.453] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:07:11.454] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:07:11.454] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:07:11.454] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:07:11.454] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:07:11.455] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:07:11.455] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:07:11.455] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:07:11.455] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C0.dat
[13:07:11.468] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C1.dat
[13:07:11.475] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C2.dat
[13:07:11.482] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C3.dat
[13:07:11.489] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C4.dat
[13:07:11.496] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C5.dat
[13:07:11.503] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C6.dat
[13:07:11.511] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C7.dat
[13:07:11.518] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C8.dat
[13:07:11.525] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C9.dat
[13:07:11.532] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C10.dat
[13:07:11.539] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C11.dat
[13:07:11.546] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C12.dat
[13:07:11.553] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C13.dat
[13:07:11.560] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C14.dat
[13:07:11.568] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//trimParameters35_C15.dat
[13:07:11.574] <TB1> INFO: PixTestTrim::trimTest() done
[13:07:11.574] <TB1> INFO: vtrim: 111 137 117 137 109 108 161 115 113 118 111 106 109 93 120 122
[13:07:11.574] <TB1> INFO: vthrcomp: 100 104 104 94 97 99 100 98 99 100 97 100 85 92 99 104
[13:07:11.574] <TB1> INFO: vcal mean: 35.07 35.14 35.10 35.06 35.05 35.09 35.06 35.09 35.06 35.15 35.10 35.04 35.11 35.04 35.10 35.14
[13:07:11.574] <TB1> INFO: vcal RMS: 1.08 1.11 1.05 1.11 1.09 1.13 1.31 1.11 1.09 1.12 1.07 1.07 1.05 1.00 1.07 1.07
[13:07:11.574] <TB1> INFO: bits mean: 10.17 8.61 8.98 9.89 9.86 10.56 11.50 9.72 10.30 9.82 10.21 9.93 9.78 9.49 10.01 9.21
[13:07:11.574] <TB1> INFO: bits RMS: 2.50 2.44 2.62 2.53 2.68 2.35 1.86 2.61 2.38 2.54 2.34 2.70 2.53 2.61 2.45 2.45
[13:07:11.584] <TB1> INFO: ----------------------------------------------------------------------
[13:07:11.585] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:07:11.585] <TB1> INFO: ----------------------------------------------------------------------
[13:07:11.589] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:07:11.607] <TB1> INFO: dacScan step from 0 .. 19
[13:07:32.995] <TB1> INFO: Test took 21388ms.
[13:07:33.052] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:33.052] <TB1> INFO: dacScan step from 20 .. 39
[13:07:54.320] <TB1> INFO: Test took 21267ms.
[13:07:54.356] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:54.356] <TB1> INFO: dacScan step from 40 .. 59
[13:08:16.279] <TB1> INFO: Test took 21910ms.
[13:08:16.317] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:16.317] <TB1> INFO: dacScan step from 60 .. 79
[13:08:38.543] <TB1> INFO: Test took 22226ms.
[13:08:38.584] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:38.584] <TB1> INFO: dacScan step from 80 .. 99
[13:09:01.375] <TB1> INFO: Test took 22791ms.
[13:09:01.419] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:01.419] <TB1> INFO: dacScan step from 100 .. 119
[13:09:25.355] <TB1> INFO: Test took 23936ms.
[13:09:25.472] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:25.483] <TB1> INFO: dacScan step from 120 .. 139
[13:09:55.960] <TB1> INFO: Test took 30477ms.
[13:09:56.266] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:56.305] <TB1> INFO: dacScan step from 140 .. 159
[13:10:29.874] <TB1> INFO: Test took 33569ms.
[13:10:30.173] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:30.221] <TB1> INFO: dacScan step from 160 .. 179


[13:11:03.735] <TB1> INFO: Test took 33514ms.
[13:11:04.020] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:04.067] <TB1> INFO: dacScan step from 180 .. 199
[13:11:38.367] <TB1> INFO: Test took 34300ms.
[13:11:38.695] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:09.106] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 173 (20) hits flags = 16 (plus default)
[13:12:09.115] <TB1> INFO: dacScan step from 0 .. 19
[13:12:32.074] <TB1> INFO: Test took 22959ms.
[13:12:32.113] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:32.113] <TB1> INFO: dacScan step from 20 .. 39
[13:12:55.075] <TB1> INFO: Test took 22962ms.
[13:12:55.116] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:55.116] <TB1> INFO: dacScan step from 40 .. 59
[13:13:18.055] <TB1> INFO: Test took 22939ms.
[13:13:18.091] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:18.091] <TB1> INFO: dacScan step from 60 .. 79
[13:13:40.961] <TB1> INFO: Test took 22870ms.
[13:13:41.000] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:41.000] <TB1> INFO: dacScan step from 80 .. 99
[13:14:04.122] <TB1> INFO: Test took 23121ms.
[13:14:04.173] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:04.175] <TB1> INFO: dacScan step from 100 .. 119
[13:14:30.000] <TB1> INFO: Test took 25825ms.
[13:14:30.288] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:30.322] <TB1> INFO: dacScan step from 120 .. 139


[13:15:01.307] <TB1> INFO: Test took 30985ms.
[13:15:01.657] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:01.711] <TB1> INFO: dacScan step from 140 .. 159

[13:15:35.331] <TB1> INFO: Test took 33620ms.
[13:15:35.681] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:35.739] <TB1> INFO: dacScan step from 160 .. 173
[13:15:59.911] <TB1> INFO: Test took 24173ms.
[13:16:00.159] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:26.547] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:16:26.556] <TB1> INFO: dacScan step from 0 .. 19
[13:16:49.455] <TB1> INFO: Test took 22899ms.
[13:16:49.494] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:49.494] <TB1> INFO: dacScan step from 20 .. 39
[13:17:12.241] <TB1> INFO: Test took 22747ms.
[13:17:12.277] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:12.277] <TB1> INFO: dacScan step from 40 .. 59
[13:17:35.227] <TB1> INFO: Test took 22950ms.
[13:17:35.267] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:35.267] <TB1> INFO: dacScan step from 60 .. 79
[13:17:58.351] <TB1> INFO: Test took 23084ms.
[13:17:58.390] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:58.390] <TB1> INFO: dacScan step from 80 .. 99
[13:18:21.417] <TB1> INFO: Test took 23027ms.
[13:18:21.471] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:21.473] <TB1> INFO: dacScan step from 100 .. 119
[13:18:47.572] <TB1> INFO: Test took 26099ms.
[13:18:47.858] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:47.893] <TB1> INFO: dacScan step from 120 .. 139
[13:19:18.967] <TB1> INFO: Test took 31074ms.
[13:19:19.293] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:19.341] <TB1> INFO: dacScan step from 140 .. 159


[13:19:52.894] <TB1> INFO: Test took 33553ms.
[13:19:53.172] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:19.264] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[13:20:19.273] <TB1> INFO: dacScan step from 0 .. 19
[13:20:42.125] <TB1> INFO: Test took 22852ms.
[13:20:42.166] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:42.166] <TB1> INFO: dacScan step from 20 .. 39
[13:21:05.050] <TB1> INFO: Test took 22884ms.
[13:21:05.092] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:05.092] <TB1> INFO: dacScan step from 40 .. 59
[13:21:28.042] <TB1> INFO: Test took 22950ms.
[13:21:28.081] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:28.081] <TB1> INFO: dacScan step from 60 .. 79
[13:21:51.058] <TB1> INFO: Test took 22977ms.
[13:21:51.095] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:51.095] <TB1> INFO: dacScan step from 80 .. 99
[13:22:14.308] <TB1> INFO: Test took 23213ms.
[13:22:14.358] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:14.359] <TB1> INFO: dacScan step from 100 .. 119
[13:22:41.136] <TB1> INFO: Test took 26777ms.
[13:22:41.376] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:41.407] <TB1> INFO: dacScan step from 120 .. 139



[13:23:11.772] <TB1> INFO: Test took 30364ms.
[13:23:12.212] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:12.265] <TB1> INFO: dacScan step from 140 .. 158





[13:23:44.243] <TB1> INFO: Test took 31978ms.
[13:23:44.513] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:10.051] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[13:24:10.060] <TB1> INFO: dacScan step from 0 .. 19
[13:24:33.113] <TB1> INFO: Test took 23053ms.
[13:24:33.152] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:33.152] <TB1> INFO: dacScan step from 20 .. 39
[13:24:55.980] <TB1> INFO: Test took 22828ms.
[13:24:56.015] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:56.015] <TB1> INFO: dacScan step from 40 .. 59
[13:25:18.917] <TB1> INFO: Test took 22902ms.
[13:25:18.968] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:18.968] <TB1> INFO: dacScan step from 60 .. 79
[13:25:41.933] <TB1> INFO: Test took 22965ms.
[13:25:41.972] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:41.972] <TB1> INFO: dacScan step from 80 .. 99
[13:26:04.858] <TB1> INFO: Test took 22886ms.
[13:26:04.908] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:04.910] <TB1> INFO: dacScan step from 100 .. 119
[13:26:32.725] <TB1> INFO: Test took 27815ms.
[13:26:32.934] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:32.964] <TB1> INFO: dacScan step from 120 .. 139

[13:27:04.086] <TB1> INFO: Test took 31122ms.
[13:27:04.387] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:04.432] <TB1> INFO: dacScan step from 140 .. 158
[13:27:33.562] <TB1> INFO: Test took 29130ms.
[13:27:33.990] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:58.086] <TB1> INFO: PixTestTrim::trimBitTest() done
[13:27:58.088] <TB1> INFO: PixTestTrim::doTest() done, duration: 2511 seconds
[13:27:58.750] <TB1> INFO: ######################################################################
[13:27:58.750] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:27:58.750] <TB1> INFO: ######################################################################
[13:28:02.201] <TB1> INFO: Test took 3449ms.
[13:28:02.227] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:05.885] <TB1> INFO: Test took 3458ms.
[13:28:05.959] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:09.463] <TB1> INFO: Test took 3488ms.
[13:28:09.542] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:09.551] <TB1> INFO: The DUT currently contains the following objects:
[13:28:09.551] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:09.551] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:09.551] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:09.551] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:09.551] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.551] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.552] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.552] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:09.552] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.662] <TB1> INFO: Test took 1110ms.
[13:28:10.663] <TB1> INFO: The DUT currently contains the following objects:
[13:28:10.663] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:10.663] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:10.663] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:10.663] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:10.664] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:10.664] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.775] <TB1> INFO: Test took 1110ms.
[13:28:11.776] <TB1> INFO: The DUT currently contains the following objects:
[13:28:11.776] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:11.776] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:11.776] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:11.776] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:11.776] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.776] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.776] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:11.777] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.888] <TB1> INFO: Test took 1111ms.
[13:28:12.892] <TB1> INFO: The DUT currently contains the following objects:
[13:28:12.892] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:12.892] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:12.892] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:12.892] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:12.892] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.892] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.893] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:12.893] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.001] <TB1> INFO: Test took 1108ms.
[13:28:14.004] <TB1> INFO: The DUT currently contains the following objects:
[13:28:14.004] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:14.004] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:14.004] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:14.004] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:14.004] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.004] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.004] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.004] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.004] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.004] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.004] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.004] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:14.005] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.114] <TB1> INFO: Test took 1109ms.
[13:28:15.116] <TB1> INFO: The DUT currently contains the following objects:
[13:28:15.116] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:15.116] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:15.116] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:15.116] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:15.116] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.116] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.116] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.116] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.116] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.116] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.116] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:15.117] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.228] <TB1> INFO: Test took 1111ms.
[13:28:16.229] <TB1> INFO: The DUT currently contains the following objects:
[13:28:16.229] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:16.229] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:16.229] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:16.229] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:16.229] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.229] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.230] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.230] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.230] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.230] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:16.230] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.340] <TB1> INFO: Test took 1110ms.
[13:28:17.342] <TB1> INFO: The DUT currently contains the following objects:
[13:28:17.342] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:17.342] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:17.342] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:17.342] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:17.342] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.342] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.343] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.343] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.343] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.343] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.343] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:17.343] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.453] <TB1> INFO: Test took 1110ms.
[13:28:18.454] <TB1> INFO: The DUT currently contains the following objects:
[13:28:18.455] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:18.455] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:18.455] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:18.455] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:18.455] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.455] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.455] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.455] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.455] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.455] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.455] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:18.456] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.564] <TB1> INFO: Test took 1108ms.
[13:28:19.566] <TB1> INFO: The DUT currently contains the following objects:
[13:28:19.566] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:19.566] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:19.566] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:19.566] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:19.566] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.566] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.566] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.566] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:19.567] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.677] <TB1> INFO: Test took 1110ms.
[13:28:20.679] <TB1> INFO: The DUT currently contains the following objects:
[13:28:20.679] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:20.679] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:20.679] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:20.679] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:20.679] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:20.679] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.791] <TB1> INFO: Test took 1111ms.
[13:28:21.793] <TB1> INFO: The DUT currently contains the following objects:
[13:28:21.793] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:21.793] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:21.793] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:21.793] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:21.793] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.793] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.794] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:21.794] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.898] <TB1> INFO: Test took 1104ms.
[13:28:22.899] <TB1> INFO: The DUT currently contains the following objects:
[13:28:22.899] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:22.899] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:22.899] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:22.899] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:22.899] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:22.899] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.010] <TB1> INFO: Test took 1111ms.
[13:28:24.012] <TB1> INFO: The DUT currently contains the following objects:
[13:28:24.012] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:24.012] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:24.012] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:24.012] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:24.012] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.012] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.013] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.013] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.013] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.013] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:24.013] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.123] <TB1> INFO: Test took 1110ms.
[13:28:25.125] <TB1> INFO: The DUT currently contains the following objects:
[13:28:25.125] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:25.125] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:25.125] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:25.125] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:25.125] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.125] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.126] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.126] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.126] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.126] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.126] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.126] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:25.126] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.235] <TB1> INFO: Test took 1109ms.
[13:28:26.237] <TB1> INFO: The DUT currently contains the following objects:
[13:28:26.237] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:26.237] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:28:26.237] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:28:26.237] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:28:26.237] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.237] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.237] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:26.238] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:28:27.350] <TB1> INFO: Test took 1112ms.
[13:28:27.355] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:09.229] <TB1> INFO: Test took 221874ms.
[13:32:10.731] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:54.029] <TB1> INFO: Test took 223298ms.
[13:35:56.061] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.068] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.076] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.083] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.091] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.098] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.106] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.114] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.122] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.129] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.137] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.145] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.152] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.160] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.167] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.174] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:56.182] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:35:56.189] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:35:56.245] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:35:56.245] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:35:56.245] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:35:56.245] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:35:56.245] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:35:56.245] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:35:56.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:35:59.565] <TB1> INFO: Test took 3314ms.
[13:36:03.132] <TB1> INFO: Test took 3292ms.
[13:36:06.767] <TB1> INFO: Test took 3355ms.
[13:36:07.100] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:08.016] <TB1> INFO: Test took 916ms.
[13:36:08.019] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:09.125] <TB1> INFO: Test took 1106ms.
[13:36:09.128] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:10.233] <TB1> INFO: Test took 1105ms.
[13:36:10.237] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:11.340] <TB1> INFO: Test took 1104ms.
[13:36:11.343] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:12.448] <TB1> INFO: Test took 1105ms.
[13:36:12.453] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:13.562] <TB1> INFO: Test took 1109ms.
[13:36:13.566] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:14.670] <TB1> INFO: Test took 1104ms.
[13:36:14.673] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:15.777] <TB1> INFO: Test took 1104ms.
[13:36:15.781] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:16.884] <TB1> INFO: Test took 1103ms.
[13:36:16.887] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:17.990] <TB1> INFO: Test took 1103ms.
[13:36:17.993] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:19.097] <TB1> INFO: Test took 1104ms.
[13:36:19.101] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:20.203] <TB1> INFO: Test took 1102ms.
[13:36:20.207] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:21.311] <TB1> INFO: Test took 1104ms.
[13:36:21.315] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:22.418] <TB1> INFO: Test took 1103ms.
[13:36:22.421] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:23.524] <TB1> INFO: Test took 1103ms.
[13:36:23.528] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:24.631] <TB1> INFO: Test took 1103ms.
[13:36:24.635] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:25.738] <TB1> INFO: Test took 1103ms.
[13:36:25.742] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:26.847] <TB1> INFO: Test took 1105ms.
[13:36:26.850] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:27.955] <TB1> INFO: Test took 1105ms.
[13:36:27.959] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:29.061] <TB1> INFO: Test took 1102ms.
[13:36:29.064] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:30.182] <TB1> INFO: Test took 1118ms.
[13:36:30.185] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:31.289] <TB1> INFO: Test took 1104ms.
[13:36:31.292] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:32.395] <TB1> INFO: Test took 1103ms.
[13:36:32.399] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:33.502] <TB1> INFO: Test took 1103ms.
[13:36:33.505] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:34.609] <TB1> INFO: Test took 1104ms.
[13:36:34.612] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:35.716] <TB1> INFO: Test took 1104ms.
[13:36:35.719] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:36.822] <TB1> INFO: Test took 1103ms.
[13:36:36.825] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:37.929] <TB1> INFO: Test took 1104ms.
[13:36:37.932] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:39.046] <TB1> INFO: Test took 1114ms.
[13:36:39.050] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:40.161] <TB1> INFO: Test took 1112ms.
[13:36:40.167] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:41.277] <TB1> INFO: Test took 1110ms.
[13:36:41.282] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:42.391] <TB1> INFO: Test took 1109ms.
[13:36:42.975] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 524 seconds
[13:36:42.975] <TB1> INFO: PH scale (per ROC): 84 61 84 80 78 78 76 70 76 73 78 75 76 79 78 85
[13:36:42.975] <TB1> INFO: PH offset (per ROC): 174 184 166 171 163 177 173 192 184 182 167 176 173 172 172 160
[13:36:43.155] <TB1> INFO: ######################################################################
[13:36:43.155] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:36:43.155] <TB1> INFO: ######################################################################
[13:36:43.166] <TB1> INFO: scanning low vcal = 10
[13:36:47.023] <TB1> INFO: Test took 3856ms.
[13:36:47.029] <TB1> INFO: scanning low vcal = 20
[13:36:50.890] <TB1> INFO: Test took 3861ms.
[13:36:50.896] <TB1> INFO: scanning low vcal = 30
[13:36:54.795] <TB1> INFO: Test took 3899ms.
[13:36:54.810] <TB1> INFO: scanning low vcal = 40
[13:36:59.183] <TB1> INFO: Test took 4373ms.
[13:36:59.254] <TB1> INFO: scanning low vcal = 50
[13:37:03.649] <TB1> INFO: Test took 4395ms.
[13:37:03.713] <TB1> INFO: scanning low vcal = 60
[13:37:08.092] <TB1> INFO: Test took 4378ms.
[13:37:08.156] <TB1> INFO: scanning low vcal = 70
[13:37:12.546] <TB1> INFO: Test took 4390ms.
[13:37:12.610] <TB1> INFO: scanning low vcal = 80
[13:37:16.994] <TB1> INFO: Test took 4384ms.
[13:37:17.057] <TB1> INFO: scanning low vcal = 90
[13:37:21.434] <TB1> INFO: Test took 4377ms.
[13:37:21.509] <TB1> INFO: scanning low vcal = 100
[13:37:25.901] <TB1> INFO: Test took 4392ms.
[13:37:25.971] <TB1> INFO: scanning low vcal = 110
[13:37:30.331] <TB1> INFO: Test took 4359ms.
[13:37:30.396] <TB1> INFO: scanning low vcal = 120
[13:37:34.754] <TB1> INFO: Test took 4358ms.
[13:37:34.820] <TB1> INFO: scanning low vcal = 130
[13:37:39.201] <TB1> INFO: Test took 4381ms.
[13:37:39.274] <TB1> INFO: scanning low vcal = 140
[13:37:43.640] <TB1> INFO: Test took 4366ms.
[13:37:43.706] <TB1> INFO: scanning low vcal = 150
[13:37:48.078] <TB1> INFO: Test took 4372ms.
[13:37:48.143] <TB1> INFO: scanning low vcal = 160
[13:37:52.526] <TB1> INFO: Test took 4383ms.
[13:37:52.593] <TB1> INFO: scanning low vcal = 170
[13:37:56.988] <TB1> INFO: Test took 4395ms.
[13:37:57.050] <TB1> INFO: scanning low vcal = 180
[13:38:01.411] <TB1> INFO: Test took 4361ms.
[13:38:01.477] <TB1> INFO: scanning low vcal = 190
[13:38:05.954] <TB1> INFO: Test took 4477ms.
[13:38:06.025] <TB1> INFO: scanning low vcal = 200
[13:38:10.415] <TB1> INFO: Test took 4390ms.
[13:38:10.484] <TB1> INFO: scanning low vcal = 210
[13:38:14.872] <TB1> INFO: Test took 4388ms.
[13:38:14.945] <TB1> INFO: scanning low vcal = 220
[13:38:19.316] <TB1> INFO: Test took 4371ms.
[13:38:19.385] <TB1> INFO: scanning low vcal = 230
[13:38:23.763] <TB1> INFO: Test took 4378ms.
[13:38:23.834] <TB1> INFO: scanning low vcal = 240
[13:38:28.246] <TB1> INFO: Test took 4412ms.
[13:38:28.314] <TB1> INFO: scanning low vcal = 250
[13:38:32.669] <TB1> INFO: Test took 4355ms.
[13:38:32.731] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[13:38:37.095] <TB1> INFO: Test took 4364ms.
[13:38:37.160] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[13:38:41.546] <TB1> INFO: Test took 4386ms.
[13:38:41.606] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[13:38:45.869] <TB1> INFO: Test took 4264ms.
[13:38:45.935] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[13:38:50.292] <TB1> INFO: Test took 4357ms.
[13:38:50.363] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:38:54.764] <TB1> INFO: Test took 4401ms.
[13:38:55.316] <TB1> INFO: PixTestGainPedestal::measure() done
[13:39:31.420] <TB1> INFO: PixTestGainPedestal::fit() done
[13:39:31.421] <TB1> INFO: non-linearity mean: 0.957 0.952 0.957 0.960 0.957 0.958 0.963 0.963 0.950 0.954 0.961 0.949 0.954 0.953 0.959 0.963
[13:39:31.421] <TB1> INFO: non-linearity RMS: 0.007 0.008 0.005 0.005 0.006 0.006 0.005 0.006 0.008 0.007 0.006 0.007 0.007 0.008 0.007 0.006
[13:39:31.421] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[13:39:31.447] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[13:39:31.473] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[13:39:31.500] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[13:39:31.523] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[13:39:31.549] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[13:39:31.576] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[13:39:31.602] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[13:39:31.626] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[13:39:31.649] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[13:39:31.672] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[13:39:31.693] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[13:39:31.712] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[13:39:31.731] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[13:39:31.750] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[13:39:31.769] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2070_FullQualification_2015-08-13_09h40m_1439451613//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[13:39:31.789] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[13:39:31.796] <TB1> INFO: enter test to run
[13:39:31.797] <TB1> INFO: test: exit no parameter change
[13:39:32.266] <TB1> QUIET: Connection to board 153 closed.
[13:39:32.346] <TB1> INFO: pXar: this is the end, my friend