[15:09:46.683] <TB3> INFO: *** Welcome to pxar ***
[15:09:46.683] <TB3> INFO: *** Today: 2015/08/31
[15:09:46.683] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C15.dat
[15:09:46.684] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:09:46.684] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//defaultMaskFile.dat
[15:09:46.684] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters_C15.dat
[15:09:46.765] <TB3> INFO: clk: 4
[15:09:46.765] <TB3> INFO: ctr: 4
[15:09:46.765] <TB3> INFO: sda: 19
[15:09:46.765] <TB3> INFO: tin: 9
[15:09:46.765] <TB3> INFO: level: 15
[15:09:46.765] <TB3> INFO: triggerdelay: 0
[15:09:46.765] <TB3> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[15:09:46.765] <TB3> INFO: Log level: INFO
[15:09:46.770] <TB3> INFO: Found DTB DTB_WZ4I6J
[15:09:46.779] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[15:09:46.782] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[15:09:46.784] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[15:09:48.310] <TB3> INFO: DUT info:
[15:09:48.311] <TB3> INFO: The DUT currently contains the following objects:
[15:09:48.311] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:48.311] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:48.311] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:48.311] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:09:48.311] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.311] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:48.713] <TB3> INFO: enter 'restricted' command line mode
[15:09:48.713] <TB3> INFO: enter test to run
[15:09:48.713] <TB3> INFO: test: pretest no parameter change
[15:09:48.713] <TB3> INFO: running: pretest
[15:09:48.718] <TB3> INFO: ######################################################################
[15:09:48.718] <TB3> INFO: PixTestPretest::doTest()
[15:09:48.718] <TB3> INFO: ######################################################################
[15:09:48.720] <TB3> INFO: ----------------------------------------------------------------------
[15:09:48.720] <TB3> INFO: PixTestPretest::programROC()
[15:09:48.720] <TB3> INFO: ----------------------------------------------------------------------
[15:10:06.739] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:10:06.739] <TB3> INFO: IA differences per ROC: 18.5 19.3 19.3 16.1 16.9 16.9 16.1 16.9 16.9 17.7 16.9 18.5 17.7 21.7 18.5 17.7
[15:10:06.831] <TB3> INFO: ----------------------------------------------------------------------
[15:10:06.831] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:10:06.831] <TB3> INFO: ----------------------------------------------------------------------
[15:10:26.400] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 377.8 mA = 23.6125 mA/ROC
[15:10:26.402] <TB3> INFO: ----------------------------------------------------------------------
[15:10:26.402] <TB3> INFO: PixTestPretest::findTiming()
[15:10:26.402] <TB3> INFO: ----------------------------------------------------------------------
[15:10:26.402] <TB3> INFO: PixTestCmd::init()

[15:12:18.495] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:12:18.495] <TB3> INFO: (success/tries = 100/100), width = 4
[15:12:18.497] <TB3> INFO: ----------------------------------------------------------------------
[15:12:18.497] <TB3> INFO: PixTestPretest::findWorkingPixel()
[15:12:18.497] <TB3> INFO: ----------------------------------------------------------------------
[15:12:18.634] <TB3> INFO: Expecting 231680 events.
[15:12:27.349] <TB3> INFO: 231680 events read in total (7999ms).
[15:12:27.353] <TB3> INFO: Test took 8853ms.
[15:12:27.669] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:12:27.708] <TB3> INFO: ----------------------------------------------------------------------
[15:12:27.708] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[15:12:27.708] <TB3> INFO: ----------------------------------------------------------------------
[15:12:27.846] <TB3> INFO: Expecting 231680 events.
[15:12:37.170] <TB3> INFO: 231680 events read in total (8608ms).
[15:12:37.174] <TB3> INFO: Test took 9460ms.
[15:12:37.482] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[15:12:37.482] <TB3> INFO: CalDel: 144 151 137 130 157 141 127 130 131 140 135 130 132 126 138 109
[15:12:37.482] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:12:37.485] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C0.dat
[15:12:37.485] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C1.dat
[15:12:37.486] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C2.dat
[15:12:37.486] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C3.dat
[15:12:37.486] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C4.dat
[15:12:37.486] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C5.dat
[15:12:37.486] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C6.dat
[15:12:37.487] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C7.dat
[15:12:37.487] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C8.dat
[15:12:37.487] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C9.dat
[15:12:37.488] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C10.dat
[15:12:37.488] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C11.dat
[15:12:37.488] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C12.dat
[15:12:37.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C13.dat
[15:12:37.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C14.dat
[15:12:37.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C15.dat
[15:12:37.489] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0a.dat
[15:12:37.490] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:12:37.490] <TB3> INFO: PixTestPretest::doTest() done, duration: 168 seconds
[15:12:37.559] <TB3> INFO: enter test to run
[15:12:37.559] <TB3> INFO: test: fulltest no parameter change
[15:12:37.559] <TB3> INFO: running: fulltest
[15:12:37.559] <TB3> INFO: ######################################################################
[15:12:37.559] <TB3> INFO: PixTestFullTest::doTest()
[15:12:37.559] <TB3> INFO: ######################################################################
[15:12:37.560] <TB3> INFO: ######################################################################
[15:12:37.560] <TB3> INFO: PixTestAlive::doTest()
[15:12:37.560] <TB3> INFO: ######################################################################
[15:12:37.562] <TB3> INFO: ----------------------------------------------------------------------
[15:12:37.562] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:37.562] <TB3> INFO: ----------------------------------------------------------------------
[15:12:37.900] <TB3> INFO: Expecting 41600 events.
[15:12:42.310] <TB3> INFO: 41600 events read in total (3694ms).
[15:12:42.310] <TB3> INFO: Test took 4746ms.
[15:12:42.329] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:42.614] <TB3> INFO: PixTestAlive::aliveTest() done
[15:12:42.614] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 3 0 0 1 0 0 0 0
[15:12:42.616] <TB3> INFO: ----------------------------------------------------------------------
[15:12:42.616] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:42.616] <TB3> INFO: ----------------------------------------------------------------------
[15:12:42.944] <TB3> INFO: Expecting 41600 events.
[15:12:46.120] <TB3> INFO: 41600 events read in total (2460ms).
[15:12:46.120] <TB3> INFO: Test took 3503ms.
[15:12:46.120] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:46.121] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:12:46.442] <TB3> INFO: PixTestAlive::maskTest() done
[15:12:46.442] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:46.444] <TB3> INFO: ----------------------------------------------------------------------
[15:12:46.444] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:46.444] <TB3> INFO: ----------------------------------------------------------------------
[15:12:46.769] <TB3> INFO: Expecting 41600 events.
[15:12:51.186] <TB3> INFO: 41600 events read in total (3700ms).
[15:12:51.187] <TB3> INFO: Test took 4742ms.
[15:12:51.192] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:51.486] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[15:12:51.486] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:51.487] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[15:12:51.498] <TB3> INFO: ######################################################################
[15:12:51.498] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:12:51.498] <TB3> INFO: ######################################################################
[15:12:51.501] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[15:12:51.514] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:12:51.514] <TB3> INFO: run 1 of 1
[15:12:51.821] <TB3> INFO: Expecting 3120000 events.
[15:13:27.836] <TB3> INFO: 866830 events read in total (35299ms).
[15:14:02.638] <TB3> INFO: 1722650 events read in total (70101ms).
[15:14:36.252] <TB3> INFO: 2589355 events read in total (103716ms).
[15:14:57.388] <TB3> INFO: 3120000 events read in total (124851ms).
[15:14:57.433] <TB3> INFO: Test took 125919ms.
[15:14:57.542] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:22.101] <TB3> INFO: PixTestBBMap::doTest() done, duration: 150 seconds
[15:15:22.101] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 3 0 0 0 0 0 0 3
[15:15:22.101] <TB3> INFO: separation cut (per ROC): 88 87 99 91 87 95 88 91 89 89 89 84 91 92 83 92
[15:15:22.174] <TB3> INFO: ######################################################################
[15:15:22.174] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:15:22.174] <TB3> INFO: ######################################################################
[15:15:22.174] <TB3> INFO: ----------------------------------------------------------------------
[15:15:22.174] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:15:22.174] <TB3> INFO: ----------------------------------------------------------------------
[15:15:22.175] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[15:15:22.183] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[15:15:22.183] <TB3> INFO: run 1 of 1
[15:15:22.490] <TB3> INFO: Expecting 31200000 events.
[15:15:47.647] <TB3> INFO: 996700 events read in total (24433ms).
[15:16:12.151] <TB3> INFO: 1978050 events read in total (48937ms).
[15:16:36.649] <TB3> INFO: 2956400 events read in total (73435ms).
[15:17:01.060] <TB3> INFO: 3935350 events read in total (97846ms).
[15:17:25.424] <TB3> INFO: 4910400 events read in total (122210ms).
[15:17:49.840] <TB3> INFO: 5884150 events read in total (146626ms).
[15:18:14.186] <TB3> INFO: 6857100 events read in total (170972ms).
[15:18:38.490] <TB3> INFO: 7830850 events read in total (195276ms).
[15:19:02.813] <TB3> INFO: 8799200 events read in total (219599ms).
[15:19:27.126] <TB3> INFO: 9770950 events read in total (243912ms).
[15:19:51.396] <TB3> INFO: 10739700 events read in total (268182ms).
[15:20:15.728] <TB3> INFO: 11710600 events read in total (292514ms).
[15:20:40.119] <TB3> INFO: 12679250 events read in total (316905ms).
[15:21:04.402] <TB3> INFO: 13641850 events read in total (341188ms).
[15:21:29.082] <TB3> INFO: 14609400 events read in total (365868ms).
[15:21:53.548] <TB3> INFO: 15571750 events read in total (390334ms).
[15:22:17.755] <TB3> INFO: 16525250 events read in total (414541ms).
[15:22:42.066] <TB3> INFO: 17479900 events read in total (438852ms).
[15:23:06.484] <TB3> INFO: 18429750 events read in total (463270ms).
[15:23:30.951] <TB3> INFO: 19379900 events read in total (487737ms).
[15:23:55.142] <TB3> INFO: 20328400 events read in total (511928ms).
[15:24:19.275] <TB3> INFO: 21276900 events read in total (536061ms).
[15:24:43.555] <TB3> INFO: 22227400 events read in total (560341ms).
[15:25:07.912] <TB3> INFO: 23171650 events read in total (584698ms).
[15:25:32.029] <TB3> INFO: 24119150 events read in total (608815ms).
[15:25:56.100] <TB3> INFO: 25063250 events read in total (632886ms).
[15:26:20.297] <TB3> INFO: 26008950 events read in total (657083ms).
[15:26:44.490] <TB3> INFO: 26953100 events read in total (681276ms).
[15:27:09.014] <TB3> INFO: 27899900 events read in total (705800ms).
[15:27:33.144] <TB3> INFO: 28849050 events read in total (729930ms).
[15:27:57.032] <TB3> INFO: 29795600 events read in total (753818ms).
[15:28:19.674] <TB3> INFO: 30749750 events read in total (776460ms).
[15:28:30.072] <TB3> INFO: 31200000 events read in total (786858ms).
[15:28:30.094] <TB3> INFO: Test took 787911ms.
[15:28:30.167] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:30.260] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:31.701] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:33.086] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:34.531] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:35.958] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:37.337] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:38.673] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:40.029] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:41.397] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:42.766] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:44.127] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:45.484] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:46.858] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:48.232] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:49.594] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:50.969] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:52.346] <TB3> INFO: PixTestScurves::scurves() done
[15:28:52.346] <TB3> INFO: Vcal mean: 96.99 98.53 101.87 102.68 96.51 103.48 99.14 93.04 95.40 97.20 97.41 91.24 87.95 91.97 90.73 101.68
[15:28:52.346] <TB3> INFO: Vcal RMS: 5.30 5.87 6.22 5.89 5.16 5.54 5.41 5.47 6.12 5.93 6.09 5.06 5.59 5.23 6.13 5.48
[15:28:52.346] <TB3> INFO: PixTestScurves::fullTest() done, duration: 810 seconds
[15:28:52.420] <TB3> INFO: ######################################################################
[15:28:52.420] <TB3> INFO: PixTestTrim::doTest()
[15:28:52.420] <TB3> INFO: ######################################################################
[15:28:52.421] <TB3> INFO: ----------------------------------------------------------------------
[15:28:52.421] <TB3> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[15:28:52.421] <TB3> INFO: ----------------------------------------------------------------------
[15:28:52.511] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:28:52.511] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:28:52.521] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:28:52.521] <TB3> INFO: run 1 of 1
[15:28:52.855] <TB3> INFO: Expecting 13312000 events.
[15:29:21.426] <TB3> INFO: 1106120 events read in total (27850ms).
[15:29:49.506] <TB3> INFO: 2209300 events read in total (55930ms).
[15:30:17.706] <TB3> INFO: 3310400 events read in total (84130ms).
[15:30:45.799] <TB3> INFO: 4408740 events read in total (112223ms).
[15:31:13.631] <TB3> INFO: 5503340 events read in total (140055ms).
[15:31:41.405] <TB3> INFO: 6594740 events read in total (167829ms).
[15:32:09.346] <TB3> INFO: 7691540 events read in total (195770ms).
[15:32:37.340] <TB3> INFO: 8788820 events read in total (223764ms).
[15:33:05.206] <TB3> INFO: 9889460 events read in total (251630ms).
[15:33:33.032] <TB3> INFO: 10990120 events read in total (279456ms).
[15:34:00.981] <TB3> INFO: 12091160 events read in total (307405ms).
[15:34:26.988] <TB3> INFO: 13197040 events read in total (333412ms).
[15:34:30.065] <TB3> INFO: 13312000 events read in total (336489ms).
[15:34:30.095] <TB3> INFO: Test took 337574ms.
[15:34:30.145] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:47.953] <TB3> INFO: ROC 0 VthrComp = 99
[15:34:47.953] <TB3> INFO: ROC 1 VthrComp = 96
[15:34:47.953] <TB3> INFO: ROC 2 VthrComp = 101
[15:34:47.953] <TB3> INFO: ROC 3 VthrComp = 99
[15:34:47.953] <TB3> INFO: ROC 4 VthrComp = 95
[15:34:47.953] <TB3> INFO: ROC 5 VthrComp = 101
[15:34:47.953] <TB3> INFO: ROC 6 VthrComp = 97
[15:34:47.954] <TB3> INFO: ROC 7 VthrComp = 97
[15:34:47.954] <TB3> INFO: ROC 8 VthrComp = 94
[15:34:47.954] <TB3> INFO: ROC 9 VthrComp = 94
[15:34:47.954] <TB3> INFO: ROC 10 VthrComp = 95
[15:34:47.954] <TB3> INFO: ROC 11 VthrComp = 92
[15:34:47.954] <TB3> INFO: ROC 12 VthrComp = 91
[15:34:47.954] <TB3> INFO: ROC 13 VthrComp = 97
[15:34:47.954] <TB3> INFO: ROC 14 VthrComp = 86
[15:34:47.955] <TB3> INFO: ROC 15 VthrComp = 102
[15:34:47.955] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:34:47.955] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:34:47.965] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:34:47.965] <TB3> INFO: run 1 of 1
[15:34:48.315] <TB3> INFO: Expecting 13312000 events.
[15:35:12.863] <TB3> INFO: 782620 events read in total (23832ms).
[15:35:35.424] <TB3> INFO: 1561460 events read in total (46393ms).
[15:35:58.442] <TB3> INFO: 2340520 events read in total (69411ms).
[15:36:20.971] <TB3> INFO: 3118800 events read in total (91940ms).
[15:36:44.840] <TB3> INFO: 3897240 events read in total (115809ms).
[15:37:09.800] <TB3> INFO: 4676520 events read in total (140769ms).
[15:37:34.623] <TB3> INFO: 5455020 events read in total (165592ms).
[15:37:59.614] <TB3> INFO: 6233500 events read in total (190583ms).
[15:38:24.144] <TB3> INFO: 7008900 events read in total (215113ms).
[15:38:48.895] <TB3> INFO: 7780380 events read in total (239864ms).
[15:39:13.713] <TB3> INFO: 8549560 events read in total (264682ms).
[15:39:38.598] <TB3> INFO: 9317580 events read in total (289567ms).
[15:40:03.617] <TB3> INFO: 10084580 events read in total (314586ms).
[15:40:28.557] <TB3> INFO: 10850640 events read in total (339526ms).
[15:40:53.210] <TB3> INFO: 11616300 events read in total (364179ms).
[15:41:18.078] <TB3> INFO: 12382400 events read in total (389047ms).
[15:41:41.198] <TB3> INFO: 13150020 events read in total (412168ms).
[15:41:46.383] <TB3> INFO: 13312000 events read in total (417352ms).
[15:41:46.428] <TB3> INFO: Test took 418463ms.
[15:41:46.584] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:09.844] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.7168 for pixel 48/66 mean/min/max = 44.7664/31.7855/57.7473
[15:42:09.844] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 61.0768 for pixel 31/3 mean/min/max = 46.7823/32.3812/61.1835
[15:42:09.844] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.6557 for pixel 20/79 mean/min/max = 46.9715/32.2671/61.676
[15:42:09.845] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 61.1226 for pixel 4/35 mean/min/max = 46.7464/32.1976/61.2952
[15:42:09.845] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.202 for pixel 13/3 mean/min/max = 45.3195/32.3459/58.2932
[15:42:09.845] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.9867 for pixel 0/38 mean/min/max = 46.845/32.4528/61.2373
[15:42:09.845] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 59.3728 for pixel 22/79 mean/min/max = 45.9318/32.4278/59.4358
[15:42:09.846] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.7244 for pixel 1/78 mean/min/max = 45.0182/32.1515/57.8849
[15:42:09.846] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.8954 for pixel 6/79 mean/min/max = 46.4173/32.8373/59.9972
[15:42:09.846] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.3934 for pixel 0/1 mean/min/max = 47.2268/31.862/62.5916
[15:42:09.846] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 59.0535 for pixel 16/17 mean/min/max = 45.6168/32.0237/59.21
[15:42:09.847] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 58.4241 for pixel 12/33 mean/min/max = 46.0723/33.7187/58.426
[15:42:09.847] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.17 for pixel 25/79 mean/min/max = 45.6206/32.0479/59.1934
[15:42:09.847] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.053 for pixel 0/60 mean/min/max = 44.6644/32.2741/57.0547
[15:42:09.847] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 62.4919 for pixel 3/44 mean/min/max = 47.4586/32.3783/62.5388
[15:42:09.848] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.6898 for pixel 25/4 mean/min/max = 45.5473/32.3569/58.7377
[15:42:09.848] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:42:09.980] <TB3> INFO: Expecting 1029120 events.
[15:42:33.752] <TB3> INFO: 1029120 events read in total (23056ms).
[15:42:33.757] <TB3> INFO: Expecting 1029120 events.
[15:42:57.669] <TB3> INFO: 1029120 events read in total (23368ms).
[15:42:57.679] <TB3> INFO: Expecting 1029120 events.
[15:43:21.506] <TB3> INFO: 1029120 events read in total (23299ms).
[15:43:21.519] <TB3> INFO: Expecting 1029120 events.
[15:43:45.234] <TB3> INFO: 1029120 events read in total (23180ms).
[15:43:45.246] <TB3> INFO: Expecting 1029120 events.
[15:44:08.707] <TB3> INFO: 1029120 events read in total (22926ms).
[15:44:08.720] <TB3> INFO: Expecting 1029120 events.
[15:44:32.361] <TB3> INFO: 1029120 events read in total (23104ms).
[15:44:32.376] <TB3> INFO: Expecting 1029120 events.
[15:44:55.886] <TB3> INFO: 1029120 events read in total (22972ms).
[15:44:55.904] <TB3> INFO: Expecting 1029120 events.
[15:45:19.559] <TB3> INFO: 1029120 events read in total (23127ms).
[15:45:19.578] <TB3> INFO: Expecting 1029120 events.
[15:45:43.386] <TB3> INFO: 1029120 events read in total (23281ms).
[15:45:43.408] <TB3> INFO: Expecting 1029120 events.
[15:46:06.985] <TB3> INFO: 1029120 events read in total (23046ms).
[15:46:07.009] <TB3> INFO: Expecting 1029120 events.
[15:46:30.680] <TB3> INFO: 1029120 events read in total (23138ms).
[15:46:30.707] <TB3> INFO: Expecting 1029120 events.
[15:46:54.286] <TB3> INFO: 1029120 events read in total (23052ms).
[15:46:54.315] <TB3> INFO: Expecting 1029120 events.
[15:47:18.037] <TB3> INFO: 1029120 events read in total (23195ms).
[15:47:18.073] <TB3> INFO: Expecting 1029120 events.
[15:47:41.822] <TB3> INFO: 1029120 events read in total (23221ms).
[15:47:41.855] <TB3> INFO: Expecting 1029120 events.
[15:48:05.450] <TB3> INFO: 1029120 events read in total (23068ms).
[15:48:05.481] <TB3> INFO: Expecting 1029120 events.
[15:48:29.195] <TB3> INFO: 1029120 events read in total (23186ms).
[15:48:29.238] <TB3> INFO: Test took 379390ms.
[15:48:30.265] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:48:30.274] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:48:30.274] <TB3> INFO: run 1 of 1
[15:48:30.593] <TB3> INFO: Expecting 16640000 events.
[15:48:55.499] <TB3> INFO: 725640 events read in total (24190ms).
[15:49:19.813] <TB3> INFO: 1448200 events read in total (48504ms).
[15:49:44.117] <TB3> INFO: 2170620 events read in total (72808ms).
[15:50:08.409] <TB3> INFO: 2893900 events read in total (97100ms).
[15:50:32.734] <TB3> INFO: 3615920 events read in total (121425ms).
[15:50:57.074] <TB3> INFO: 4338740 events read in total (145765ms).
[15:51:21.652] <TB3> INFO: 5061160 events read in total (170343ms).
[15:51:46.007] <TB3> INFO: 5784940 events read in total (194698ms).
[15:52:10.560] <TB3> INFO: 6507740 events read in total (219251ms).
[15:52:34.809] <TB3> INFO: 7229900 events read in total (243500ms).
[15:52:59.119] <TB3> INFO: 7952960 events read in total (267810ms).
[15:53:23.205] <TB3> INFO: 8673220 events read in total (291896ms).
[15:53:47.434] <TB3> INFO: 9390380 events read in total (316125ms).
[15:54:11.898] <TB3> INFO: 10106760 events read in total (340589ms).
[15:54:36.208] <TB3> INFO: 10822060 events read in total (364899ms).
[15:55:00.610] <TB3> INFO: 11536980 events read in total (389301ms).
[15:55:25.020] <TB3> INFO: 12250940 events read in total (413711ms).
[15:55:49.193] <TB3> INFO: 12963780 events read in total (437884ms).
[15:56:13.623] <TB3> INFO: 13677560 events read in total (462314ms).
[15:56:37.947] <TB3> INFO: 14389960 events read in total (486638ms).
[15:57:01.937] <TB3> INFO: 15103460 events read in total (510628ms).
[15:57:26.316] <TB3> INFO: 15815900 events read in total (535007ms).
[15:57:48.311] <TB3> INFO: 16530280 events read in total (557002ms).
[15:57:51.994] <TB3> INFO: 16640000 events read in total (560685ms).
[15:57:52.064] <TB3> INFO: Test took 561791ms.
[15:57:52.268] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:19.959] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.150327 .. 255.000000
[15:58:20.059] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[15:58:20.071] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:58:20.071] <TB3> INFO: run 1 of 1
[15:58:20.416] <TB3> INFO: Expecting 21299200 events.
[15:58:45.381] <TB3> INFO: 712340 events read in total (24248ms).
[15:59:09.515] <TB3> INFO: 1424980 events read in total (48382ms).
[15:59:33.751] <TB3> INFO: 2137200 events read in total (72618ms).
[15:59:58.174] <TB3> INFO: 2849840 events read in total (97041ms).
[16:00:22.326] <TB3> INFO: 3562500 events read in total (121194ms).
[16:00:44.709] <TB3> INFO: 4275020 events read in total (143576ms).
[16:01:09.148] <TB3> INFO: 4987760 events read in total (168015ms).
[16:01:33.377] <TB3> INFO: 5700540 events read in total (192244ms).
[16:01:57.698] <TB3> INFO: 6413060 events read in total (216565ms).
[16:02:21.996] <TB3> INFO: 7125540 events read in total (240863ms).
[16:02:46.283] <TB3> INFO: 7838240 events read in total (265150ms).
[16:03:09.116] <TB3> INFO: 8551580 events read in total (287983ms).
[16:03:33.108] <TB3> INFO: 9264120 events read in total (311975ms).
[16:03:57.345] <TB3> INFO: 9976740 events read in total (336212ms).
[16:04:21.603] <TB3> INFO: 10689780 events read in total (360470ms).
[16:04:45.826] <TB3> INFO: 11402920 events read in total (384693ms).
[16:05:08.496] <TB3> INFO: 12115460 events read in total (407363ms).
[16:05:30.492] <TB3> INFO: 12827940 events read in total (429359ms).
[16:05:52.795] <TB3> INFO: 13539720 events read in total (451662ms).
[16:06:14.552] <TB3> INFO: 14251400 events read in total (473419ms).
[16:06:36.939] <TB3> INFO: 14963240 events read in total (495806ms).
[16:07:01.086] <TB3> INFO: 15674720 events read in total (519953ms).
[16:07:25.156] <TB3> INFO: 16385700 events read in total (544023ms).
[16:07:49.010] <TB3> INFO: 17096800 events read in total (567877ms).
[16:08:13.258] <TB3> INFO: 17807920 events read in total (592125ms).
[16:08:35.683] <TB3> INFO: 18518380 events read in total (614551ms).
[16:09:00.029] <TB3> INFO: 19229380 events read in total (638896ms).
[16:09:24.110] <TB3> INFO: 19940300 events read in total (662977ms).
[16:09:48.267] <TB3> INFO: 20651500 events read in total (687134ms).
[16:10:10.205] <TB3> INFO: 21299200 events read in total (709072ms).
[16:10:10.292] <TB3> INFO: Test took 710220ms.
[16:10:10.611] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:37.600] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 16.130959 .. 96.114195
[16:10:37.702] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 6 .. 106 (-1/-1) hits flags = 16 (plus default)
[16:10:37.712] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:10:37.712] <TB3> INFO: run 1 of 1
[16:10:38.054] <TB3> INFO: Expecting 8403200 events.
[16:11:03.602] <TB3> INFO: 774740 events read in total (24831ms).
[16:11:28.743] <TB3> INFO: 1549180 events read in total (49972ms).
[16:11:53.673] <TB3> INFO: 2324040 events read in total (74902ms).
[16:12:18.845] <TB3> INFO: 3098440 events read in total (100074ms).
[16:12:43.665] <TB3> INFO: 3873260 events read in total (124894ms).
[16:13:07.532] <TB3> INFO: 4647700 events read in total (148761ms).
[16:13:30.596] <TB3> INFO: 5421620 events read in total (171825ms).
[16:13:55.465] <TB3> INFO: 6195360 events read in total (196694ms).
[16:14:20.076] <TB3> INFO: 6968660 events read in total (221305ms).
[16:14:45.553] <TB3> INFO: 7742020 events read in total (246782ms).
[16:15:06.897] <TB3> INFO: 8403200 events read in total (268126ms).
[16:15:06.929] <TB3> INFO: Test took 269217ms.
[16:15:07.031] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:15:28.131] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 2.094523 .. 84.517290
[16:15:28.228] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 2 .. 94 (-1/-1) hits flags = 16 (plus default)
[16:15:28.237] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:15:28.237] <TB3> INFO: run 1 of 1
[16:15:28.540] <TB3> INFO: Expecting 7737600 events.
[16:15:54.545] <TB3> INFO: 807220 events read in total (25286ms).
[16:16:19.792] <TB3> INFO: 1614400 events read in total (50533ms).
[16:16:44.853] <TB3> INFO: 2421540 events read in total (75594ms).
[16:17:10.208] <TB3> INFO: 3228740 events read in total (100949ms).
[16:17:33.495] <TB3> INFO: 4035980 events read in total (124236ms).
[16:17:58.879] <TB3> INFO: 4842920 events read in total (149620ms).
[16:18:24.023] <TB3> INFO: 5649740 events read in total (174764ms).
[16:18:49.364] <TB3> INFO: 6455820 events read in total (200105ms).
[16:19:14.507] <TB3> INFO: 7262260 events read in total (225248ms).
[16:19:29.663] <TB3> INFO: 7737600 events read in total (240404ms).
[16:19:29.689] <TB3> INFO: Test took 241452ms.
[16:19:29.770] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:19:50.294] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 9.992640 .. 63.710464
[16:19:50.376] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 9 .. 73 (-1/-1) hits flags = 16 (plus default)
[16:19:50.384] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:19:50.384] <TB3> INFO: run 1 of 1
[16:19:50.687] <TB3> INFO: Expecting 5408000 events.
[16:20:17.233] <TB3> INFO: 830200 events read in total (25830ms).
[16:20:42.681] <TB3> INFO: 1660340 events read in total (51278ms).
[16:21:07.467] <TB3> INFO: 2490460 events read in total (76064ms).
[16:21:31.266] <TB3> INFO: 3320160 events read in total (99863ms).
[16:21:56.735] <TB3> INFO: 4150240 events read in total (125332ms).
[16:22:22.160] <TB3> INFO: 4979920 events read in total (150757ms).
[16:22:35.569] <TB3> INFO: 5408000 events read in total (164166ms).
[16:22:35.588] <TB3> INFO: Test took 165204ms.
[16:22:35.640] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:22:50.593] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:22:50.593] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:22:50.602] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:22:50.602] <TB3> INFO: run 1 of 1
[16:22:50.919] <TB3> INFO: Expecting 3411200 events.
[16:23:17.791] <TB3> INFO: 878060 events read in total (26156ms).
[16:23:44.027] <TB3> INFO: 1756220 events read in total (52392ms).
[16:24:10.178] <TB3> INFO: 2634160 events read in total (78545ms).
[16:24:33.560] <TB3> INFO: 3411200 events read in total (101925ms).
[16:24:33.577] <TB3> INFO: Test took 102976ms.
[16:24:33.610] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:24:46.095] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:24:46.096] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:24:46.096] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:24:46.096] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:24:46.096] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:24:46.097] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:24:46.097] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:24:46.097] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:24:46.097] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:24:46.098] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:24:46.098] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:24:46.098] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:24:46.098] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:24:46.098] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:24:46.099] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:24:46.099] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:24:46.099] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:24:46.111] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:24:46.118] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:24:46.126] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:24:46.136] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:24:46.143] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:24:46.150] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:24:46.156] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:24:46.163] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:24:46.170] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:24:46.177] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:24:46.184] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:24:46.191] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:24:46.198] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:24:46.204] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:24:46.211] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:24:46.218] <TB3> INFO: PixTestTrim::trimTest() done
[16:24:46.218] <TB3> INFO: vtrim: 87 101 104 101 88 95 89 92 86 95 88 97 96 90 97 105
[16:24:46.218] <TB3> INFO: vthrcomp: 99 96 101 99 95 101 97 97 94 94 95 92 91 97 86 102
[16:24:46.218] <TB3> INFO: vcal mean: 34.94 34.98 34.98 34.96 35.00 34.95 34.96 34.99 34.91 35.00 34.94 34.97 34.96 34.96 35.00 34.93
[16:24:46.218] <TB3> INFO: vcal RMS: 0.74 0.75 0.72 0.76 0.90 0.74 0.71 0.73 1.06 0.74 0.74 0.89 0.68 0.67 0.78 0.75
[16:24:46.218] <TB3> INFO: bits mean: 9.56 9.10 8.68 9.10 9.49 8.89 8.86 9.39 8.91 8.61 9.20 8.97 9.15 9.18 8.62 9.32
[16:24:46.218] <TB3> INFO: bits RMS: 2.81 2.72 2.94 2.76 2.67 2.81 2.92 2.76 2.66 2.96 2.88 2.66 2.85 2.90 2.91 2.76
[16:24:46.225] <TB3> INFO: ----------------------------------------------------------------------
[16:24:46.225] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[16:24:46.225] <TB3> INFO: ----------------------------------------------------------------------
[16:24:46.228] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[16:24:46.240] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:24:46.240] <TB3> INFO: run 1 of 1
[16:24:46.573] <TB3> INFO: Expecting 8320000 events.
[16:25:15.336] <TB3> INFO: 969860 events read in total (28047ms).
[16:25:45.301] <TB3> INFO: 1929420 events read in total (58012ms).
[16:26:15.240] <TB3> INFO: 2884760 events read in total (87951ms).
[16:26:45.079] <TB3> INFO: 3836230 events read in total (117790ms).
[16:27:14.815] <TB3> INFO: 4779380 events read in total (147526ms).
[16:27:44.223] <TB3> INFO: 5717950 events read in total (176934ms).
[16:28:13.590] <TB3> INFO: 6655260 events read in total (206301ms).
[16:28:42.517] <TB3> INFO: 7592060 events read in total (235228ms).
[16:29:03.835] <TB3> INFO: 8320000 events read in total (256546ms).
[16:29:03.880] <TB3> INFO: Test took 257640ms.
[16:29:03.987] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:29.783] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 171 (-1/-1) hits flags = 16 (plus default)
[16:29:29.792] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:29:29.792] <TB3> INFO: run 1 of 1
[16:29:30.133] <TB3> INFO: Expecting 7155200 events.
[16:30:01.234] <TB3> INFO: 996680 events read in total (30381ms).
[16:30:31.395] <TB3> INFO: 1982930 events read in total (60542ms).
[16:31:01.611] <TB3> INFO: 2964910 events read in total (90758ms).
[16:31:31.548] <TB3> INFO: 3938430 events read in total (120695ms).
[16:32:01.485] <TB3> INFO: 4903550 events read in total (150632ms).
[16:32:31.431] <TB3> INFO: 5866250 events read in total (180578ms).
[16:33:01.194] <TB3> INFO: 6829700 events read in total (210341ms).
[16:33:11.528] <TB3> INFO: 7155200 events read in total (220675ms).
[16:33:11.556] <TB3> INFO: Test took 221764ms.
[16:33:11.632] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:33:35.919] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 160 (-1/-1) hits flags = 16 (plus default)
[16:33:35.927] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:33:35.927] <TB3> INFO: run 1 of 1
[16:33:36.254] <TB3> INFO: Expecting 6697600 events.
[16:34:07.652] <TB3> INFO: 1031360 events read in total (30682ms).
[16:34:38.226] <TB3> INFO: 2050790 events read in total (61256ms).
[16:35:08.320] <TB3> INFO: 3064020 events read in total (91350ms).
[16:35:36.392] <TB3> INFO: 4064840 events read in total (119422ms).
[16:36:04.569] <TB3> INFO: 5059250 events read in total (147599ms).
[16:36:32.584] <TB3> INFO: 6052240 events read in total (175614ms).
[16:36:52.096] <TB3> INFO: 6697600 events read in total (195126ms).
[16:36:52.123] <TB3> INFO: Test took 196196ms.
[16:36:52.187] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:37:14.648] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[16:37:14.659] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:37:14.659] <TB3> INFO: run 1 of 1
[16:37:14.971] <TB3> INFO: Expecting 6656000 events.
[16:37:46.769] <TB3> INFO: 1034030 events read in total (31082ms).
[16:38:17.333] <TB3> INFO: 2056460 events read in total (61646ms).
[16:38:47.811] <TB3> INFO: 3072660 events read in total (92124ms).
[16:39:18.314] <TB3> INFO: 4075270 events read in total (122627ms).
[16:39:48.484] <TB3> INFO: 5072240 events read in total (152797ms).
[16:40:18.554] <TB3> INFO: 6068310 events read in total (182867ms).
[16:40:36.366] <TB3> INFO: 6656000 events read in total (200679ms).
[16:40:36.395] <TB3> INFO: Test took 201735ms.
[16:40:36.462] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:40:58.250] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[16:40:58.259] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:40:58.260] <TB3> INFO: run 1 of 1
[16:40:58.588] <TB3> INFO: Expecting 6656000 events.
[16:41:29.932] <TB3> INFO: 1033280 events read in total (30628ms).
[16:41:58.422] <TB3> INFO: 2054610 events read in total (59119ms).
[16:42:28.596] <TB3> INFO: 3070010 events read in total (89293ms).
[16:42:59.048] <TB3> INFO: 4071760 events read in total (119744ms).
[16:43:29.374] <TB3> INFO: 5068020 events read in total (150070ms).
[16:43:59.891] <TB3> INFO: 6063000 events read in total (180587ms).
[16:44:18.146] <TB3> INFO: 6656000 events read in total (198842ms).
[16:44:18.182] <TB3> INFO: Test took 199922ms.
[16:44:18.247] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:40.819] <TB3> INFO: PixTestTrim::trimBitTest() done
[16:44:40.820] <TB3> INFO: PixTestTrim::doTest() done, duration: 4548 seconds
[16:44:41.486] <TB3> INFO: ######################################################################
[16:44:41.486] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:44:41.486] <TB3> INFO: ######################################################################
[16:44:41.793] <TB3> INFO: Expecting 41600 events.
[16:44:46.234] <TB3> INFO: 41600 events read in total (3724ms).
[16:44:46.235] <TB3> INFO: Test took 4747ms.
[16:44:46.242] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:46.830] <TB3> INFO: Expecting 41600 events.
[16:44:51.312] <TB3> INFO: 41600 events read in total (3766ms).
[16:44:51.312] <TB3> INFO: Test took 4810ms.
[16:44:51.319] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:51.671] <TB3> INFO: Expecting 41600 events.
[16:44:56.105] <TB3> INFO: 41600 events read in total (3717ms).
[16:44:56.105] <TB3> INFO: Test took 4758ms.
[16:44:56.111] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:56.118] <TB3> INFO: The DUT currently contains the following objects:
[16:44:56.118] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:44:56.118] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:44:56.118] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:44:56.118] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:44:56.118] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.118] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.118] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.118] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.118] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.118] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.119] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:56.459] <TB3> INFO: Expecting 2560 events.
[16:44:57.527] <TB3> INFO: 2560 events read in total (352ms).
[16:44:57.527] <TB3> INFO: Test took 1408ms.
[16:44:57.528] <TB3> INFO: The DUT currently contains the following objects:
[16:44:57.528] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:44:57.528] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:44:57.528] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:44:57.528] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:44:57.528] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.528] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.529] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.529] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.529] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.529] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.529] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.529] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:57.942] <TB3> INFO: Expecting 2560 events.
[16:44:59.014] <TB3> INFO: 2560 events read in total (355ms).
[16:44:59.014] <TB3> INFO: Test took 1485ms.
[16:44:59.015] <TB3> INFO: The DUT currently contains the following objects:
[16:44:59.015] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:44:59.015] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:44:59.015] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:44:59.015] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:44:59.015] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.015] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:44:59.429] <TB3> INFO: Expecting 2560 events.
[16:45:00.498] <TB3> INFO: 2560 events read in total (353ms).
[16:45:00.498] <TB3> INFO: Test took 1483ms.
[16:45:00.498] <TB3> INFO: The DUT currently contains the following objects:
[16:45:00.498] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:00.499] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:00.499] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:00.499] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:00.499] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.499] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:00.914] <TB3> INFO: Expecting 2560 events.
[16:45:01.981] <TB3> INFO: 2560 events read in total (351ms).
[16:45:01.981] <TB3> INFO: Test took 1482ms.
[16:45:01.982] <TB3> INFO: The DUT currently contains the following objects:
[16:45:01.982] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:01.982] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:01.982] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:01.982] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:01.982] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.982] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.983] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:01.983] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:02.396] <TB3> INFO: Expecting 2560 events.
[16:45:03.468] <TB3> INFO: 2560 events read in total (355ms).
[16:45:03.468] <TB3> INFO: Test took 1485ms.
[16:45:03.468] <TB3> INFO: The DUT currently contains the following objects:
[16:45:03.468] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:03.468] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:03.469] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:03.469] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:03.469] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.469] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:03.883] <TB3> INFO: Expecting 2560 events.
[16:45:04.950] <TB3> INFO: 2560 events read in total (350ms).
[16:45:04.950] <TB3> INFO: Test took 1481ms.
[16:45:04.951] <TB3> INFO: The DUT currently contains the following objects:
[16:45:04.951] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:04.951] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:04.951] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:04.951] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:04.951] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.951] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.952] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.952] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.952] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.952] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.952] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:04.952] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:05.365] <TB3> INFO: Expecting 2560 events.
[16:45:06.432] <TB3> INFO: 2560 events read in total (351ms).
[16:45:06.432] <TB3> INFO: Test took 1480ms.
[16:45:06.433] <TB3> INFO: The DUT currently contains the following objects:
[16:45:06.433] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:06.433] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:06.433] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:06.433] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:06.433] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.433] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:06.848] <TB3> INFO: Expecting 2560 events.
[16:45:07.916] <TB3> INFO: 2560 events read in total (352ms).
[16:45:07.916] <TB3> INFO: Test took 1483ms.
[16:45:07.916] <TB3> INFO: The DUT currently contains the following objects:
[16:45:07.916] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:07.916] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:07.916] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:07.916] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:07.916] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:07.917] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:08.331] <TB3> INFO: Expecting 2560 events.
[16:45:09.398] <TB3> INFO: 2560 events read in total (351ms).
[16:45:09.399] <TB3> INFO: Test took 1482ms.
[16:45:09.400] <TB3> INFO: The DUT currently contains the following objects:
[16:45:09.400] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:09.400] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:09.400] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:09.400] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:09.400] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.400] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.400] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.400] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.400] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.400] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.401] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:09.814] <TB3> INFO: Expecting 2560 events.
[16:45:10.883] <TB3> INFO: 2560 events read in total (353ms).
[16:45:10.884] <TB3> INFO: Test took 1483ms.
[16:45:10.884] <TB3> INFO: The DUT currently contains the following objects:
[16:45:10.884] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:10.884] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:10.884] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:10.884] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:10.885] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:10.885] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:11.299] <TB3> INFO: Expecting 2560 events.
[16:45:12.369] <TB3> INFO: 2560 events read in total (354ms).
[16:45:12.370] <TB3> INFO: Test took 1485ms.
[16:45:12.370] <TB3> INFO: The DUT currently contains the following objects:
[16:45:12.370] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:12.370] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:12.370] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:12.370] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:12.371] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.371] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:12.784] <TB3> INFO: Expecting 2560 events.
[16:45:13.855] <TB3> INFO: 2560 events read in total (355ms).
[16:45:13.855] <TB3> INFO: Test took 1484ms.
[16:45:13.856] <TB3> INFO: The DUT currently contains the following objects:
[16:45:13.856] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:13.856] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:13.856] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:13.856] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:13.856] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:13.856] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:14.270] <TB3> INFO: Expecting 2560 events.
[16:45:15.337] <TB3> INFO: 2560 events read in total (350ms).
[16:45:15.338] <TB3> INFO: Test took 1482ms.
[16:45:15.338] <TB3> INFO: The DUT currently contains the following objects:
[16:45:15.338] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:15.338] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:15.338] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:15.338] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:15.338] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.338] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.338] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.338] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.338] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.338] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.338] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.338] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.339] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:15.753] <TB3> INFO: Expecting 2560 events.
[16:45:16.821] <TB3> INFO: 2560 events read in total (352ms).
[16:45:16.821] <TB3> INFO: Test took 1482ms.
[16:45:16.826] <TB3> INFO: The DUT currently contains the following objects:
[16:45:16.826] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:16.826] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:16.826] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:16.826] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:16.826] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.826] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.827] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.827] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:16.827] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:17.236] <TB3> INFO: Expecting 2560 events.
[16:45:18.304] <TB3> INFO: 2560 events read in total (352ms).
[16:45:18.305] <TB3> INFO: Test took 1478ms.
[16:45:18.305] <TB3> INFO: The DUT currently contains the following objects:
[16:45:18.305] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:45:18.305] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:45:18.305] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:45:18.305] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:45:18.305] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.305] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:45:18.719] <TB3> INFO: Expecting 2560 events.
[16:45:19.789] <TB3> INFO: 2560 events read in total (353ms).
[16:45:19.789] <TB3> INFO: Test took 1484ms.
[16:45:19.796] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:45:20.206] <TB3> INFO: Expecting 655360 events.
[16:45:36.903] <TB3> INFO: 655360 events read in total (15980ms).
[16:45:36.913] <TB3> INFO: Expecting 655360 events.
[16:45:52.015] <TB3> INFO: 655360 events read in total (14574ms).
[16:45:52.027] <TB3> INFO: Expecting 655360 events.
[16:46:07.001] <TB3> INFO: 655360 events read in total (14446ms).
[16:46:07.016] <TB3> INFO: Expecting 655360 events.
[16:46:21.940] <TB3> INFO: 655360 events read in total (14396ms).
[16:46:21.958] <TB3> INFO: Expecting 655360 events.
[16:46:36.883] <TB3> INFO: 655360 events read in total (14397ms).
[16:46:36.905] <TB3> INFO: Expecting 655360 events.
[16:46:51.826] <TB3> INFO: 655360 events read in total (14393ms).
[16:46:51.851] <TB3> INFO: Expecting 655360 events.
[16:47:06.658] <TB3> INFO: 655360 events read in total (14279ms).
[16:47:06.686] <TB3> INFO: Expecting 655360 events.
[16:47:21.503] <TB3> INFO: 655360 events read in total (14289ms).
[16:47:21.535] <TB3> INFO: Expecting 655360 events.
[16:47:36.398] <TB3> INFO: 655360 events read in total (14335ms).
[16:47:36.431] <TB3> INFO: Expecting 655360 events.
[16:47:51.444] <TB3> INFO: 655360 events read in total (14485ms).
[16:47:51.483] <TB3> INFO: Expecting 655360 events.
[16:48:06.496] <TB3> INFO: 655360 events read in total (14486ms).
[16:48:06.536] <TB3> INFO: Expecting 655360 events.
[16:48:21.527] <TB3> INFO: 655360 events read in total (14463ms).
[16:48:21.570] <TB3> INFO: Expecting 655360 events.
[16:48:36.499] <TB3> INFO: 655360 events read in total (14400ms).
[16:48:36.547] <TB3> INFO: Expecting 655360 events.
[16:48:51.521] <TB3> INFO: 655360 events read in total (14446ms).
[16:48:51.572] <TB3> INFO: Expecting 655360 events.
[16:49:06.441] <TB3> INFO: 655360 events read in total (14341ms).
[16:49:06.495] <TB3> INFO: Expecting 655360 events.
[16:49:21.450] <TB3> INFO: 655360 events read in total (14427ms).
[16:49:21.506] <TB3> INFO: Test took 241710ms.
[16:49:21.583] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:49:21.891] <TB3> INFO: Expecting 655360 events.
[16:49:37.037] <TB3> INFO: 655360 events read in total (14430ms).
[16:49:37.045] <TB3> INFO: Expecting 655360 events.
[16:49:52.054] <TB3> INFO: 655360 events read in total (14481ms).
[16:49:52.066] <TB3> INFO: Expecting 655360 events.
[16:50:07.027] <TB3> INFO: 655360 events read in total (14434ms).
[16:50:07.042] <TB3> INFO: Expecting 655360 events.
[16:50:21.890] <TB3> INFO: 655360 events read in total (14320ms).
[16:50:21.908] <TB3> INFO: Expecting 655360 events.
[16:50:36.809] <TB3> INFO: 655360 events read in total (14373ms).
[16:50:36.831] <TB3> INFO: Expecting 655360 events.
[16:50:51.815] <TB3> INFO: 655360 events read in total (14457ms).
[16:50:51.839] <TB3> INFO: Expecting 655360 events.
[16:51:06.760] <TB3> INFO: 655360 events read in total (14393ms).
[16:51:06.790] <TB3> INFO: Expecting 655360 events.
[16:51:21.507] <TB3> INFO: 655360 events read in total (14189ms).
[16:51:21.540] <TB3> INFO: Expecting 655360 events.
[16:51:36.405] <TB3> INFO: 655360 events read in total (14337ms).
[16:51:36.440] <TB3> INFO: Expecting 655360 events.
[16:51:51.298] <TB3> INFO: 655360 events read in total (14330ms).
[16:51:51.335] <TB3> INFO: Expecting 655360 events.
[16:52:06.348] <TB3> INFO: 655360 events read in total (14485ms).
[16:52:06.388] <TB3> INFO: Expecting 655360 events.
[16:52:21.324] <TB3> INFO: 655360 events read in total (14408ms).
[16:52:21.370] <TB3> INFO: Expecting 655360 events.
[16:52:36.268] <TB3> INFO: 655360 events read in total (14371ms).
[16:52:36.316] <TB3> INFO: Expecting 655360 events.
[16:52:51.278] <TB3> INFO: 655360 events read in total (14434ms).
[16:52:51.331] <TB3> INFO: Expecting 655360 events.
[16:53:06.385] <TB3> INFO: 655360 events read in total (14526ms).
[16:53:06.439] <TB3> INFO: Expecting 655360 events.
[16:53:21.369] <TB3> INFO: 655360 events read in total (14402ms).
[16:53:21.428] <TB3> INFO: Test took 239845ms.
[16:53:21.605] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.612] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.619] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.626] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.633] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.640] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.647] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.654] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.661] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.668] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.675] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.682] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.689] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.696] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.703] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.710] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:53:21.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:53:21.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:53:22.051] <TB3> INFO: Expecting 41600 events.
[16:53:26.331] <TB3> INFO: 41600 events read in total (3563ms).
[16:53:26.332] <TB3> INFO: Test took 4579ms.
[16:53:26.872] <TB3> INFO: Expecting 41600 events.
[16:53:31.149] <TB3> INFO: 41600 events read in total (3561ms).
[16:53:31.150] <TB3> INFO: Test took 4575ms.
[16:53:31.692] <TB3> INFO: Expecting 41600 events.
[16:53:36.014] <TB3> INFO: 41600 events read in total (3606ms).
[16:53:36.015] <TB3> INFO: Test took 4621ms.
[16:53:36.258] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:36.391] <TB3> INFO: Expecting 2560 events.
[16:53:37.455] <TB3> INFO: 2560 events read in total (348ms).
[16:53:37.455] <TB3> INFO: Test took 1197ms.
[16:53:37.457] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:37.871] <TB3> INFO: Expecting 2560 events.
[16:53:38.933] <TB3> INFO: 2560 events read in total (345ms).
[16:53:38.933] <TB3> INFO: Test took 1476ms.
[16:53:38.935] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:39.349] <TB3> INFO: Expecting 2560 events.
[16:53:40.411] <TB3> INFO: 2560 events read in total (346ms).
[16:53:40.411] <TB3> INFO: Test took 1476ms.
[16:53:40.413] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:40.827] <TB3> INFO: Expecting 2560 events.
[16:53:41.888] <TB3> INFO: 2560 events read in total (345ms).
[16:53:41.888] <TB3> INFO: Test took 1475ms.
[16:53:41.890] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:42.304] <TB3> INFO: Expecting 2560 events.
[16:53:43.368] <TB3> INFO: 2560 events read in total (347ms).
[16:53:43.368] <TB3> INFO: Test took 1478ms.
[16:53:43.370] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:43.784] <TB3> INFO: Expecting 2560 events.
[16:53:44.845] <TB3> INFO: 2560 events read in total (345ms).
[16:53:44.846] <TB3> INFO: Test took 1476ms.
[16:53:44.847] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:45.261] <TB3> INFO: Expecting 2560 events.
[16:53:46.323] <TB3> INFO: 2560 events read in total (345ms).
[16:53:46.323] <TB3> INFO: Test took 1476ms.
[16:53:46.325] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:46.739] <TB3> INFO: Expecting 2560 events.
[16:53:47.801] <TB3> INFO: 2560 events read in total (346ms).
[16:53:47.801] <TB3> INFO: Test took 1476ms.
[16:53:47.803] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:48.217] <TB3> INFO: Expecting 2560 events.
[16:53:49.278] <TB3> INFO: 2560 events read in total (345ms).
[16:53:49.279] <TB3> INFO: Test took 1476ms.
[16:53:49.280] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:49.695] <TB3> INFO: Expecting 2560 events.
[16:53:50.756] <TB3> INFO: 2560 events read in total (345ms).
[16:53:50.756] <TB3> INFO: Test took 1476ms.
[16:53:50.758] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:51.173] <TB3> INFO: Expecting 2560 events.
[16:53:52.235] <TB3> INFO: 2560 events read in total (346ms).
[16:53:52.235] <TB3> INFO: Test took 1477ms.
[16:53:52.251] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:52.652] <TB3> INFO: Expecting 2560 events.
[16:53:53.714] <TB3> INFO: 2560 events read in total (346ms).
[16:53:53.715] <TB3> INFO: Test took 1464ms.
[16:53:53.716] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:54.131] <TB3> INFO: Expecting 2560 events.
[16:53:55.194] <TB3> INFO: 2560 events read in total (346ms).
[16:53:55.194] <TB3> INFO: Test took 1478ms.
[16:53:55.196] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:55.611] <TB3> INFO: Expecting 2560 events.
[16:53:56.674] <TB3> INFO: 2560 events read in total (347ms).
[16:53:56.674] <TB3> INFO: Test took 1479ms.
[16:53:56.676] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:57.090] <TB3> INFO: Expecting 2560 events.
[16:53:58.152] <TB3> INFO: 2560 events read in total (345ms).
[16:53:58.152] <TB3> INFO: Test took 1476ms.
[16:53:58.154] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:58.568] <TB3> INFO: Expecting 2560 events.
[16:53:59.630] <TB3> INFO: 2560 events read in total (346ms).
[16:53:59.630] <TB3> INFO: Test took 1476ms.
[16:53:59.632] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:00.046] <TB3> INFO: Expecting 2560 events.
[16:54:01.108] <TB3> INFO: 2560 events read in total (346ms).
[16:54:01.108] <TB3> INFO: Test took 1476ms.
[16:54:01.110] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:01.524] <TB3> INFO: Expecting 2560 events.
[16:54:02.586] <TB3> INFO: 2560 events read in total (346ms).
[16:54:02.586] <TB3> INFO: Test took 1476ms.
[16:54:02.588] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:03.002] <TB3> INFO: Expecting 2560 events.
[16:54:04.064] <TB3> INFO: 2560 events read in total (346ms).
[16:54:04.065] <TB3> INFO: Test took 1477ms.
[16:54:04.068] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:04.480] <TB3> INFO: Expecting 2560 events.
[16:54:05.541] <TB3> INFO: 2560 events read in total (345ms).
[16:54:05.542] <TB3> INFO: Test took 1474ms.
[16:54:05.545] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:05.957] <TB3> INFO: Expecting 2560 events.
[16:54:07.034] <TB3> INFO: 2560 events read in total (360ms).
[16:54:07.035] <TB3> INFO: Test took 1491ms.
[16:54:07.037] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:07.450] <TB3> INFO: Expecting 2560 events.
[16:54:08.513] <TB3> INFO: 2560 events read in total (346ms).
[16:54:08.513] <TB3> INFO: Test took 1476ms.
[16:54:08.515] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:08.930] <TB3> INFO: Expecting 2560 events.
[16:54:09.993] <TB3> INFO: 2560 events read in total (346ms).
[16:54:09.993] <TB3> INFO: Test took 1478ms.
[16:54:09.995] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:10.410] <TB3> INFO: Expecting 2560 events.
[16:54:11.472] <TB3> INFO: 2560 events read in total (346ms).
[16:54:11.472] <TB3> INFO: Test took 1477ms.
[16:54:11.476] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:11.889] <TB3> INFO: Expecting 2560 events.
[16:54:12.951] <TB3> INFO: 2560 events read in total (346ms).
[16:54:12.951] <TB3> INFO: Test took 1476ms.
[16:54:12.954] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:13.368] <TB3> INFO: Expecting 2560 events.
[16:54:14.431] <TB3> INFO: 2560 events read in total (346ms).
[16:54:14.431] <TB3> INFO: Test took 1477ms.
[16:54:14.434] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:14.848] <TB3> INFO: Expecting 2560 events.
[16:54:15.911] <TB3> INFO: 2560 events read in total (347ms).
[16:54:15.911] <TB3> INFO: Test took 1477ms.
[16:54:15.913] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:16.328] <TB3> INFO: Expecting 2560 events.
[16:54:17.392] <TB3> INFO: 2560 events read in total (348ms).
[16:54:17.393] <TB3> INFO: Test took 1480ms.
[16:54:17.395] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:17.809] <TB3> INFO: Expecting 2560 events.
[16:54:18.886] <TB3> INFO: 2560 events read in total (360ms).
[16:54:18.886] <TB3> INFO: Test took 1491ms.
[16:54:18.888] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:19.303] <TB3> INFO: Expecting 2560 events.
[16:54:20.365] <TB3> INFO: 2560 events read in total (346ms).
[16:54:20.366] <TB3> INFO: Test took 1478ms.
[16:54:20.368] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:20.782] <TB3> INFO: Expecting 2560 events.
[16:54:21.844] <TB3> INFO: 2560 events read in total (346ms).
[16:54:21.844] <TB3> INFO: Test took 1477ms.
[16:54:21.847] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:54:22.261] <TB3> INFO: Expecting 2560 events.
[16:54:23.324] <TB3> INFO: 2560 events read in total (346ms).
[16:54:23.324] <TB3> INFO: Test took 1478ms.
[16:54:23.933] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 582 seconds
[16:54:23.933] <TB3> INFO: PH scale (per ROC): 67 62 68 67 68 70 68 79 75 72 79 75 75 81 74 77
[16:54:23.933] <TB3> INFO: PH offset (per ROC): 184 179 187 200 171 192 197 173 176 188 179 166 164 173 181 186
[16:54:24.097] <TB3> INFO: ######################################################################
[16:54:24.097] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:54:24.097] <TB3> INFO: ######################################################################
[16:54:24.108] <TB3> INFO: scanning low vcal = 10
[16:54:24.406] <TB3> INFO: Expecting 41600 events.
[16:54:27.949] <TB3> INFO: 41600 events read in total (2826ms).
[16:54:27.949] <TB3> INFO: Test took 3841ms.
[16:54:27.951] <TB3> INFO: scanning low vcal = 20
[16:54:28.365] <TB3> INFO: Expecting 41600 events.
[16:54:31.893] <TB3> INFO: 41600 events read in total (2811ms).
[16:54:31.893] <TB3> INFO: Test took 3943ms.
[16:54:31.895] <TB3> INFO: scanning low vcal = 30
[16:54:32.310] <TB3> INFO: Expecting 41600 events.
[16:54:35.876] <TB3> INFO: 41600 events read in total (2849ms).
[16:54:35.876] <TB3> INFO: Test took 3981ms.
[16:54:35.879] <TB3> INFO: scanning low vcal = 40
[16:54:36.288] <TB3> INFO: Expecting 41600 events.
[16:54:40.313] <TB3> INFO: 41600 events read in total (3309ms).
[16:54:40.314] <TB3> INFO: Test took 4435ms.
[16:54:40.317] <TB3> INFO: scanning low vcal = 50
[16:54:40.675] <TB3> INFO: Expecting 41600 events.
[16:54:44.691] <TB3> INFO: 41600 events read in total (3299ms).
[16:54:44.691] <TB3> INFO: Test took 4374ms.
[16:54:44.695] <TB3> INFO: scanning low vcal = 60
[16:54:45.055] <TB3> INFO: Expecting 41600 events.
[16:54:49.076] <TB3> INFO: 41600 events read in total (3305ms).
[16:54:49.077] <TB3> INFO: Test took 4382ms.
[16:54:49.079] <TB3> INFO: scanning low vcal = 70
[16:54:49.439] <TB3> INFO: Expecting 41600 events.
[16:54:53.454] <TB3> INFO: 41600 events read in total (3298ms).
[16:54:53.455] <TB3> INFO: Test took 4376ms.
[16:54:53.458] <TB3> INFO: scanning low vcal = 80
[16:54:53.818] <TB3> INFO: Expecting 41600 events.
[16:54:57.831] <TB3> INFO: 41600 events read in total (3298ms).
[16:54:57.832] <TB3> INFO: Test took 4374ms.
[16:54:57.835] <TB3> INFO: scanning low vcal = 90
[16:54:58.195] <TB3> INFO: Expecting 41600 events.
[16:55:02.342] <TB3> INFO: 41600 events read in total (3430ms).
[16:55:02.343] <TB3> INFO: Test took 4508ms.
[16:55:02.346] <TB3> INFO: scanning low vcal = 100
[16:55:02.705] <TB3> INFO: Expecting 41600 events.
[16:55:06.714] <TB3> INFO: 41600 events read in total (3292ms).
[16:55:06.715] <TB3> INFO: Test took 4369ms.
[16:55:06.718] <TB3> INFO: scanning low vcal = 110
[16:55:07.078] <TB3> INFO: Expecting 41600 events.
[16:55:11.101] <TB3> INFO: 41600 events read in total (3307ms).
[16:55:11.102] <TB3> INFO: Test took 4384ms.
[16:55:11.105] <TB3> INFO: scanning low vcal = 120
[16:55:11.465] <TB3> INFO: Expecting 41600 events.
[16:55:15.475] <TB3> INFO: 41600 events read in total (3294ms).
[16:55:15.476] <TB3> INFO: Test took 4371ms.
[16:55:15.479] <TB3> INFO: scanning low vcal = 130
[16:55:15.838] <TB3> INFO: Expecting 41600 events.
[16:55:19.845] <TB3> INFO: 41600 events read in total (3291ms).
[16:55:19.846] <TB3> INFO: Test took 4367ms.
[16:55:19.849] <TB3> INFO: scanning low vcal = 140
[16:55:20.208] <TB3> INFO: Expecting 41600 events.
[16:55:24.221] <TB3> INFO: 41600 events read in total (3297ms).
[16:55:24.222] <TB3> INFO: Test took 4373ms.
[16:55:24.225] <TB3> INFO: scanning low vcal = 150
[16:55:24.584] <TB3> INFO: Expecting 41600 events.
[16:55:28.615] <TB3> INFO: 41600 events read in total (3315ms).
[16:55:28.615] <TB3> INFO: Test took 4390ms.
[16:55:28.619] <TB3> INFO: scanning low vcal = 160
[16:55:28.978] <TB3> INFO: Expecting 41600 events.
[16:55:33.001] <TB3> INFO: 41600 events read in total (3306ms).
[16:55:33.001] <TB3> INFO: Test took 4382ms.
[16:55:33.005] <TB3> INFO: scanning low vcal = 170
[16:55:33.364] <TB3> INFO: Expecting 41600 events.
[16:55:37.373] <TB3> INFO: 41600 events read in total (3293ms).
[16:55:37.374] <TB3> INFO: Test took 4369ms.
[16:55:37.377] <TB3> INFO: scanning low vcal = 180
[16:55:37.736] <TB3> INFO: Expecting 41600 events.
[16:55:41.761] <TB3> INFO: 41600 events read in total (3308ms).
[16:55:41.762] <TB3> INFO: Test took 4384ms.
[16:55:41.764] <TB3> INFO: scanning low vcal = 190
[16:55:42.125] <TB3> INFO: Expecting 41600 events.
[16:55:46.135] <TB3> INFO: 41600 events read in total (3294ms).
[16:55:46.135] <TB3> INFO: Test took 4371ms.
[16:55:46.138] <TB3> INFO: scanning low vcal = 200
[16:55:46.498] <TB3> INFO: Expecting 41600 events.
[16:55:50.521] <TB3> INFO: 41600 events read in total (3307ms).
[16:55:50.521] <TB3> INFO: Test took 4383ms.
[16:55:50.524] <TB3> INFO: scanning low vcal = 210
[16:55:50.884] <TB3> INFO: Expecting 41600 events.
[16:55:54.909] <TB3> INFO: 41600 events read in total (3309ms).
[16:55:54.909] <TB3> INFO: Test took 4385ms.
[16:55:54.912] <TB3> INFO: scanning low vcal = 220
[16:55:55.273] <TB3> INFO: Expecting 41600 events.
[16:55:59.280] <TB3> INFO: 41600 events read in total (3291ms).
[16:55:59.280] <TB3> INFO: Test took 4368ms.
[16:55:59.284] <TB3> INFO: scanning low vcal = 230
[16:55:59.643] <TB3> INFO: Expecting 41600 events.
[16:56:03.646] <TB3> INFO: 41600 events read in total (3286ms).
[16:56:03.647] <TB3> INFO: Test took 4363ms.
[16:56:03.649] <TB3> INFO: scanning low vcal = 240
[16:56:04.009] <TB3> INFO: Expecting 41600 events.
[16:56:08.063] <TB3> INFO: 41600 events read in total (3338ms).
[16:56:08.064] <TB3> INFO: Test took 4415ms.
[16:56:08.067] <TB3> INFO: scanning low vcal = 250
[16:56:08.426] <TB3> INFO: Expecting 41600 events.
[16:56:12.467] <TB3> INFO: 41600 events read in total (3325ms).
[16:56:12.468] <TB3> INFO: Test took 4401ms.
[16:56:12.472] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[16:56:12.831] <TB3> INFO: Expecting 41600 events.
[16:56:16.873] <TB3> INFO: 41600 events read in total (3326ms).
[16:56:16.873] <TB3> INFO: Test took 4401ms.
[16:56:16.876] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[16:56:17.235] <TB3> INFO: Expecting 41600 events.
[16:56:21.263] <TB3> INFO: 41600 events read in total (3312ms).
[16:56:21.263] <TB3> INFO: Test took 4387ms.
[16:56:21.266] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[16:56:21.625] <TB3> INFO: Expecting 41600 events.
[16:56:25.662] <TB3> INFO: 41600 events read in total (3321ms).
[16:56:25.662] <TB3> INFO: Test took 4396ms.
[16:56:25.665] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[16:56:26.025] <TB3> INFO: Expecting 41600 events.
[16:56:30.147] <TB3> INFO: 41600 events read in total (3406ms).
[16:56:30.148] <TB3> INFO: Test took 4483ms.
[16:56:30.150] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:56:30.509] <TB3> INFO: Expecting 41600 events.
[16:56:34.550] <TB3> INFO: 41600 events read in total (3325ms).
[16:56:34.551] <TB3> INFO: Test took 4401ms.
[16:56:34.984] <TB3> INFO: PixTestGainPedestal::measure() done
[16:57:06.186] <TB3> INFO: PixTestGainPedestal::fit() done
[16:57:06.186] <TB3> INFO: non-linearity mean: 0.960 0.962 0.955 0.956 0.964 0.956 0.957 0.963 0.959 0.958 0.957 0.961 0.957 0.961 0.967 0.964
[16:57:06.186] <TB3> INFO: non-linearity RMS: 0.008 0.005 0.007 0.008 0.006 0.006 0.008 0.006 0.006 0.007 0.007 0.007 0.006 0.006 0.005 0.005
[16:57:06.186] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:57:06.204] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:57:06.221] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:57:06.239] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:57:06.256] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:57:06.274] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:57:06.291] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:57:06.309] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:57:06.326] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:57:06.343] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:57:06.361] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:57:06.378] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:57:06.396] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:57:06.413] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:57:06.431] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:57:06.448] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:57:06.466] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 162 seconds
[16:57:06.472] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:57:06.473] <TB3> INFO: PixTestReadback::doTest() start.
[16:57:06.474] <TB3> INFO: PixTestReadback::RES sent once
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:57:17.721] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:57:17.722] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:57:17.722] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:57:17.722] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:57:17.722] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:57:17.722] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:57:17.753] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:57:17.754] <TB3> INFO: PixTestReadback::RES sent once
[16:57:28.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:57:28.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:57:28.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:57:28.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:57:28.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:57:28.991] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:57:28.992] <TB3> INFO: PixTestReadback::RES sent once
[16:57:37.605] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:57:37.605] <TB3> INFO: Vbg will be calibrated using Vd calibration
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 148.6calibrated Vbg = 1.21335 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.9calibrated Vbg = 1.21515 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 160.9calibrated Vbg = 1.21584 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 147.2calibrated Vbg = 1.22221 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153calibrated Vbg = 1.23478 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.3calibrated Vbg = 1.22876 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.8calibrated Vbg = 1.23543 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.3calibrated Vbg = 1.23118 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.9calibrated Vbg = 1.23216 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.8calibrated Vbg = 1.22724 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159.9calibrated Vbg = 1.22931 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.1calibrated Vbg = 1.22008 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 148.7calibrated Vbg = 1.21446 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155calibrated Vbg = 1.21451 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.8calibrated Vbg = 1.21704 :::*/*/*/*/
[16:57:37.605] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 148.9calibrated Vbg = 1.22147 :::*/*/*/*/
[16:57:37.607] <TB3> INFO: PixTestReadback::RES sent once
[17:00:32.149] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[17:00:32.154] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[17:00:32.155] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[17:00:32.155] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[17:00:32.155] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[17:00:32.155] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[17:00:32.155] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[17:00:32.155] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[17:00:32.186] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[17:00:32.187] <TB3> INFO: PixTestReadback::doTest() done
[17:00:32.203] <TB3> INFO: enter test to run
[17:00:32.203] <TB3> INFO: test: exit no parameter change
[17:00:32.863] <TB3> QUIET: Connection to board 170 closed.
[17:00:32.942] <TB3> INFO: pXar: this is the end, my friend