[19:17:22.931] <TB1> INFO: *** Welcome to pxar ***
[19:17:22.931] <TB1> INFO: *** Today: 2016/11/15
[19:17:22.937] <TB1> INFO: *** Version: c8ba-dirty
[19:17:22.937] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C15.dat
[19:17:22.937] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//tbmParameters_C1b.dat
[19:17:22.937] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//defaultMaskFile.dat
[19:17:22.937] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters_C15.dat
[19:17:22.992] <TB1> INFO: clk: 4
[19:17:22.992] <TB1> INFO: ctr: 4
[19:17:22.992] <TB1> INFO: sda: 19
[19:17:22.992] <TB1> INFO: tin: 9
[19:17:22.992] <TB1> INFO: level: 15
[19:17:22.992] <TB1> INFO: triggerdelay: 0
[19:17:22.992] <TB1> QUIET: Instanciating API for pxar v2.1.0+875~gda35c4c
[19:17:22.992] <TB1> INFO: Log level: INFO
[19:17:22.999] <TB1> INFO: Found DTB DTB_WXBYFL
[19:17:23.010] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[19:17:23.012] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[19:17:23.013] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[19:17:24.497] <TB1> INFO: DUT info:
[19:17:24.497] <TB1> INFO: The DUT currently contains the following objects:
[19:17:24.497] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[19:17:24.497] <TB1> INFO: TBM Core alpha (0): 7 registers set
[19:17:24.497] <TB1> INFO: TBM Core beta (1): 7 registers set
[19:17:24.497] <TB1> INFO: TBM Core alpha (2): 7 registers set
[19:17:24.497] <TB1> INFO: TBM Core beta (3): 7 registers set
[19:17:24.497] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[19:17:24.497] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.497] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[19:17:24.898] <TB1> INFO: enter 'restricted' command line mode
[19:17:24.898] <TB1> INFO: enter test to run
[19:17:24.898] <TB1> INFO: test: pretest no parameter change
[19:17:24.898] <TB1> INFO: running: pretest
[19:17:25.434] <TB1> INFO: ######################################################################
[19:17:25.434] <TB1> INFO: PixTestPretest::doTest()
[19:17:25.434] <TB1> INFO: ######################################################################
[19:17:25.435] <TB1> INFO: ----------------------------------------------------------------------
[19:17:25.435] <TB1> INFO: PixTestPretest::programROC()
[19:17:25.435] <TB1> INFO: ----------------------------------------------------------------------
[19:17:43.448] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[19:17:43.448] <TB1> INFO: IA differences per ROC: 16.1 17.7 17.7 18.5 19.3 18.5 17.7 19.3 15.3 17.7 16.9 19.3 18.5 18.5 18.5 19.3
[19:17:43.481] <TB1> INFO: ----------------------------------------------------------------------
[19:17:43.481] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[19:17:43.481] <TB1> INFO: ----------------------------------------------------------------------
[19:18:04.708] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 380.2 mA = 23.7625 mA/ROC
[19:18:04.708] <TB1> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 20.1 19.3 20.1 20.9 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 18.4
[19:18:04.734] <TB1> INFO: ----------------------------------------------------------------------
[19:18:04.734] <TB1> INFO: PixTestPretest::findTiming()
[19:18:04.734] <TB1> INFO: ----------------------------------------------------------------------
[19:18:04.734] <TB1> INFO: PixTestCmd::init()
[19:18:05.289] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!
[19:18:36.047] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[19:18:36.047] <TB1> INFO: (success/tries = 100/100), width = 4
[19:18:37.548] <TB1> INFO: ----------------------------------------------------------------------
[19:18:37.548] <TB1> INFO: PixTestPretest::findWorkingPixel()
[19:18:37.548] <TB1> INFO: ----------------------------------------------------------------------
[19:18:37.639] <TB1> INFO: Expecting 231680 events.
[19:18:47.546] <TB1> INFO: 231680 events read in total (9315ms).
[19:18:47.553] <TB1> INFO: Test took 10003ms.
[19:18:47.799] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[19:18:47.828] <TB1> INFO: ----------------------------------------------------------------------
[19:18:47.828] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[19:18:47.828] <TB1> INFO: ----------------------------------------------------------------------
[19:18:47.920] <TB1> INFO: Expecting 231680 events.
[19:18:57.670] <TB1> INFO: 231680 events read in total (9158ms).
[19:18:57.677] <TB1> INFO: Test took 9845ms.
[19:18:57.931] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[19:18:57.931] <TB1> INFO: CalDel: 81 76 98 75 83 83 72 91 96 99 119 100 105 95 111 82
[19:18:57.931] <TB1> INFO: VthrComp: 51 51 52 54 51 51 51 52 51 51 52 51 52 51 51 54
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C0.dat
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C1.dat
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C2.dat
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C3.dat
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C4.dat
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C5.dat
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C6.dat
[19:18:57.933] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C7.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C8.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C9.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C10.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C11.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C12.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C13.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C14.dat
[19:18:57.934] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters_C15.dat
[19:18:57.934] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//tbmParameters_C0a.dat
[19:18:57.934] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//tbmParameters_C0b.dat
[19:18:57.934] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//tbmParameters_C1a.dat
[19:18:57.934] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//tbmParameters_C1b.dat
[19:18:57.934] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[19:18:58.034] <TB1> INFO: enter test to run
[19:18:58.034] <TB1> INFO: test: FullTest no parameter change
[19:18:58.034] <TB1> INFO: running: fulltest
[19:18:58.034] <TB1> INFO: ######################################################################
[19:18:58.034] <TB1> INFO: PixTestFullTest::doTest()
[19:18:58.034] <TB1> INFO: ######################################################################
[19:18:58.035] <TB1> INFO: ######################################################################
[19:18:58.035] <TB1> INFO: PixTestAlive::doTest()
[19:18:58.035] <TB1> INFO: ######################################################################
[19:18:58.036] <TB1> INFO: ----------------------------------------------------------------------
[19:18:58.036] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:18:58.036] <TB1> INFO: ----------------------------------------------------------------------
[19:18:58.271] <TB1> INFO: Expecting 41600 events.
[19:19:01.848] <TB1> INFO: 41600 events read in total (2985ms).
[19:19:01.848] <TB1> INFO: Test took 3810ms.
[19:19:02.072] <TB1> INFO: PixTestAlive::aliveTest() done
[19:19:02.072] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
[19:19:02.074] <TB1> INFO: ----------------------------------------------------------------------
[19:19:02.074] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:19:02.074] <TB1> INFO: ----------------------------------------------------------------------
[19:19:02.307] <TB1> INFO: Expecting 41600 events.
[19:19:05.242] <TB1> INFO: 41600 events read in total (2343ms).
[19:19:05.242] <TB1> INFO: Test took 3167ms.
[19:19:05.243] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[19:19:05.478] <TB1> INFO: PixTestAlive::maskTest() done
[19:19:05.478] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:19:05.479] <TB1> INFO: ----------------------------------------------------------------------
[19:19:05.479] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:19:05.479] <TB1> INFO: ----------------------------------------------------------------------
[19:19:05.714] <TB1> INFO: Expecting 41600 events.
[19:19:09.315] <TB1> INFO: 41600 events read in total (3009ms).
[19:19:09.316] <TB1> INFO: Test took 3836ms.
[19:19:09.549] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[19:19:09.549] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:19:09.549] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[19:19:09.549] <TB1> INFO: Decoding statistics:
[19:19:09.549] <TB1> INFO: General information:
[19:19:09.549] <TB1> INFO: 16bit words read: 0
[19:19:09.549] <TB1> INFO: valid events total: 0
[19:19:09.549] <TB1> INFO: empty events: 0
[19:19:09.549] <TB1> INFO: valid events with pixels: 0
[19:19:09.549] <TB1> INFO: valid pixel hits: 0
[19:19:09.549] <TB1> INFO: Event errors: 0
[19:19:09.549] <TB1> INFO: start marker: 0
[19:19:09.550] <TB1> INFO: stop marker: 0
[19:19:09.550] <TB1> INFO: overflow: 0
[19:19:09.550] <TB1> INFO: invalid 5bit words: 0
[19:19:09.550] <TB1> INFO: invalid XOR eye diagram: 0
[19:19:09.550] <TB1> INFO: frame (failed synchr.): 0
[19:19:09.550] <TB1> INFO: idle data (no TBM trl): 0
[19:19:09.550] <TB1> INFO: no data (only TBM hdr): 0
[19:19:09.550] <TB1> INFO: TBM errors: 0
[19:19:09.550] <TB1> INFO: flawed TBM headers: 0
[19:19:09.550] <TB1> INFO: flawed TBM trailers: 0
[19:19:09.550] <TB1> INFO: event ID mismatches: 0
[19:19:09.550] <TB1> INFO: ROC errors: 0
[19:19:09.550] <TB1> INFO: missing ROC header(s): 0
[19:19:09.550] <TB1> INFO: misplaced readback start: 0
[19:19:09.550] <TB1> INFO: Pixel decoding errors: 0
[19:19:09.550] <TB1> INFO: pixel data incomplete: 0
[19:19:09.550] <TB1> INFO: pixel address: 0
[19:19:09.550] <TB1> INFO: pulse height fill bit: 0
[19:19:09.550] <TB1> INFO: buffer corruption: 0
[19:19:09.561] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C15.dat
[19:19:09.561] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr_C15.dat
[19:19:09.561] <TB1> ERROR: <ConfigParameters.cc/readGainPedestalParameters:L1005> cannot open /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr_C0.dat for reading PH calibration constants
[19:19:09.561] <TB1> INFO: ######################################################################
[19:19:09.561] <TB1> INFO: PixTestReadback::doTest()
[19:19:09.561] <TB1> INFO: ######################################################################
[19:19:09.561] <TB1> INFO: ----------------------------------------------------------------------
[19:19:09.561] <TB1> INFO: PixTestReadback::CalibrateVd()
[19:19:09.561] <TB1> INFO: ----------------------------------------------------------------------
[19:19:19.516] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C0.dat
[19:19:19.516] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C1.dat
[19:19:19.516] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C2.dat
[19:19:19.516] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C3.dat
[19:19:19.516] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C4.dat
[19:19:19.516] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C5.dat
[19:19:19.516] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C6.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C7.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C8.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C9.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C10.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C11.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C12.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C13.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C14.dat
[19:19:19.517] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C15.dat
[19:19:19.544] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:19:19.544] <TB1> INFO: ----------------------------------------------------------------------
[19:19:19.544] <TB1> INFO: PixTestReadback::CalibrateVa()
[19:19:19.544] <TB1> INFO: ----------------------------------------------------------------------
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C0.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C1.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C2.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C3.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C4.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C5.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C6.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C7.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C8.dat
[19:19:29.429] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C9.dat
[19:19:29.430] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C10.dat
[19:19:29.430] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C11.dat
[19:19:29.430] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C12.dat
[19:19:29.430] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C13.dat
[19:19:29.430] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C14.dat
[19:19:29.430] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C15.dat
[19:19:29.457] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:19:29.457] <TB1> INFO: ----------------------------------------------------------------------
[19:19:29.457] <TB1> INFO: PixTestReadback::readbackVbg()
[19:19:29.457] <TB1> INFO: ----------------------------------------------------------------------
[19:19:37.096] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:19:37.096] <TB1> INFO: ----------------------------------------------------------------------
[19:19:37.096] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[19:19:37.096] <TB1> INFO: ----------------------------------------------------------------------
[19:19:37.096] <TB1> INFO: Vbg will be calibrated using Vd calibration
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.9calibrated Vbg = 1.16192 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 149.5calibrated Vbg = 1.15957 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 145.8calibrated Vbg = 1.15967 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 160.2calibrated Vbg = 1.15136 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 163.1calibrated Vbg = 1.16337 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 149.9calibrated Vbg = 1.16381 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 145.3calibrated Vbg = 1.16097 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 149.2calibrated Vbg = 1.16757 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.4calibrated Vbg = 1.16537 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.8calibrated Vbg = 1.16026 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 160.1calibrated Vbg = 1.15561 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.2calibrated Vbg = 1.14911 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 162.9calibrated Vbg = 1.15823 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.6calibrated Vbg = 1.15707 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 165.9calibrated Vbg = 1.1626 :::*/*/*/*/
[19:19:37.096] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.1calibrated Vbg = 1.16171 :::*/*/*/*/
[19:19:37.098] <TB1> INFO: ----------------------------------------------------------------------
[19:19:37.098] <TB1> INFO: PixTestReadback::CalibrateIa()
[19:19:37.098] <TB1> INFO: ----------------------------------------------------------------------
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C0.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C1.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C2.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C3.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C4.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C5.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C6.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C7.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C8.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C9.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C10.dat
[19:22:17.335] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C11.dat
[19:22:17.336] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C12.dat
[19:22:17.336] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C13.dat
[19:22:17.336] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C14.dat
[19:22:17.336] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//readbackCal_C15.dat
[19:22:17.362] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:22:17.363] <TB1> INFO: PixTestReadback::doTest() done
[19:22:17.363] <TB1> INFO: Decoding statistics:
[19:22:17.363] <TB1> INFO: General information:
[19:22:17.363] <TB1> INFO: 16bit words read: 1536
[19:22:17.363] <TB1> INFO: valid events total: 256
[19:22:17.363] <TB1> INFO: empty events: 256
[19:22:17.363] <TB1> INFO: valid events with pixels: 0
[19:22:17.363] <TB1> INFO: valid pixel hits: 0
[19:22:17.363] <TB1> INFO: Event errors: 0
[19:22:17.363] <TB1> INFO: start marker: 0
[19:22:17.363] <TB1> INFO: stop marker: 0
[19:22:17.363] <TB1> INFO: overflow: 0
[19:22:17.363] <TB1> INFO: invalid 5bit words: 0
[19:22:17.363] <TB1> INFO: invalid XOR eye diagram: 0
[19:22:17.363] <TB1> INFO: frame (failed synchr.): 0
[19:22:17.363] <TB1> INFO: idle data (no TBM trl): 0
[19:22:17.363] <TB1> INFO: no data (only TBM hdr): 0
[19:22:17.363] <TB1> INFO: TBM errors: 0
[19:22:17.363] <TB1> INFO: flawed TBM headers: 0
[19:22:17.363] <TB1> INFO: flawed TBM trailers: 0
[19:22:17.363] <TB1> INFO: event ID mismatches: 0
[19:22:17.363] <TB1> INFO: ROC errors: 0
[19:22:17.363] <TB1> INFO: missing ROC header(s): 0
[19:22:17.363] <TB1> INFO: misplaced readback start: 0
[19:22:17.363] <TB1> INFO: Pixel decoding errors: 0
[19:22:17.363] <TB1> INFO: pixel data incomplete: 0
[19:22:17.363] <TB1> INFO: pixel address: 0
[19:22:17.363] <TB1> INFO: pulse height fill bit: 0
[19:22:17.363] <TB1> INFO: buffer corruption: 0
[19:22:17.397] <TB1> INFO: ######################################################################
[19:22:17.397] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[19:22:17.397] <TB1> INFO: ######################################################################
[19:22:17.400] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[19:22:17.411] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:22:17.411] <TB1> INFO: run 1 of 1
[19:22:17.646] <TB1> INFO: Expecting 3120000 events.
[19:22:49.751] <TB1> INFO: 669870 events read in total (31513ms).
[19:23:02.013] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (47) != TBM ID (129)
[19:23:02.158] <TB1> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 47 47 129 47 47 47 47 47
[19:23:02.158] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (48)
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a033 8040 4060 40e1 e022 c000
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a02d 80c0 40c1 40c1 e022 c000
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a02e 8000 40e0 40e0 e022 c000
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 40e1 40e1 e022 c000
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a030 80b1 40c0 40c0 e022 c000
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a031 80c0 4061 4061 e022 c000
[19:23:02.158] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a032 8000 4060 4060 e022 c000
[19:23:02.159] <TB1> WARNING: Channel 0 ROC 0: Readback start marker after 32 readouts!
[19:23:02.159] <TB1> WARNING: Channel 0 ROC 1: Readback start marker after 32 readouts!
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a042 8000 4060 4060 e022 c000
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a03c 80b1 40e0 40e0 e022 c000
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a03d 80c0 4061 4061 e022 c000
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a03e 8000 4061 40e1 e022 c000
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a03f 8040 40c3 40c3 e022 c000
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a040 80b1 40c0 40c0 e022 c000
[19:23:02.159] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a041 80c0 4061 4061 e022 c000
[19:23:20.855] <TB1> INFO: 1336975 events read in total (62617ms).
[19:23:33.067] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (16) != TBM ID (129)
[19:23:33.210] <TB1> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 16 16 129 16 16 16 16 16
[19:23:33.211] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (17)
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a014 80b1 40e0 4c4 2def 40c0 4c4 2def e022 c000
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a00e 8000 4061 4c4 2def 40e1 4c4 2def e022 c000
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a00f 8040 40c3 4c4 2def 40c3 4c4 2def e022 c000
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 40e1 40e1 2def 40c0 4c4 2def e022 c000
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a011 80c0 4061 4c4 2def 4061 4c4 2def e022 c000
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a012 8000 4060 4c4 2def 4060 4c4 2def e022 c000
[19:23:33.211] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a013 8040 4060 4c4 2def 40e1 4c4 2def e022 c000
[19:23:51.481] <TB1> INFO: 2001580 events read in total (93243ms).
[19:24:03.702] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (45) != TBM ID (129)
[19:24:03.846] <TB1> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 45 45 129 45 45 45 45 45
[19:24:03.846] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (46)
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a031 80c0 4061 826 29ef 4061 826 29ef e022 c000
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a02b 8040 4061 826 29ef 40c1 826 29ef e022 c000
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a02c 80b1 4060 826 29ef 40e0 826 29ef e022 c000
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 40e1 40e1 29ef 40c0 826 29ef e022 c000
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a02e 8000 40c0 826 29ef 40c0 826 29ef e022 c000
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a02f 8040 40c3 826 29ef 40e3 826 29ef e022 c000
[19:24:03.846] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a030 80b1 4060 826 29ef 40e0 826 29ef e022 c000
[19:24:22.712] <TB1> INFO: 2666700 events read in total (124474ms).
[19:24:31.156] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (77) != TBM ID (129)
[19:24:31.300] <TB1> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 77 77 129 77 77 77 77 77
[19:24:31.300] <TB1> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (78)
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a051 80c0 40c1 a88 27ef 40c1 a88 27ef e022 c000
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a04b 8040 4061 a88 27ef 4061 a88 27ef e022 c000
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a04c 80b1 4061 a88 27ef 4061 a88 27ef e022 c000
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 40e1 40e1 27ef 4060 a88 27ef e022 c000
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a04e 8000 4060 a88 27ef 40e0 a88 27ef e022 c000
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a04f 8040 40c2 a88 27ef 40c2 a88 27ef e022 c000
[19:24:31.301] <TB1> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a050 80b1 4060 a88 27ef 40e0 a88 27ef e022 c000
[19:24:43.600] <TB1> INFO: 3120000 events read in total (145362ms).
[19:24:43.651] <TB1> INFO: Test took 146241ms.
[19:25:09.293] <TB1> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 171 seconds
[19:25:09.294] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 1 1 0 0 2 0 0 0
[19:25:09.294] <TB1> INFO: separation cut (per ROC): 107 103 106 106 105 105 110 106 105 109 98 112 103 104 109 107
[19:25:09.294] <TB1> INFO: Decoding statistics:
[19:25:09.294] <TB1> INFO: General information:
[19:25:09.294] <TB1> INFO: 16bit words read: 0
[19:25:09.294] <TB1> INFO: valid events total: 0
[19:25:09.294] <TB1> INFO: empty events: 0
[19:25:09.294] <TB1> INFO: valid events with pixels: 0
[19:25:09.294] <TB1> INFO: valid pixel hits: 0
[19:25:09.294] <TB1> INFO: Event errors: 0
[19:25:09.294] <TB1> INFO: start marker: 0
[19:25:09.294] <TB1> INFO: stop marker: 0
[19:25:09.294] <TB1> INFO: overflow: 0
[19:25:09.294] <TB1> INFO: invalid 5bit words: 0
[19:25:09.294] <TB1> INFO: invalid XOR eye diagram: 0
[19:25:09.294] <TB1> INFO: frame (failed synchr.): 0
[19:25:09.294] <TB1> INFO: idle data (no TBM trl): 0
[19:25:09.294] <TB1> INFO: no data (only TBM hdr): 0
[19:25:09.294] <TB1> INFO: TBM errors: 0
[19:25:09.294] <TB1> INFO: flawed TBM headers: 0
[19:25:09.294] <TB1> INFO: flawed TBM trailers: 0
[19:25:09.294] <TB1> INFO: event ID mismatches: 0
[19:25:09.294] <TB1> INFO: ROC errors: 0
[19:25:09.294] <TB1> INFO: missing ROC header(s): 0
[19:25:09.294] <TB1> INFO: misplaced readback start: 0
[19:25:09.294] <TB1> INFO: Pixel decoding errors: 0
[19:25:09.294] <TB1> INFO: pixel data incomplete: 0
[19:25:09.294] <TB1> INFO: pixel address: 0
[19:25:09.294] <TB1> INFO: pulse height fill bit: 0
[19:25:09.294] <TB1> INFO: buffer corruption: 0
[19:25:09.345] <TB1> INFO: ######################################################################
[19:25:09.345] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:25:09.345] <TB1> INFO: ######################################################################
[19:25:09.345] <TB1> INFO: ----------------------------------------------------------------------
[19:25:09.345] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:25:09.345] <TB1> INFO: ----------------------------------------------------------------------
[19:25:09.346] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[19:25:09.358] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[19:25:09.358] <TB1> INFO: run 1 of 1
[19:25:09.666] <TB1> INFO: Expecting 36608000 events.
[19:25:34.665] <TB1> INFO: 714800 events read in total (24408ms).
[19:25:58.422] <TB1> INFO: 1405300 events read in total (48165ms).
[19:26:22.798] <TB1> INFO: 2099300 events read in total (72541ms).
[19:26:47.138] <TB1> INFO: 2788000 events read in total (96881ms).
[19:27:11.324] <TB1> INFO: 3481100 events read in total (121067ms).
[19:27:35.678] <TB1> INFO: 4169300 events read in total (145421ms).
[19:27:59.841] <TB1> INFO: 4863150 events read in total (169585ms).
[19:28:23.842] <TB1> INFO: 5552350 events read in total (193585ms).
[19:28:48.084] <TB1> INFO: 6244100 events read in total (217827ms).
[19:29:12.061] <TB1> INFO: 6931550 events read in total (241804ms).
[19:29:35.745] <TB1> INFO: 7622100 events read in total (265488ms).
[19:29:59.249] <TB1> INFO: 8309250 events read in total (288992ms).
[19:30:23.052] <TB1> INFO: 9001950 events read in total (312795ms).
[19:30:46.851] <TB1> INFO: 9692200 events read in total (336594ms).
[19:31:10.716] <TB1> INFO: 10380450 events read in total (360459ms).
[19:31:35.007] <TB1> INFO: 11067000 events read in total (384750ms).
[19:31:59.847] <TB1> INFO: 11756600 events read in total (409590ms).
[19:32:23.592] <TB1> INFO: 12444000 events read in total (433335ms).
[19:32:47.848] <TB1> INFO: 13134500 events read in total (457591ms).
[19:33:11.737] <TB1> INFO: 13823600 events read in total (481480ms).
[19:33:35.955] <TB1> INFO: 14512500 events read in total (505698ms).
[19:33:59.967] <TB1> INFO: 15199150 events read in total (529710ms).
[19:34:24.500] <TB1> INFO: 15887600 events read in total (554243ms).
[19:34:49.439] <TB1> INFO: 16576000 events read in total (579182ms).
[19:35:13.094] <TB1> INFO: 17263000 events read in total (602837ms).
[19:35:37.887] <TB1> INFO: 17950750 events read in total (627630ms).
[19:36:01.676] <TB1> INFO: 18636050 events read in total (651419ms).
[19:36:25.597] <TB1> INFO: 19321950 events read in total (675340ms).
[19:36:49.308] <TB1> INFO: 20006300 events read in total (699051ms).
[19:37:13.573] <TB1> INFO: 20690800 events read in total (723316ms).
[19:37:38.178] <TB1> INFO: 21374750 events read in total (747921ms).
[19:38:02.525] <TB1> INFO: 22059500 events read in total (772268ms).
[19:38:26.740] <TB1> INFO: 22742400 events read in total (796483ms).
[19:38:50.368] <TB1> INFO: 23423900 events read in total (820111ms).
[19:39:14.261] <TB1> INFO: 24103800 events read in total (844004ms).
[19:39:38.343] <TB1> INFO: 24787350 events read in total (868086ms).
[19:40:02.488] <TB1> INFO: 25468650 events read in total (892231ms).
[19:40:26.561] <TB1> INFO: 26152200 events read in total (916304ms).
[19:40:50.929] <TB1> INFO: 26832150 events read in total (940672ms).
[19:41:14.695] <TB1> INFO: 27515800 events read in total (964438ms).
[19:41:38.478] <TB1> INFO: 28195200 events read in total (988221ms).
[19:42:02.434] <TB1> INFO: 28878800 events read in total (1012177ms).
[19:42:26.080] <TB1> INFO: 29557150 events read in total (1035823ms).
[19:42:50.454] <TB1> INFO: 30237600 events read in total (1060197ms).
[19:43:14.585] <TB1> INFO: 30917650 events read in total (1084328ms).
[19:43:38.384] <TB1> INFO: 31601200 events read in total (1108127ms).
[19:44:02.410] <TB1> INFO: 32281500 events read in total (1132153ms).
[19:44:26.377] <TB1> INFO: 32964100 events read in total (1156120ms).
[19:44:49.514] <TB1> INFO: 33647200 events read in total (1179257ms).
[19:45:13.144] <TB1> INFO: 34331500 events read in total (1202887ms).
[19:45:37.601] <TB1> INFO: 35013550 events read in total (1227344ms).
[19:46:00.905] <TB1> INFO: 35698650 events read in total (1250648ms).
[19:46:24.697] <TB1> INFO: 36393650 events read in total (1274440ms).
[19:46:32.501] <TB1> INFO: 36608000 events read in total (1282244ms).
[19:46:32.570] <TB1> INFO: Test took 1283211ms.
[19:46:33.014] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:34.575] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:36.003] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:37.472] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:38.916] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:40.343] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:41.784] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:43.242] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:44.700] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:46.175] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:47.626] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:49.121] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:50.573] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:52.030] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:53.449] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:54.980] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:46:56.555] <TB1> INFO: PixTestScurves::scurves() done
[19:46:56.555] <TB1> INFO: Vcal mean: 122.02 127.15 127.36 130.34 125.20 122.49 126.60 127.14 124.94 128.96 126.61 125.55 126.11 128.25 132.85 131.03
[19:46:56.555] <TB1> INFO: Vcal RMS: 6.22 6.55 6.28 6.60 5.71 5.67 6.69 6.99 6.76 6.96 6.72 6.09 5.68 5.75 6.46 6.11
[19:46:56.555] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1307 seconds
[19:46:56.555] <TB1> INFO: Decoding statistics:
[19:46:56.555] <TB1> INFO: General information:
[19:46:56.555] <TB1> INFO: 16bit words read: 0
[19:46:56.555] <TB1> INFO: valid events total: 0
[19:46:56.555] <TB1> INFO: empty events: 0
[19:46:56.555] <TB1> INFO: valid events with pixels: 0
[19:46:56.555] <TB1> INFO: valid pixel hits: 0
[19:46:56.555] <TB1> INFO: Event errors: 0
[19:46:56.555] <TB1> INFO: start marker: 0
[19:46:56.555] <TB1> INFO: stop marker: 0
[19:46:56.555] <TB1> INFO: overflow: 0
[19:46:56.555] <TB1> INFO: invalid 5bit words: 0
[19:46:56.555] <TB1> INFO: invalid XOR eye diagram: 0
[19:46:56.555] <TB1> INFO: frame (failed synchr.): 0
[19:46:56.555] <TB1> INFO: idle data (no TBM trl): 0
[19:46:56.555] <TB1> INFO: no data (only TBM hdr): 0
[19:46:56.555] <TB1> INFO: TBM errors: 0
[19:46:56.555] <TB1> INFO: flawed TBM headers: 0
[19:46:56.555] <TB1> INFO: flawed TBM trailers: 0
[19:46:56.555] <TB1> INFO: event ID mismatches: 0
[19:46:56.555] <TB1> INFO: ROC errors: 0
[19:46:56.555] <TB1> INFO: missing ROC header(s): 0
[19:46:56.555] <TB1> INFO: misplaced readback start: 0
[19:46:56.555] <TB1> INFO: Pixel decoding errors: 0
[19:46:56.555] <TB1> INFO: pixel data incomplete: 0
[19:46:56.555] <TB1> INFO: pixel address: 0
[19:46:56.555] <TB1> INFO: pulse height fill bit: 0
[19:46:56.555] <TB1> INFO: buffer corruption: 0
[19:46:56.620] <TB1> INFO: ######################################################################
[19:46:56.620] <TB1> INFO: PixTestTrim::doTest()
[19:46:56.620] <TB1> INFO: ######################################################################
[19:46:56.621] <TB1> INFO: ----------------------------------------------------------------------
[19:46:56.621] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[19:46:56.621] <TB1> INFO: ----------------------------------------------------------------------
[19:46:56.661] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:46:56.661] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:46:56.671] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:46:56.671] <TB1> INFO: run 1 of 1
[19:46:56.903] <TB1> INFO: Expecting 5025280 events.
[19:47:29.401] <TB1> INFO: 839512 events read in total (31906ms).
[19:48:01.244] <TB1> INFO: 1678280 events read in total (63749ms).
[19:48:32.940] <TB1> INFO: 2514856 events read in total (95445ms).
[19:49:04.711] <TB1> INFO: 3346136 events read in total (127216ms).
[19:49:36.455] <TB1> INFO: 4172496 events read in total (158960ms).
[19:50:08.794] <TB1> INFO: 4998824 events read in total (191299ms).
[19:50:10.171] <TB1> INFO: 5025280 events read in total (192676ms).
[19:50:10.221] <TB1> INFO: Test took 193550ms.
[19:50:23.275] <TB1> INFO: ROC 0 VthrComp = 127
[19:50:23.275] <TB1> INFO: ROC 1 VthrComp = 129
[19:50:23.275] <TB1> INFO: ROC 2 VthrComp = 123
[19:50:23.275] <TB1> INFO: ROC 3 VthrComp = 133
[19:50:23.276] <TB1> INFO: ROC 4 VthrComp = 131
[19:50:23.276] <TB1> INFO: ROC 5 VthrComp = 132
[19:50:23.276] <TB1> INFO: ROC 6 VthrComp = 133
[19:50:23.276] <TB1> INFO: ROC 7 VthrComp = 129
[19:50:23.276] <TB1> INFO: ROC 8 VthrComp = 120
[19:50:23.276] <TB1> INFO: ROC 9 VthrComp = 124
[19:50:23.276] <TB1> INFO: ROC 10 VthrComp = 111
[19:50:23.276] <TB1> INFO: ROC 11 VthrComp = 128
[19:50:23.276] <TB1> INFO: ROC 12 VthrComp = 123
[19:50:23.276] <TB1> INFO: ROC 13 VthrComp = 128
[19:50:23.276] <TB1> INFO: ROC 14 VthrComp = 124
[19:50:23.277] <TB1> INFO: ROC 15 VthrComp = 132
[19:50:23.586] <TB1> INFO: Expecting 41600 events.
[19:50:27.056] <TB1> INFO: 41600 events read in total (2879ms).
[19:50:27.057] <TB1> INFO: Test took 3779ms.
[19:50:27.065] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:50:27.065] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:50:27.075] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:50:27.075] <TB1> INFO: run 1 of 1
[19:50:27.352] <TB1> INFO: Expecting 5025280 events.
[19:50:54.346] <TB1> INFO: 589576 events read in total (26402ms).
[19:51:21.040] <TB1> INFO: 1178312 events read in total (53096ms).
[19:51:48.121] <TB1> INFO: 1767072 events read in total (80177ms).
[19:52:14.784] <TB1> INFO: 2355800 events read in total (106840ms).
[19:52:41.175] <TB1> INFO: 2942896 events read in total (133231ms).
[19:53:07.380] <TB1> INFO: 3528600 events read in total (159436ms).
[19:53:34.064] <TB1> INFO: 4114304 events read in total (186120ms).
[19:54:00.402] <TB1> INFO: 4699952 events read in total (212458ms).
[19:54:15.260] <TB1> INFO: 5025280 events read in total (227316ms).
[19:54:15.313] <TB1> INFO: Test took 228239ms.
[19:54:37.129] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.4367 for pixel 0/12 mean/min/max = 46.3125/31.9857/60.6393
[19:54:37.129] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 60.4147 for pixel 0/46 mean/min/max = 46.2508/32.018/60.4836
[19:54:37.130] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 66.4022 for pixel 47/9 mean/min/max = 48.5317/30.4826/66.5808
[19:54:37.130] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 62.4454 for pixel 48/79 mean/min/max = 47.7144/32.8586/62.5702
[19:54:37.130] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.8499 for pixel 20/1 mean/min/max = 45.22/31.5151/58.9248
[19:54:37.131] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.2735 for pixel 0/17 mean/min/max = 45.2982/32.2275/58.3689
[19:54:37.131] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.4139 for pixel 2/76 mean/min/max = 47.5723/34.6861/60.4585
[19:54:37.131] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.6014 for pixel 26/8 mean/min/max = 46.2769/31.6949/60.8588
[19:54:37.131] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 68.5924 for pixel 0/1 mean/min/max = 49.6819/30.543/68.8207
[19:54:37.132] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 68.0492 for pixel 12/4 mean/min/max = 49.3856/30.5293/68.242
[19:54:37.132] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 72.3426 for pixel 20/0 mean/min/max = 53.3336/34.2663/72.4008
[19:54:37.132] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 60.6789 for pixel 16/0 mean/min/max = 46.0312/31.3319/60.7305
[19:54:37.132] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 63.3603 for pixel 13/0 mean/min/max = 47.69/31.9697/63.4103
[19:54:37.133] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 61.2334 for pixel 3/9 mean/min/max = 46.7612/32.2878/61.2345
[19:54:37.133] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 71.5337 for pixel 16/0 mean/min/max = 51.3752/31.1672/71.5832
[19:54:37.133] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 65.7238 for pixel 12/12 mean/min/max = 50.5937/35.3771/65.8102
[19:54:37.133] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:54:37.222] <TB1> INFO: Expecting 411648 events.
[19:54:46.934] <TB1> INFO: 411648 events read in total (9120ms).
[19:54:46.943] <TB1> INFO: Expecting 411648 events.
[19:54:56.288] <TB1> INFO: 411648 events read in total (8942ms).
[19:54:56.296] <TB1> INFO: Expecting 411648 events.
[19:55:05.634] <TB1> INFO: 411648 events read in total (8935ms).
[19:55:05.645] <TB1> INFO: Expecting 411648 events.
[19:55:15.078] <TB1> INFO: 411648 events read in total (9030ms).
[19:55:15.092] <TB1> INFO: Expecting 411648 events.
[19:55:24.616] <TB1> INFO: 411648 events read in total (9122ms).
[19:55:24.632] <TB1> INFO: Expecting 411648 events.
[19:55:34.017] <TB1> INFO: 411648 events read in total (8982ms).
[19:55:34.043] <TB1> INFO: Expecting 411648 events.
[19:55:43.464] <TB1> INFO: 411648 events read in total (9018ms).
[19:55:43.485] <TB1> INFO: Expecting 411648 events.
[19:55:52.931] <TB1> INFO: 411648 events read in total (9043ms).
[19:55:52.964] <TB1> INFO: Expecting 411648 events.
[19:56:02.355] <TB1> INFO: 411648 events read in total (8988ms).
[19:56:02.381] <TB1> INFO: Expecting 411648 events.
[19:56:11.822] <TB1> INFO: 411648 events read in total (9038ms).
[19:56:11.850] <TB1> INFO: Expecting 411648 events.
[19:56:21.342] <TB1> INFO: 411648 events read in total (9089ms).
[19:56:21.373] <TB1> INFO: Expecting 411648 events.
[19:56:30.916] <TB1> INFO: 411648 events read in total (9140ms).
[19:56:30.949] <TB1> INFO: Expecting 411648 events.
[19:56:40.449] <TB1> INFO: 411648 events read in total (9098ms).
[19:56:40.498] <TB1> INFO: Expecting 411648 events.
[19:56:49.982] <TB1> INFO: 411648 events read in total (9081ms).
[19:56:50.046] <TB1> INFO: Expecting 411648 events.
[19:56:59.511] <TB1> INFO: 411648 events read in total (9062ms).
[19:56:59.552] <TB1> INFO: Expecting 411648 events.
[19:57:08.911] <TB1> INFO: 411648 events read in total (8955ms).
[19:57:08.954] <TB1> INFO: Test took 151821ms.
[19:57:09.571] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[19:57:09.581] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:57:09.581] <TB1> INFO: run 1 of 1
[19:57:09.812] <TB1> INFO: Expecting 5025280 events.
[19:57:37.016] <TB1> INFO: 591296 events read in total (26612ms).
[19:58:03.333] <TB1> INFO: 1180200 events read in total (52929ms).
[19:58:29.565] <TB1> INFO: 1769112 events read in total (79162ms).
[19:58:55.887] <TB1> INFO: 2356080 events read in total (105483ms).
[19:59:22.681] <TB1> INFO: 2944968 events read in total (132277ms).
[19:59:49.008] <TB1> INFO: 3535128 events read in total (158604ms).
[20:00:15.212] <TB1> INFO: 4122512 events read in total (184808ms).
[20:00:41.940] <TB1> INFO: 4708728 events read in total (211536ms).
[20:00:56.665] <TB1> INFO: 5025280 events read in total (226261ms).
[20:00:56.796] <TB1> INFO: Test took 227216ms.
[20:01:15.843] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 7.552604 .. 146.313742
[20:01:16.076] <TB1> INFO: Expecting 208000 events.
[20:01:25.720] <TB1> INFO: 208000 events read in total (9052ms).
[20:01:25.721] <TB1> INFO: Test took 9875ms.
[20:01:25.804] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 7 .. 156 (-1/-1) hits flags = 528 (plus default)
[20:01:25.817] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:01:25.817] <TB1> INFO: run 1 of 1
[20:01:26.126] <TB1> INFO: Expecting 4992000 events.
[20:01:52.858] <TB1> INFO: 576528 events read in total (26140ms).
[20:02:19.740] <TB1> INFO: 1153416 events read in total (53022ms).
[20:02:46.266] <TB1> INFO: 1729568 events read in total (79549ms).
[20:03:12.493] <TB1> INFO: 2306248 events read in total (105775ms).
[20:03:38.855] <TB1> INFO: 2882464 events read in total (132137ms).
[20:04:05.412] <TB1> INFO: 3457824 events read in total (158694ms).
[20:04:32.066] <TB1> INFO: 4032920 events read in total (185348ms).
[20:04:59.165] <TB1> INFO: 4608112 events read in total (212447ms).
[20:05:17.389] <TB1> INFO: 4992000 events read in total (230671ms).
[20:05:17.472] <TB1> INFO: Test took 231656ms.
[20:05:39.175] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 25.411848 .. 45.592005
[20:05:39.487] <TB1> INFO: Expecting 208000 events.
[20:05:50.062] <TB1> INFO: 208000 events read in total (9983ms).
[20:05:50.063] <TB1> INFO: Test took 10885ms.
[20:05:50.111] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[20:05:50.121] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:05:50.121] <TB1> INFO: run 1 of 1
[20:05:50.355] <TB1> INFO: Expecting 1364480 events.
[20:06:20.125] <TB1> INFO: 666144 events read in total (29178ms).
[20:06:48.951] <TB1> INFO: 1331568 events read in total (58005ms).
[20:06:51.022] <TB1> INFO: 1364480 events read in total (60076ms).
[20:06:51.049] <TB1> INFO: Test took 60928ms.
[20:07:02.494] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 21.260536 .. 48.674428
[20:07:02.805] <TB1> INFO: Expecting 208000 events.
[20:07:13.443] <TB1> INFO: 208000 events read in total (10046ms).
[20:07:13.444] <TB1> INFO: Test took 10947ms.
[20:07:13.529] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 11 .. 58 (-1/-1) hits flags = 528 (plus default)
[20:07:13.542] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:07:13.542] <TB1> INFO: run 1 of 1
[20:07:13.812] <TB1> INFO: Expecting 1597440 events.
[20:07:43.828] <TB1> INFO: 670720 events read in total (29425ms).
[20:08:12.331] <TB1> INFO: 1340808 events read in total (57929ms).
[20:08:23.599] <TB1> INFO: 1597440 events read in total (69196ms).
[20:08:23.626] <TB1> INFO: Test took 70083ms.
[20:08:35.342] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 21.668099 .. 50.038274
[20:08:35.578] <TB1> INFO: Expecting 208000 events.
[20:08:46.044] <TB1> INFO: 208000 events read in total (9874ms).
[20:08:46.045] <TB1> INFO: Test took 10700ms.
[20:08:46.096] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 11 .. 60 (-1/-1) hits flags = 528 (plus default)
[20:08:46.105] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:08:46.105] <TB1> INFO: run 1 of 1
[20:08:46.336] <TB1> INFO: Expecting 1664000 events.
[20:09:15.425] <TB1> INFO: 663424 events read in total (28497ms).
[20:09:44.274] <TB1> INFO: 1327600 events read in total (57347ms).
[20:09:59.255] <TB1> INFO: 1664000 events read in total (72327ms).
[20:09:59.294] <TB1> INFO: Test took 73189ms.
[20:10:11.760] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[20:10:11.760] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[20:10:11.770] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:10:11.770] <TB1> INFO: run 1 of 1
[20:10:12.079] <TB1> INFO: Expecting 1364480 events.
[20:10:41.681] <TB1> INFO: 667872 events read in total (29010ms).
[20:11:10.571] <TB1> INFO: 1335536 events read in total (57900ms).
[20:11:12.257] <TB1> INFO: 1364480 events read in total (59586ms).
[20:11:12.279] <TB1> INFO: Test took 60509ms.
[20:11:23.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C0.dat
[20:11:23.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C1.dat
[20:11:23.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C2.dat
[20:11:23.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C3.dat
[20:11:23.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C4.dat
[20:11:23.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C5.dat
[20:11:23.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C6.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C7.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C8.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C9.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C10.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C11.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C12.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C13.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C14.dat
[20:11:23.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C15.dat
[20:11:23.846] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C0.dat
[20:11:23.855] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C1.dat
[20:11:23.863] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C2.dat
[20:11:23.872] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C3.dat
[20:11:23.880] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C4.dat
[20:11:23.888] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C5.dat
[20:11:23.896] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C6.dat
[20:11:23.905] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C7.dat
[20:11:23.913] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C8.dat
[20:11:23.922] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C9.dat
[20:11:23.930] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C10.dat
[20:11:23.938] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C11.dat
[20:11:23.947] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C12.dat
[20:11:23.955] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C13.dat
[20:11:23.964] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C14.dat
[20:11:23.972] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//trimParameters35_C15.dat
[20:11:23.980] <TB1> INFO: PixTestTrim::trimTest() done
[20:11:23.980] <TB1> INFO: vtrim: 120 129 149 139 136 139 135 147 144 169 148 137 138 148 176 161
[20:11:23.981] <TB1> INFO: vthrcomp: 127 129 123 133 131 132 133 129 120 124 111 128 123 128 124 132
[20:11:23.981] <TB1> INFO: vcal mean: 34.98 34.97 35.02 35.04 34.95 34.92 35.02 34.97 35.02 35.02 35.29 34.93 34.99 34.92 35.06 35.05
[20:11:23.981] <TB1> INFO: vcal RMS: 1.01 1.07 1.22 1.12 1.08 0.99 0.97 1.23 1.18 1.24 1.75 1.06 1.11 1.18 1.42 1.20
[20:11:23.981] <TB1> INFO: bits mean: 9.46 9.42 10.10 9.44 10.26 9.97 8.81 9.88 9.28 9.64 8.94 9.96 9.55 9.94 9.84 9.00
[20:11:23.981] <TB1> INFO: bits RMS: 2.72 2.70 2.46 2.49 2.46 2.46 2.48 2.56 2.79 2.63 2.45 2.53 2.58 2.42 2.42 2.20
[20:11:23.988] <TB1> INFO: ----------------------------------------------------------------------
[20:11:23.988] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:11:23.988] <TB1> INFO: ----------------------------------------------------------------------
[20:11:23.991] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:11:24.004] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:11:24.004] <TB1> INFO: run 1 of 1
[20:11:24.317] <TB1> INFO: Expecting 4160000 events.
[20:11:58.353] <TB1> INFO: 781110 events read in total (33444ms).
[20:12:32.039] <TB1> INFO: 1557550 events read in total (67130ms).
[20:13:06.535] <TB1> INFO: 2329880 events read in total (101626ms).
[20:13:39.785] <TB1> INFO: 3096585 events read in total (134876ms).
[20:14:12.605] <TB1> INFO: 3863245 events read in total (167696ms).
[20:14:26.164] <TB1> INFO: 4160000 events read in total (181255ms).
[20:14:26.206] <TB1> INFO: Test took 182202ms.
[20:14:48.360] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[20:14:48.370] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:14:48.370] <TB1> INFO: run 1 of 1
[20:14:48.605] <TB1> INFO: Expecting 4326400 events.
[20:15:21.758] <TB1> INFO: 741465 events read in total (32562ms).
[20:15:53.997] <TB1> INFO: 1478560 events read in total (64801ms).
[20:16:27.202] <TB1> INFO: 2214330 events read in total (98006ms).
[20:16:59.646] <TB1> INFO: 2946005 events read in total (130450ms).
[20:17:31.797] <TB1> INFO: 3676335 events read in total (162601ms).
[20:18:01.443] <TB1> INFO: 4326400 events read in total (192247ms).
[20:18:01.494] <TB1> INFO: Test took 193124ms.
[20:18:25.540] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[20:18:25.550] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:18:25.550] <TB1> INFO: run 1 of 1
[20:18:25.781] <TB1> INFO: Expecting 4305600 events.
[20:18:59.033] <TB1> INFO: 743620 events read in total (32660ms).
[20:19:30.783] <TB1> INFO: 1482575 events read in total (64410ms).
[20:20:02.843] <TB1> INFO: 2220010 events read in total (96470ms).
[20:20:34.946] <TB1> INFO: 2953005 events read in total (128573ms).
[20:21:07.548] <TB1> INFO: 3685350 events read in total (161175ms).
[20:21:35.562] <TB1> INFO: 4305600 events read in total (189189ms).
[20:21:35.633] <TB1> INFO: Test took 190083ms.
[20:22:02.177] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[20:22:02.187] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:22:02.187] <TB1> INFO: run 1 of 1
[20:22:02.422] <TB1> INFO: Expecting 4264000 events.
[20:22:35.216] <TB1> INFO: 746705 events read in total (32203ms).
[20:23:07.715] <TB1> INFO: 1488660 events read in total (64702ms).
[20:23:40.575] <TB1> INFO: 2229080 events read in total (97562ms).
[20:24:13.117] <TB1> INFO: 2964905 events read in total (130104ms).
[20:24:46.679] <TB1> INFO: 3700095 events read in total (163667ms).
[20:25:11.522] <TB1> INFO: 4264000 events read in total (188509ms).
[20:25:11.571] <TB1> INFO: Test took 189384ms.
[20:25:35.126] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[20:25:35.139] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:25:35.139] <TB1> INFO: run 1 of 1
[20:25:35.448] <TB1> INFO: Expecting 4305600 events.
[20:26:08.476] <TB1> INFO: 743975 events read in total (32436ms).
[20:26:40.160] <TB1> INFO: 1483095 events read in total (64120ms).
[20:27:12.940] <TB1> INFO: 2221010 events read in total (96900ms).
[20:27:46.226] <TB1> INFO: 2954475 events read in total (130186ms).
[20:28:18.834] <TB1> INFO: 3686945 events read in total (162794ms).
[20:28:46.154] <TB1> INFO: 4305600 events read in total (190114ms).
[20:28:46.223] <TB1> INFO: Test took 191083ms.
[20:29:15.397] <TB1> INFO: PixTestTrim::trimBitTest() done
[20:29:15.398] <TB1> INFO: PixTestTrim::doTest() done, duration: 2538 seconds
[20:29:15.398] <TB1> INFO: Decoding statistics:
[20:29:15.398] <TB1> INFO: General information:
[20:29:15.398] <TB1> INFO: 16bit words read: 0
[20:29:15.398] <TB1> INFO: valid events total: 0
[20:29:15.398] <TB1> INFO: empty events: 0
[20:29:15.398] <TB1> INFO: valid events with pixels: 0
[20:29:15.398] <TB1> INFO: valid pixel hits: 0
[20:29:15.399] <TB1> INFO: Event errors: 0
[20:29:15.399] <TB1> INFO: start marker: 0
[20:29:15.399] <TB1> INFO: stop marker: 0
[20:29:15.399] <TB1> INFO: overflow: 0
[20:29:15.399] <TB1> INFO: invalid 5bit words: 0
[20:29:15.399] <TB1> INFO: invalid XOR eye diagram: 0
[20:29:15.399] <TB1> INFO: frame (failed synchr.): 0
[20:29:15.399] <TB1> INFO: idle data (no TBM trl): 0
[20:29:15.399] <TB1> INFO: no data (only TBM hdr): 0
[20:29:15.399] <TB1> INFO: TBM errors: 0
[20:29:15.399] <TB1> INFO: flawed TBM headers: 0
[20:29:15.399] <TB1> INFO: flawed TBM trailers: 0
[20:29:15.399] <TB1> INFO: event ID mismatches: 0
[20:29:15.399] <TB1> INFO: ROC errors: 0
[20:29:15.399] <TB1> INFO: missing ROC header(s): 0
[20:29:15.399] <TB1> INFO: misplaced readback start: 0
[20:29:15.399] <TB1> INFO: Pixel decoding errors: 0
[20:29:15.399] <TB1> INFO: pixel data incomplete: 0
[20:29:15.399] <TB1> INFO: pixel address: 0
[20:29:15.399] <TB1> INFO: pulse height fill bit: 0
[20:29:15.399] <TB1> INFO: buffer corruption: 0
[20:29:16.018] <TB1> INFO: ######################################################################
[20:29:16.018] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[20:29:16.018] <TB1> INFO: ######################################################################
[20:29:16.252] <TB1> INFO: Expecting 41600 events.
[20:29:19.683] <TB1> INFO: 41600 events read in total (2839ms).
[20:29:19.683] <TB1> INFO: Test took 3664ms.
[20:29:20.123] <TB1> INFO: Expecting 41600 events.
[20:29:23.584] <TB1> INFO: 41600 events read in total (2870ms).
[20:29:23.584] <TB1> INFO: Test took 3698ms.
[20:29:23.593] <TB1> INFO: Max pixel from chip 0 is [6 ,15] phvalue 191
[20:29:23.593] <TB1> INFO: Max pixel from chip 1 is [8 ,15] phvalue 112
[20:29:23.594] <TB1> INFO: Max pixel from chip 2 is [4 ,7] phvalue 157
[20:29:23.594] <TB1> INFO: Max pixel from chip 3 is [4 ,5] phvalue 131
[20:29:23.594] <TB1> INFO: Max pixel from chip 4 is [6 ,38] phvalue 149
[20:29:23.594] <TB1> INFO: Max pixel from chip 5 is [4 ,42] phvalue 97
[20:29:23.594] <TB1> INFO: Max pixel from chip 6 is [6 ,5] phvalue 143
[20:29:23.594] <TB1> INFO: Max pixel from chip 7 is [11 ,16] phvalue 124
[20:29:23.594] <TB1> INFO: Max pixel from chip 8 is [8 ,17] phvalue 201
[20:29:23.594] <TB1> INFO: Max pixel from chip 9 is [12 ,13] phvalue 171
[20:29:23.594] <TB1> INFO: Max pixel from chip 10 is [10 ,12] phvalue 173
[20:29:23.594] <TB1> INFO: Max pixel from chip 11 is [9 ,10] phvalue 131
[20:29:23.595] <TB1> INFO: Max pixel from chip 12 is [4 ,18] phvalue 158
[20:29:23.595] <TB1> INFO: Max pixel from chip 13 is [10 ,18] phvalue 109
[20:29:23.595] <TB1> INFO: Max pixel from chip 14 is [8 ,7] phvalue 119
[20:29:23.595] <TB1> INFO: Max pixel from chip 15 is [5 ,6] phvalue 171
[20:29:23.874] <TB1> INFO: Expecting 41600 events.
[20:29:27.362] <TB1> INFO: 41600 events read in total (2896ms).
[20:29:27.363] <TB1> INFO: Test took 3754ms.
[20:29:27.372] <TB1> INFO: Min pixel from chip 0 is [3 ,5] phvalue 255
[20:29:27.372] <TB1> INFO: Min pixel from chip 1 is [3 ,5] phvalue 255
[20:29:27.372] <TB1> INFO: Min pixel from chip 2 is [3 ,5] phvalue 255
[20:29:27.372] <TB1> INFO: Min pixel from chip 3 is [3 ,5] phvalue 255
[20:29:27.372] <TB1> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 5 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 7 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 8 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 9 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 10 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 11 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 12 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 13 is [3 ,5] phvalue 255
[20:29:27.373] <TB1> INFO: Min pixel from chip 14 is [3 ,5] phvalue 255
[20:29:27.374] <TB1> INFO: Min pixel from chip 15 is [3 ,5] phvalue 255
[20:29:27.652] <TB1> INFO: Expecting 2560 events.
[20:29:28.536] <TB1> INFO: 2560 events read in total (293ms).
[20:29:28.536] <TB1> INFO: Test took 1161ms.
[20:29:28.844] <TB1> INFO: Expecting 2560 events.
[20:29:29.733] <TB1> INFO: 2560 events read in total (297ms).
[20:29:29.734] <TB1> INFO: Test took 1197ms.
[20:29:30.042] <TB1> INFO: Expecting 2560 events.
[20:29:30.931] <TB1> INFO: 2560 events read in total (298ms).
[20:29:30.931] <TB1> INFO: Test took 1197ms.
[20:29:31.239] <TB1> INFO: Expecting 2560 events.
[20:29:32.123] <TB1> INFO: 2560 events read in total (292ms).
[20:29:32.124] <TB1> INFO: Test took 1192ms.
[20:29:32.431] <TB1> INFO: Expecting 2560 events.
[20:29:33.311] <TB1> INFO: 2560 events read in total (288ms).
[20:29:33.311] <TB1> INFO: Test took 1187ms.
[20:29:33.619] <TB1> INFO: Expecting 2560 events.
[20:29:34.498] <TB1> INFO: 2560 events read in total (288ms).
[20:29:34.499] <TB1> INFO: Test took 1188ms.
[20:29:34.807] <TB1> INFO: Expecting 2560 events.
[20:29:35.687] <TB1> INFO: 2560 events read in total (289ms).
[20:29:35.687] <TB1> INFO: Test took 1188ms.
[20:29:35.995] <TB1> INFO: Expecting 2560 events.
[20:29:36.874] <TB1> INFO: 2560 events read in total (287ms).
[20:29:36.875] <TB1> INFO: Test took 1188ms.
[20:29:37.183] <TB1> INFO: Expecting 2560 events.
[20:29:38.068] <TB1> INFO: 2560 events read in total (294ms).
[20:29:38.068] <TB1> INFO: Test took 1193ms.
[20:29:38.376] <TB1> INFO: Expecting 2560 events.
[20:29:39.256] <TB1> INFO: 2560 events read in total (288ms).
[20:29:39.257] <TB1> INFO: Test took 1188ms.
[20:29:39.564] <TB1> INFO: Expecting 2560 events.
[20:29:40.448] <TB1> INFO: 2560 events read in total (292ms).
[20:29:40.448] <TB1> INFO: Test took 1191ms.
[20:29:40.756] <TB1> INFO: Expecting 2560 events.
[20:29:41.640] <TB1> INFO: 2560 events read in total (292ms).
[20:29:41.641] <TB1> INFO: Test took 1192ms.
[20:29:41.949] <TB1> INFO: Expecting 2560 events.
[20:29:42.837] <TB1> INFO: 2560 events read in total (297ms).
[20:29:42.838] <TB1> INFO: Test took 1197ms.
[20:29:43.146] <TB1> INFO: Expecting 2560 events.
[20:29:44.035] <TB1> INFO: 2560 events read in total (297ms).
[20:29:44.036] <TB1> INFO: Test took 1198ms.
[20:29:44.343] <TB1> INFO: Expecting 2560 events.
[20:29:45.232] <TB1> INFO: 2560 events read in total (297ms).
[20:29:45.233] <TB1> INFO: Test took 1197ms.
[20:29:45.540] <TB1> INFO: Expecting 2560 events.
[20:29:46.429] <TB1> INFO: 2560 events read in total (297ms).
[20:29:46.430] <TB1> INFO: Test took 1197ms.
[20:29:46.432] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:29:46.738] <TB1> INFO: Expecting 655360 events.
[20:30:01.713] <TB1> INFO: 655360 events read in total (14383ms).
[20:30:01.729] <TB1> INFO: Expecting 655360 events.
[20:30:16.423] <TB1> INFO: 655360 events read in total (14291ms).
[20:30:16.438] <TB1> INFO: Expecting 655360 events.
[20:30:30.996] <TB1> INFO: 655360 events read in total (14155ms).
[20:30:31.015] <TB1> INFO: Expecting 655360 events.
[20:30:45.822] <TB1> INFO: 655360 events read in total (14404ms).
[20:30:45.857] <TB1> INFO: Expecting 655360 events.
[20:31:00.858] <TB1> INFO: 655360 events read in total (14598ms).
[20:31:00.899] <TB1> INFO: Expecting 655360 events.
[20:31:15.546] <TB1> INFO: 655360 events read in total (14244ms).
[20:31:15.577] <TB1> INFO: Expecting 655360 events.
[20:31:30.373] <TB1> INFO: 655360 events read in total (14393ms).
[20:31:30.408] <TB1> INFO: Expecting 655360 events.
[20:31:45.184] <TB1> INFO: 655360 events read in total (14373ms).
[20:31:45.222] <TB1> INFO: Expecting 655360 events.
[20:32:00.143] <TB1> INFO: 655360 events read in total (14518ms).
[20:32:00.186] <TB1> INFO: Expecting 655360 events.
[20:32:15.029] <TB1> INFO: 655360 events read in total (14440ms).
[20:32:15.102] <TB1> INFO: Expecting 655360 events.
[20:32:29.806] <TB1> INFO: 655360 events read in total (14301ms).
[20:32:29.860] <TB1> INFO: Expecting 655360 events.
[20:32:44.616] <TB1> INFO: 655360 events read in total (14353ms).
[20:32:44.669] <TB1> INFO: Expecting 655360 events.
[20:32:59.490] <TB1> INFO: 655360 events read in total (14418ms).
[20:32:59.588] <TB1> INFO: Expecting 655360 events.
[20:33:14.337] <TB1> INFO: 655360 events read in total (14346ms).
[20:33:14.398] <TB1> INFO: Expecting 655360 events.
[20:33:29.322] <TB1> INFO: 655360 events read in total (14521ms).
[20:33:29.432] <TB1> INFO: Expecting 655360 events.
[20:33:43.828] <TB1> INFO: 655360 events read in total (13993ms).
[20:33:43.901] <TB1> INFO: Test took 237469ms.
[20:33:44.244] <TB1> INFO: Expecting 655360 events.
[20:34:05.123] <TB1> INFO: 575310 events read in total (20288ms).
[20:34:08.330] <TB1> INFO: 655360 events read in total (23495ms).
[20:34:08.346] <TB1> INFO: Test took 24368ms.
[20:34:08.473] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.478] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.482] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:34:08.487] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:34:08.491] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[20:34:08.496] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[20:34:08.500] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[20:34:08.505] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.510] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:34:08.514] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:34:08.519] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[20:34:08.523] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[20:34:08.528] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.533] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.537] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.542] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:34:08.546] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:34:08.551] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.555] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.560] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.564] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.569] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.573] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.578] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.582] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:34:08.587] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.591] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.596] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:34:08.600] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:34:08.605] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:34:08.610] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:34:08.614] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:34:08.618] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[20:34:08.623] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[20:34:08.627] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[20:34:08.632] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[20:34:08.637] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[20:34:08.641] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[20:34:08.646] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[20:34:08.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C0.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C1.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C2.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C3.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C4.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C5.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C6.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C7.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C8.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C9.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C10.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C11.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C12.dat
[20:34:08.679] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C13.dat
[20:34:08.680] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C14.dat
[20:34:08.680] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//dacParameters35_C15.dat
[20:34:08.928] <TB1> INFO: Expecting 41600 events.
[20:34:12.065] <TB1> INFO: 41600 events read in total (2546ms).
[20:34:12.065] <TB1> INFO: Test took 3383ms.
[20:34:12.507] <TB1> INFO: Expecting 41600 events.
[20:34:15.593] <TB1> INFO: 41600 events read in total (2494ms).
[20:34:15.594] <TB1> INFO: Test took 3318ms.
[20:34:16.043] <TB1> INFO: Expecting 41600 events.
[20:34:19.190] <TB1> INFO: 41600 events read in total (2555ms).
[20:34:19.191] <TB1> INFO: Test took 3386ms.
[20:34:19.413] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:19.501] <TB1> INFO: Expecting 2560 events.
[20:34:20.386] <TB1> INFO: 2560 events read in total (293ms).
[20:34:20.386] <TB1> INFO: Test took 973ms.
[20:34:20.388] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:20.694] <TB1> INFO: Expecting 2560 events.
[20:34:21.579] <TB1> INFO: 2560 events read in total (293ms).
[20:34:21.579] <TB1> INFO: Test took 1191ms.
[20:34:21.581] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:21.888] <TB1> INFO: Expecting 2560 events.
[20:34:22.777] <TB1> INFO: 2560 events read in total (298ms).
[20:34:22.777] <TB1> INFO: Test took 1196ms.
[20:34:22.779] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:23.085] <TB1> INFO: Expecting 2560 events.
[20:34:23.975] <TB1> INFO: 2560 events read in total (298ms).
[20:34:23.976] <TB1> INFO: Test took 1197ms.
[20:34:23.977] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:24.284] <TB1> INFO: Expecting 2560 events.
[20:34:25.173] <TB1> INFO: 2560 events read in total (297ms).
[20:34:25.173] <TB1> INFO: Test took 1196ms.
[20:34:25.175] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:25.482] <TB1> INFO: Expecting 2560 events.
[20:34:26.366] <TB1> INFO: 2560 events read in total (293ms).
[20:34:26.367] <TB1> INFO: Test took 1192ms.
[20:34:26.368] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:26.675] <TB1> INFO: Expecting 2560 events.
[20:34:27.560] <TB1> INFO: 2560 events read in total (293ms).
[20:34:27.560] <TB1> INFO: Test took 1192ms.
[20:34:27.562] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:27.868] <TB1> INFO: Expecting 2560 events.
[20:34:28.752] <TB1> INFO: 2560 events read in total (292ms).
[20:34:28.752] <TB1> INFO: Test took 1190ms.
[20:34:28.754] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:29.061] <TB1> INFO: Expecting 2560 events.
[20:34:29.941] <TB1> INFO: 2560 events read in total (288ms).
[20:34:29.941] <TB1> INFO: Test took 1187ms.
[20:34:29.943] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:30.250] <TB1> INFO: Expecting 2560 events.
[20:34:31.131] <TB1> INFO: 2560 events read in total (290ms).
[20:34:31.132] <TB1> INFO: Test took 1189ms.
[20:34:31.134] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:31.439] <TB1> INFO: Expecting 2560 events.
[20:34:32.320] <TB1> INFO: 2560 events read in total (289ms).
[20:34:32.321] <TB1> INFO: Test took 1187ms.
[20:34:32.323] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:32.629] <TB1> INFO: Expecting 2560 events.
[20:34:33.513] <TB1> INFO: 2560 events read in total (293ms).
[20:34:33.514] <TB1> INFO: Test took 1191ms.
[20:34:33.515] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:33.822] <TB1> INFO: Expecting 2560 events.
[20:34:34.702] <TB1> INFO: 2560 events read in total (289ms).
[20:34:34.702] <TB1> INFO: Test took 1187ms.
[20:34:34.704] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:35.011] <TB1> INFO: Expecting 2560 events.
[20:34:35.895] <TB1> INFO: 2560 events read in total (292ms).
[20:34:35.896] <TB1> INFO: Test took 1192ms.
[20:34:35.898] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:36.204] <TB1> INFO: Expecting 2560 events.
[20:34:37.089] <TB1> INFO: 2560 events read in total (294ms).
[20:34:37.089] <TB1> INFO: Test took 1192ms.
[20:34:37.091] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:37.398] <TB1> INFO: Expecting 2560 events.
[20:34:38.279] <TB1> INFO: 2560 events read in total (290ms).
[20:34:38.279] <TB1> INFO: Test took 1188ms.
[20:34:38.281] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:38.586] <TB1> INFO: Expecting 2560 events.
[20:34:39.466] <TB1> INFO: 2560 events read in total (288ms).
[20:34:39.467] <TB1> INFO: Test took 1186ms.
[20:34:39.469] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:39.775] <TB1> INFO: Expecting 2560 events.
[20:34:40.655] <TB1> INFO: 2560 events read in total (288ms).
[20:34:40.655] <TB1> INFO: Test took 1186ms.
[20:34:40.657] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:40.964] <TB1> INFO: Expecting 2560 events.
[20:34:41.850] <TB1> INFO: 2560 events read in total (295ms).
[20:34:41.850] <TB1> INFO: Test took 1193ms.
[20:34:41.852] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:42.158] <TB1> INFO: Expecting 2560 events.
[20:34:43.038] <TB1> INFO: 2560 events read in total (288ms).
[20:34:43.038] <TB1> INFO: Test took 1186ms.
[20:34:43.040] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:43.347] <TB1> INFO: Expecting 2560 events.
[20:34:44.228] <TB1> INFO: 2560 events read in total (289ms).
[20:34:44.229] <TB1> INFO: Test took 1189ms.
[20:34:44.231] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:44.536] <TB1> INFO: Expecting 2560 events.
[20:34:45.416] <TB1> INFO: 2560 events read in total (288ms).
[20:34:45.417] <TB1> INFO: Test took 1186ms.
[20:34:45.418] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:45.725] <TB1> INFO: Expecting 2560 events.
[20:34:46.606] <TB1> INFO: 2560 events read in total (289ms).
[20:34:46.606] <TB1> INFO: Test took 1188ms.
[20:34:46.608] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:46.914] <TB1> INFO: Expecting 2560 events.
[20:34:47.799] <TB1> INFO: 2560 events read in total (294ms).
[20:34:47.800] <TB1> INFO: Test took 1192ms.
[20:34:47.801] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:48.108] <TB1> INFO: Expecting 2560 events.
[20:34:48.992] <TB1> INFO: 2560 events read in total (293ms).
[20:34:48.993] <TB1> INFO: Test took 1192ms.
[20:34:48.995] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:49.300] <TB1> INFO: Expecting 2560 events.
[20:34:50.185] <TB1> INFO: 2560 events read in total (293ms).
[20:34:50.185] <TB1> INFO: Test took 1191ms.
[20:34:50.187] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:50.493] <TB1> INFO: Expecting 2560 events.
[20:34:51.378] <TB1> INFO: 2560 events read in total (293ms).
[20:34:51.378] <TB1> INFO: Test took 1191ms.
[20:34:51.380] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:51.686] <TB1> INFO: Expecting 2560 events.
[20:34:52.570] <TB1> INFO: 2560 events read in total (293ms).
[20:34:52.570] <TB1> INFO: Test took 1190ms.
[20:34:52.572] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:52.879] <TB1> INFO: Expecting 2560 events.
[20:34:53.763] <TB1> INFO: 2560 events read in total (293ms).
[20:34:53.764] <TB1> INFO: Test took 1192ms.
[20:34:53.766] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:54.072] <TB1> INFO: Expecting 2560 events.
[20:34:54.963] <TB1> INFO: 2560 events read in total (299ms).
[20:34:54.963] <TB1> INFO: Test took 1198ms.
[20:34:54.965] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:55.271] <TB1> INFO: Expecting 2560 events.
[20:34:56.155] <TB1> INFO: 2560 events read in total (292ms).
[20:34:56.155] <TB1> INFO: Test took 1190ms.
[20:34:56.157] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:34:56.463] <TB1> INFO: Expecting 2560 events.
[20:34:57.347] <TB1> INFO: 2560 events read in total (292ms).
[20:34:57.347] <TB1> INFO: Test took 1190ms.
[20:34:57.807] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 341 seconds
[20:34:57.807] <TB1> INFO: PH scale (per ROC): 39 45 36 45 41 48 47 44 45 46 40 49 48 28 34 31
[20:34:57.807] <TB1> INFO: PH offset (per ROC): 81 109 91 103 95 112 98 103 84 93 89 108 96 99 97 83
[20:34:57.812] <TB1> INFO: Decoding statistics:
[20:34:57.812] <TB1> INFO: General information:
[20:34:57.812] <TB1> INFO: 16bit words read: 127634
[20:34:57.813] <TB1> INFO: valid events total: 20480
[20:34:57.813] <TB1> INFO: empty events: 18103
[20:34:57.813] <TB1> INFO: valid events with pixels: 2377
[20:34:57.813] <TB1> INFO: valid pixel hits: 2377
[20:34:57.813] <TB1> INFO: Event errors: 0
[20:34:57.813] <TB1> INFO: start marker: 0
[20:34:57.813] <TB1> INFO: stop marker: 0
[20:34:57.813] <TB1> INFO: overflow: 0
[20:34:57.813] <TB1> INFO: invalid 5bit words: 0
[20:34:57.813] <TB1> INFO: invalid XOR eye diagram: 0
[20:34:57.813] <TB1> INFO: frame (failed synchr.): 0
[20:34:57.813] <TB1> INFO: idle data (no TBM trl): 0
[20:34:57.813] <TB1> INFO: no data (only TBM hdr): 0
[20:34:57.813] <TB1> INFO: TBM errors: 0
[20:34:57.813] <TB1> INFO: flawed TBM headers: 0
[20:34:57.813] <TB1> INFO: flawed TBM trailers: 0
[20:34:57.813] <TB1> INFO: event ID mismatches: 0
[20:34:57.813] <TB1> INFO: ROC errors: 0
[20:34:57.813] <TB1> INFO: missing ROC header(s): 0
[20:34:57.813] <TB1> INFO: misplaced readback start: 0
[20:34:57.813] <TB1> INFO: Pixel decoding errors: 0
[20:34:57.813] <TB1> INFO: pixel data incomplete: 0
[20:34:57.813] <TB1> INFO: pixel address: 0
[20:34:57.813] <TB1> INFO: pulse height fill bit: 0
[20:34:57.813] <TB1> INFO: buffer corruption: 0
[20:34:58.078] <TB1> INFO: ######################################################################
[20:34:58.078] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[20:34:58.078] <TB1> INFO: ######################################################################
[20:34:58.089] <TB1> INFO: scanning low vcal = 10
[20:34:58.320] <TB1> INFO: Expecting 41600 events.
[20:35:01.922] <TB1> INFO: 41600 events read in total (3010ms).
[20:35:01.922] <TB1> INFO: Test took 3833ms.
[20:35:01.923] <TB1> INFO: scanning low vcal = 20
[20:35:02.223] <TB1> INFO: Expecting 41600 events.
[20:35:05.797] <TB1> INFO: 41600 events read in total (2982ms).
[20:35:05.798] <TB1> INFO: Test took 3875ms.
[20:35:05.799] <TB1> INFO: scanning low vcal = 30
[20:35:06.109] <TB1> INFO: Expecting 41600 events.
[20:35:09.792] <TB1> INFO: 41600 events read in total (3092ms).
[20:35:09.793] <TB1> INFO: Test took 3994ms.
[20:35:09.795] <TB1> INFO: scanning low vcal = 40
[20:35:10.072] <TB1> INFO: Expecting 41600 events.
[20:35:14.139] <TB1> INFO: 41600 events read in total (3475ms).
[20:35:14.141] <TB1> INFO: Test took 4346ms.
[20:35:14.144] <TB1> INFO: scanning low vcal = 50
[20:35:14.420] <TB1> INFO: Expecting 41600 events.
[20:35:18.497] <TB1> INFO: 41600 events read in total (3485ms).
[20:35:18.498] <TB1> INFO: Test took 4354ms.
[20:35:18.501] <TB1> INFO: scanning low vcal = 60
[20:35:18.812] <TB1> INFO: Expecting 41600 events.
[20:35:22.831] <TB1> INFO: 41600 events read in total (3428ms).
[20:35:22.831] <TB1> INFO: Test took 4330ms.
[20:35:22.834] <TB1> INFO: scanning low vcal = 70
[20:35:23.111] <TB1> INFO: Expecting 41600 events.
[20:35:27.113] <TB1> INFO: 41600 events read in total (3411ms).
[20:35:27.114] <TB1> INFO: Test took 4280ms.
[20:35:27.117] <TB1> INFO: scanning low vcal = 80
[20:35:27.393] <TB1> INFO: Expecting 41600 events.
[20:35:31.383] <TB1> INFO: 41600 events read in total (3398ms).
[20:35:31.384] <TB1> INFO: Test took 4267ms.
[20:35:31.387] <TB1> INFO: scanning low vcal = 90
[20:35:31.663] <TB1> INFO: Expecting 41600 events.
[20:35:35.619] <TB1> INFO: 41600 events read in total (3364ms).
[20:35:35.619] <TB1> INFO: Test took 4232ms.
[20:35:35.622] <TB1> INFO: scanning low vcal = 100
[20:35:35.934] <TB1> INFO: Expecting 41600 events.
[20:35:39.990] <TB1> INFO: 41600 events read in total (3464ms).
[20:35:39.991] <TB1> INFO: Test took 4369ms.
[20:35:39.994] <TB1> INFO: scanning low vcal = 110
[20:35:40.307] <TB1> INFO: Expecting 41600 events.
[20:35:44.320] <TB1> INFO: 41600 events read in total (3421ms).
[20:35:44.321] <TB1> INFO: Test took 4327ms.
[20:35:44.323] <TB1> INFO: scanning low vcal = 120
[20:35:44.632] <TB1> INFO: Expecting 41600 events.
[20:35:48.645] <TB1> INFO: 41600 events read in total (3421ms).
[20:35:48.645] <TB1> INFO: Test took 4322ms.
[20:35:48.648] <TB1> INFO: scanning low vcal = 130
[20:35:48.925] <TB1> INFO: Expecting 41600 events.
[20:35:52.880] <TB1> INFO: 41600 events read in total (3364ms).
[20:35:52.881] <TB1> INFO: Test took 4233ms.
[20:35:52.884] <TB1> INFO: scanning low vcal = 140
[20:35:53.192] <TB1> INFO: Expecting 41600 events.
[20:35:57.147] <TB1> INFO: 41600 events read in total (3364ms).
[20:35:57.148] <TB1> INFO: Test took 4264ms.
[20:35:57.150] <TB1> INFO: scanning low vcal = 150
[20:35:57.427] <TB1> INFO: Expecting 41600 events.
[20:36:01.415] <TB1> INFO: 41600 events read in total (3396ms).
[20:36:01.415] <TB1> INFO: Test took 4265ms.
[20:36:01.418] <TB1> INFO: scanning low vcal = 160
[20:36:01.695] <TB1> INFO: Expecting 41600 events.
[20:36:05.718] <TB1> INFO: 41600 events read in total (3431ms).
[20:36:05.719] <TB1> INFO: Test took 4301ms.
[20:36:05.722] <TB1> INFO: scanning low vcal = 170
[20:36:05.998] <TB1> INFO: Expecting 41600 events.
[20:36:09.997] <TB1> INFO: 41600 events read in total (3407ms).
[20:36:09.998] <TB1> INFO: Test took 4276ms.
[20:36:09.000] <TB1> INFO: scanning low vcal = 180
[20:36:10.277] <TB1> INFO: Expecting 41600 events.
[20:36:14.233] <TB1> INFO: 41600 events read in total (3365ms).
[20:36:14.234] <TB1> INFO: Test took 4234ms.
[20:36:14.236] <TB1> INFO: scanning low vcal = 190
[20:36:14.546] <TB1> INFO: Expecting 41600 events.
[20:36:18.534] <TB1> INFO: 41600 events read in total (3396ms).
[20:36:18.535] <TB1> INFO: Test took 4298ms.
[20:36:18.538] <TB1> INFO: scanning low vcal = 200
[20:36:18.814] <TB1> INFO: Expecting 41600 events.
[20:36:22.802] <TB1> INFO: 41600 events read in total (3396ms).
[20:36:22.803] <TB1> INFO: Test took 4265ms.
[20:36:22.806] <TB1> INFO: scanning low vcal = 210
[20:36:23.083] <TB1> INFO: Expecting 41600 events.
[20:36:27.069] <TB1> INFO: 41600 events read in total (3395ms).
[20:36:27.070] <TB1> INFO: Test took 4264ms.
[20:36:27.073] <TB1> INFO: scanning low vcal = 220
[20:36:27.350] <TB1> INFO: Expecting 41600 events.
[20:36:31.344] <TB1> INFO: 41600 events read in total (3403ms).
[20:36:31.345] <TB1> INFO: Test took 4272ms.
[20:36:31.347] <TB1> INFO: scanning low vcal = 230
[20:36:31.624] <TB1> INFO: Expecting 41600 events.
[20:36:35.650] <TB1> INFO: 41600 events read in total (3434ms).
[20:36:35.651] <TB1> INFO: Test took 4304ms.
[20:36:35.653] <TB1> INFO: scanning low vcal = 240
[20:36:35.930] <TB1> INFO: Expecting 41600 events.
[20:36:39.941] <TB1> INFO: 41600 events read in total (3419ms).
[20:36:39.942] <TB1> INFO: Test took 4288ms.
[20:36:39.945] <TB1> INFO: scanning low vcal = 250
[20:36:40.253] <TB1> INFO: Expecting 41600 events.
[20:36:44.258] <TB1> INFO: 41600 events read in total (3414ms).
[20:36:44.259] <TB1> INFO: Test took 4314ms.
[20:36:44.263] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[20:36:44.539] <TB1> INFO: Expecting 41600 events.
[20:36:48.574] <TB1> INFO: 41600 events read in total (3443ms).
[20:36:48.575] <TB1> INFO: Test took 4312ms.
[20:36:48.577] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[20:36:48.854] <TB1> INFO: Expecting 41600 events.
[20:36:52.809] <TB1> INFO: 41600 events read in total (3364ms).
[20:36:52.810] <TB1> INFO: Test took 4233ms.
[20:36:52.812] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[20:36:53.126] <TB1> INFO: Expecting 41600 events.
[20:36:57.063] <TB1> INFO: 41600 events read in total (3346ms).
[20:36:57.064] <TB1> INFO: Test took 4251ms.
[20:36:57.066] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[20:36:57.374] <TB1> INFO: Expecting 41600 events.
[20:37:01.394] <TB1> INFO: 41600 events read in total (3428ms).
[20:37:01.395] <TB1> INFO: Test took 4329ms.
[20:37:01.398] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[20:37:01.706] <TB1> INFO: Expecting 41600 events.
[20:37:05.681] <TB1> INFO: 41600 events read in total (3383ms).
[20:37:05.682] <TB1> INFO: Test took 4284ms.
[20:37:06.046] <TB1> INFO: PixTestGainPedestal::measure() done
[20:37:38.266] <TB1> INFO: PixTestGainPedestal::fit() done
[20:37:38.266] <TB1> INFO: non-linearity mean: 0.931 0.946 0.965 0.965 0.932 0.972 0.934 0.941 0.960 0.963 0.959 0.973 0.966 1.020 0.999 0.987
[20:37:38.266] <TB1> INFO: non-linearity RMS: 0.130 0.057 0.162 0.038 0.093 0.009 0.074 0.090 0.037 0.039 0.071 0.015 0.019 0.168 0.163 0.179
[20:37:38.266] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C0.dat
[20:37:38.280] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C1.dat
[20:37:38.293] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C2.dat
[20:37:38.306] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C3.dat
[20:37:38.320] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C4.dat
[20:37:38.333] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C5.dat
[20:37:38.346] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C6.dat
[20:37:38.360] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C7.dat
[20:37:38.373] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C8.dat
[20:37:38.387] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C9.dat
[20:37:38.400] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C10.dat
[20:37:38.413] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C11.dat
[20:37:38.427] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C12.dat
[20:37:38.440] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C13.dat
[20:37:38.454] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C14.dat
[20:37:38.468] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//002_Fulltest_p17//phCalibrationFitErr35_C15.dat
[20:37:38.481] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[20:37:38.481] <TB1> INFO: Decoding statistics:
[20:37:38.481] <TB1> INFO: General information:
[20:37:38.481] <TB1> INFO: 16bit words read: 3212566
[20:37:38.481] <TB1> INFO: valid events total: 332800
[20:37:38.481] <TB1> INFO: empty events: 5020
[20:37:38.481] <TB1> INFO: valid events with pixels: 327780
[20:37:38.481] <TB1> INFO: valid pixel hits: 607883
[20:37:38.481] <TB1> INFO: Event errors: 0
[20:37:38.482] <TB1> INFO: start marker: 0
[20:37:38.482] <TB1> INFO: stop marker: 0
[20:37:38.482] <TB1> INFO: overflow: 0
[20:37:38.482] <TB1> INFO: invalid 5bit words: 0
[20:37:38.482] <TB1> INFO: invalid XOR eye diagram: 0
[20:37:38.482] <TB1> INFO: frame (failed synchr.): 0
[20:37:38.482] <TB1> INFO: idle data (no TBM trl): 0
[20:37:38.482] <TB1> INFO: no data (only TBM hdr): 0
[20:37:38.482] <TB1> INFO: TBM errors: 0
[20:37:38.482] <TB1> INFO: flawed TBM headers: 0
[20:37:38.482] <TB1> INFO: flawed TBM trailers: 0
[20:37:38.482] <TB1> INFO: event ID mismatches: 0
[20:37:38.482] <TB1> INFO: ROC errors: 0
[20:37:38.482] <TB1> INFO: missing ROC header(s): 0
[20:37:38.482] <TB1> INFO: misplaced readback start: 0
[20:37:38.482] <TB1> INFO: Pixel decoding errors: 0
[20:37:38.482] <TB1> INFO: pixel data incomplete: 0
[20:37:38.482] <TB1> INFO: pixel address: 0
[20:37:38.482] <TB1> INFO: pulse height fill bit: 0
[20:37:38.482] <TB1> INFO: buffer corruption: 0
[20:37:38.495] <TB1> INFO: Decoding statistics:
[20:37:38.495] <TB1> INFO: General information:
[20:37:38.495] <TB1> INFO: 16bit words read: 3341736
[20:37:38.495] <TB1> INFO: valid events total: 353536
[20:37:38.495] <TB1> INFO: empty events: 23379
[20:37:38.495] <TB1> INFO: valid events with pixels: 330157
[20:37:38.495] <TB1> INFO: valid pixel hits: 610260
[20:37:38.495] <TB1> INFO: Event errors: 0
[20:37:38.495] <TB1> INFO: start marker: 0
[20:37:38.495] <TB1> INFO: stop marker: 0
[20:37:38.495] <TB1> INFO: overflow: 0
[20:37:38.495] <TB1> INFO: invalid 5bit words: 0
[20:37:38.495] <TB1> INFO: invalid XOR eye diagram: 0
[20:37:38.495] <TB1> INFO: frame (failed synchr.): 0
[20:37:38.495] <TB1> INFO: idle data (no TBM trl): 0
[20:37:38.495] <TB1> INFO: no data (only TBM hdr): 0
[20:37:38.495] <TB1> INFO: TBM errors: 0
[20:37:38.496] <TB1> INFO: flawed TBM headers: 0
[20:37:38.496] <TB1> INFO: flawed TBM trailers: 0
[20:37:38.496] <TB1> INFO: event ID mismatches: 0
[20:37:38.496] <TB1> INFO: ROC errors: 0
[20:37:38.496] <TB1> INFO: missing ROC header(s): 0
[20:37:38.496] <TB1> INFO: misplaced readback start: 0
[20:37:38.496] <TB1> INFO: Pixel decoding errors: 0
[20:37:38.496] <TB1> INFO: pixel data incomplete: 0
[20:37:38.496] <TB1> INFO: pixel address: 0
[20:37:38.496] <TB1> INFO: pulse height fill bit: 0
[20:37:38.496] <TB1> INFO: buffer corruption: 0
[20:37:38.496] <TB1> INFO: enter test to run
[20:37:38.496] <TB1> INFO: test: exit no parameter change
[20:37:38.520] <TB1> QUIET: Connection to board 153 closed.
[20:37:38.521] <TB1> INFO: pXar: this is the end, my friend