[15:59:03.262] <TB3> INFO: *** Welcome to pxar ***
[15:59:03.262] <TB3> INFO: *** Today: 2016/10/25
[15:59:03.269] <TB3> INFO: *** Version: c8ba-dirty
[15:59:03.269] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[15:59:03.270] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[15:59:03.270] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//defaultMaskFile.dat
[15:59:03.270] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C15.dat
[15:59:03.335] <TB3> INFO: clk: 4
[15:59:03.335] <TB3> INFO: ctr: 4
[15:59:03.335] <TB3> INFO: sda: 19
[15:59:03.335] <TB3> INFO: tin: 9
[15:59:03.335] <TB3> INFO: level: 15
[15:59:03.335] <TB3> INFO: triggerdelay: 0
[15:59:03.335] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[15:59:03.335] <TB3> INFO: Log level: INFO
[15:59:03.344] <TB3> INFO: Found DTB DTB_WWVASW
[15:59:03.353] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[15:59:03.356] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[15:59:03.358] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[15:59:04.854] <TB3> INFO: DUT info:
[15:59:04.854] <TB3> INFO: The DUT currently contains the following objects:
[15:59:04.854] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[15:59:04.855] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:59:04.855] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:59:04.855] <TB3> INFO: TBM Core alpha (2): 7 registers set
[15:59:04.855] <TB3> INFO: TBM Core beta (3): 7 registers set
[15:59:04.855] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[15:59:04.855] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:04.855] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:59:05.259] <TB3> INFO: enter 'restricted' command line mode
[15:59:05.259] <TB3> INFO: enter test to run
[15:59:05.260] <TB3> INFO: test: pretest no parameter change
[15:59:05.260] <TB3> INFO: running: pretest
[15:59:05.268] <TB3> INFO: ######################################################################
[15:59:05.268] <TB3> INFO: PixTestPretest::doTest()
[15:59:05.268] <TB3> INFO: ######################################################################
[15:59:05.269] <TB3> INFO: ----------------------------------------------------------------------
[15:59:05.269] <TB3> INFO: PixTestPretest::programROC()
[15:59:05.269] <TB3> INFO: ----------------------------------------------------------------------
[15:59:23.284] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:59:23.284] <TB3> INFO: IA differences per ROC: 19.3 20.1 17.7 20.9 20.1 16.9 20.9 16.9 18.5 18.5 17.7 19.3 20.9 19.3 20.1 18.5
[15:59:23.346] <TB3> INFO: ----------------------------------------------------------------------
[15:59:23.346] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:59:23.346] <TB3> INFO: ----------------------------------------------------------------------
[15:59:44.650] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[15:59:44.650] <TB3> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 19.3 20.1 20.1 18.5 18.5 20.9 20.9 20.1 17.7 20.1 20.9 19.3 20.1
[15:59:44.686] <TB3> INFO: ----------------------------------------------------------------------
[15:59:44.686] <TB3> INFO: PixTestPretest::findTiming()
[15:59:44.686] <TB3> INFO: ----------------------------------------------------------------------
[15:59:44.686] <TB3> INFO: PixTestCmd::init()

[16:00:16.250] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:00:16.250] <TB3> INFO: (success/tries = 100/100), width = 3
[16:00:17.752] <TB3> INFO: ----------------------------------------------------------------------
[16:00:17.752] <TB3> INFO: PixTestPretest::findWorkingPixel()
[16:00:17.752] <TB3> INFO: ----------------------------------------------------------------------
[16:00:17.846] <TB3> INFO: Expecting 231680 events.
[16:00:27.835] <TB3> INFO: 231680 events read in total (9398ms).
[16:00:27.846] <TB3> INFO: Test took 10090ms.
[16:00:28.094] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:00:28.128] <TB3> INFO: ----------------------------------------------------------------------
[16:00:28.128] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[16:00:28.128] <TB3> INFO: ----------------------------------------------------------------------
[16:00:28.223] <TB3> INFO: Expecting 231680 events.
[16:00:38.410] <TB3> INFO: 231680 events read in total (9595ms).
[16:00:38.421] <TB3> INFO: Test took 10287ms.
[16:00:38.690] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[16:00:38.690] <TB3> INFO: CalDel: 93 102 112 87 93 84 93 93 103 99 86 108 99 110 99 111
[16:00:38.690] <TB3> INFO: VthrComp: 51 51 52 54 51 52 51 51 54 51 51 51 51 51 51 51
[16:00:38.694] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat
[16:00:38.695] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C1.dat
[16:00:38.695] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C2.dat
[16:00:38.695] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C3.dat
[16:00:38.695] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C4.dat
[16:00:38.696] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C5.dat
[16:00:38.696] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C6.dat
[16:00:38.696] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C7.dat
[16:00:38.696] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C8.dat
[16:00:38.696] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C9.dat
[16:00:38.697] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C10.dat
[16:00:38.697] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C11.dat
[16:00:38.697] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C12.dat
[16:00:38.697] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C13.dat
[16:00:38.697] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C14.dat
[16:00:38.697] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[16:00:38.698] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat
[16:00:38.698] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0b.dat
[16:00:38.698] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1a.dat
[16:00:38.698] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[16:00:38.698] <TB3> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[16:00:38.751] <TB3> INFO: enter test to run
[16:00:38.751] <TB3> INFO: test: FullTest no parameter change
[16:00:38.751] <TB3> INFO: running: fulltest
[16:00:38.752] <TB3> INFO: ######################################################################
[16:00:38.752] <TB3> INFO: PixTestFullTest::doTest()
[16:00:38.752] <TB3> INFO: ######################################################################
[16:00:38.753] <TB3> INFO: ######################################################################
[16:00:38.753] <TB3> INFO: PixTestAlive::doTest()
[16:00:38.753] <TB3> INFO: ######################################################################
[16:00:38.754] <TB3> INFO: ----------------------------------------------------------------------
[16:00:38.754] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:38.754] <TB3> INFO: ----------------------------------------------------------------------
[16:00:38.992] <TB3> INFO: Expecting 41600 events.
[16:00:42.638] <TB3> INFO: 41600 events read in total (3054ms).
[16:00:42.639] <TB3> INFO: Test took 3883ms.
[16:00:42.871] <TB3> INFO: PixTestAlive::aliveTest() done
[16:00:42.871] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:42.873] <TB3> INFO: ----------------------------------------------------------------------
[16:00:42.873] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:42.873] <TB3> INFO: ----------------------------------------------------------------------
[16:00:43.119] <TB3> INFO: Expecting 41600 events.
[16:00:46.157] <TB3> INFO: 41600 events read in total (2447ms).
[16:00:46.158] <TB3> INFO: Test took 3281ms.
[16:00:46.158] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:00:46.396] <TB3> INFO: PixTestAlive::maskTest() done
[16:00:46.396] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:46.398] <TB3> INFO: ----------------------------------------------------------------------
[16:00:46.398] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:46.398] <TB3> INFO: ----------------------------------------------------------------------
[16:00:46.643] <TB3> INFO: Expecting 41600 events.
[16:00:50.203] <TB3> INFO: 41600 events read in total (2969ms).
[16:00:50.203] <TB3> INFO: Test took 3803ms.
[16:00:50.440] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[16:00:50.440] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:50.440] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:00:50.440] <TB3> INFO: Decoding statistics:
[16:00:50.440] <TB3> INFO: General information:
[16:00:50.440] <TB3> INFO: 16bit words read: 0
[16:00:50.440] <TB3> INFO: valid events total: 0
[16:00:50.440] <TB3> INFO: empty events: 0
[16:00:50.440] <TB3> INFO: valid events with pixels: 0
[16:00:50.440] <TB3> INFO: valid pixel hits: 0
[16:00:50.440] <TB3> INFO: Event errors: 0
[16:00:50.440] <TB3> INFO: start marker: 0
[16:00:50.440] <TB3> INFO: stop marker: 0
[16:00:50.440] <TB3> INFO: overflow: 0
[16:00:50.440] <TB3> INFO: invalid 5bit words: 0
[16:00:50.440] <TB3> INFO: invalid XOR eye diagram: 0
[16:00:50.440] <TB3> INFO: frame (failed synchr.): 0
[16:00:50.440] <TB3> INFO: idle data (no TBM trl): 0
[16:00:50.440] <TB3> INFO: no data (only TBM hdr): 0
[16:00:50.440] <TB3> INFO: TBM errors: 0
[16:00:50.441] <TB3> INFO: flawed TBM headers: 0
[16:00:50.441] <TB3> INFO: flawed TBM trailers: 0
[16:00:50.441] <TB3> INFO: event ID mismatches: 0
[16:00:50.441] <TB3> INFO: ROC errors: 0
[16:00:50.441] <TB3> INFO: missing ROC header(s): 0
[16:00:50.441] <TB3> INFO: misplaced readback start: 0
[16:00:50.441] <TB3> INFO: Pixel decoding errors: 0
[16:00:50.441] <TB3> INFO: pixel data incomplete: 0
[16:00:50.441] <TB3> INFO: pixel address: 0
[16:00:50.441] <TB3> INFO: pulse height fill bit: 0
[16:00:50.441] <TB3> INFO: buffer corruption: 0
[16:00:50.448] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:50.448] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:00:50.448] <TB3> INFO: ######################################################################
[16:00:50.448] <TB3> INFO: PixTestReadback::doTest()
[16:00:50.448] <TB3> INFO: ######################################################################
[16:00:50.448] <TB3> INFO: ----------------------------------------------------------------------
[16:00:50.448] <TB3> INFO: PixTestReadback::CalibrateVd()
[16:00:50.448] <TB3> INFO: ----------------------------------------------------------------------
[16:01:00.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:01:00.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:01:00.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:01:00.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:01:00.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:01:00.434] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:01:00.465] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:01:00.465] <TB3> INFO: ----------------------------------------------------------------------
[16:01:00.465] <TB3> INFO: PixTestReadback::CalibrateVa()
[16:01:00.465] <TB3> INFO: ----------------------------------------------------------------------
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:01:10.414] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:01:10.444] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:01:10.444] <TB3> INFO: ----------------------------------------------------------------------
[16:01:10.444] <TB3> INFO: PixTestReadback::readbackVbg()
[16:01:10.444] <TB3> INFO: ----------------------------------------------------------------------
[16:01:18.121] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:01:18.121] <TB3> INFO: ----------------------------------------------------------------------
[16:01:18.121] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[16:01:18.121] <TB3> INFO: ----------------------------------------------------------------------
[16:01:18.121] <TB3> INFO: Vbg will be calibrated using Vd calibration
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.5calibrated Vbg = 1.19863 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 141.7calibrated Vbg = 1.1956 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 161.1calibrated Vbg = 1.1909 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.6calibrated Vbg = 1.18521 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.3calibrated Vbg = 1.1946 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.2calibrated Vbg = 1.19703 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.1calibrated Vbg = 1.19922 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.1calibrated Vbg = 1.20114 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 154.8calibrated Vbg = 1.19772 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.3calibrated Vbg = 1.1912 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.8calibrated Vbg = 1.18883 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153.4calibrated Vbg = 1.18284 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.9calibrated Vbg = 1.1871 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 158calibrated Vbg = 1.19046 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159.3calibrated Vbg = 1.19481 :::*/*/*/*/
[16:01:18.121] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 154.7calibrated Vbg = 1.19758 :::*/*/*/*/
[16:01:18.125] <TB3> INFO: ----------------------------------------------------------------------
[16:01:18.125] <TB3> INFO: PixTestReadback::CalibrateIa()
[16:01:18.125] <TB3> INFO: ----------------------------------------------------------------------
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:03:58.932] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:03:58.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:03:58.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:03:58.959] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:03:58.960] <TB3> INFO: PixTestReadback::doTest() done
[16:03:58.961] <TB3> INFO: Decoding statistics:
[16:03:58.961] <TB3> INFO: General information:
[16:03:58.961] <TB3> INFO: 16bit words read: 1536
[16:03:58.961] <TB3> INFO: valid events total: 256
[16:03:58.961] <TB3> INFO: empty events: 256
[16:03:58.961] <TB3> INFO: valid events with pixels: 0
[16:03:58.961] <TB3> INFO: valid pixel hits: 0
[16:03:58.961] <TB3> INFO: Event errors: 0
[16:03:58.961] <TB3> INFO: start marker: 0
[16:03:58.961] <TB3> INFO: stop marker: 0
[16:03:58.961] <TB3> INFO: overflow: 0
[16:03:58.961] <TB3> INFO: invalid 5bit words: 0
[16:03:58.961] <TB3> INFO: invalid XOR eye diagram: 0
[16:03:58.961] <TB3> INFO: frame (failed synchr.): 0
[16:03:58.961] <TB3> INFO: idle data (no TBM trl): 0
[16:03:58.961] <TB3> INFO: no data (only TBM hdr): 0
[16:03:58.961] <TB3> INFO: TBM errors: 0
[16:03:58.961] <TB3> INFO: flawed TBM headers: 0
[16:03:58.961] <TB3> INFO: flawed TBM trailers: 0
[16:03:58.961] <TB3> INFO: event ID mismatches: 0
[16:03:58.961] <TB3> INFO: ROC errors: 0
[16:03:58.961] <TB3> INFO: missing ROC header(s): 0
[16:03:58.961] <TB3> INFO: misplaced readback start: 0
[16:03:58.961] <TB3> INFO: Pixel decoding errors: 0
[16:03:58.961] <TB3> INFO: pixel data incomplete: 0
[16:03:58.961] <TB3> INFO: pixel address: 0
[16:03:58.961] <TB3> INFO: pulse height fill bit: 0
[16:03:58.961] <TB3> INFO: buffer corruption: 0
[16:03:59.021] <TB3> INFO: ######################################################################
[16:03:59.021] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:03:59.021] <TB3> INFO: ######################################################################
[16:03:59.025] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:03:59.074] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:03:59.074] <TB3> INFO: run 1 of 1
[16:03:59.338] <TB3> INFO: Expecting 3120000 events.
[16:04:30.302] <TB3> INFO: 658385 events read in total (30372ms).











[16:05:00.263] <TB3> INFO: 1314185 events read in total (60333ms).











[16:05:30.267] <TB3> INFO: 1970090 events read in total (90337ms).











[16:06:00.362] <TB3> INFO: 2628625 events read in total (120432ms).











[16:06:23.607] <TB3> INFO: 3120000 events read in total (143677ms).
[16:06:23.715] <TB3> INFO: Test took 144642ms.
[16:06:47.680] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 168 seconds
[16:06:47.680] <TB3> INFO: number of dead bumps (per ROC): 0 0 1 0 0 2 8 3 2 0 0 1 1 0 0 0
[16:06:47.680] <TB3> INFO: separation cut (per ROC): 99 102 105 112 109 110 105 84 111 117 107 105 109 117 104 105
[16:06:47.680] <TB3> INFO: Decoding statistics:
[16:06:47.680] <TB3> INFO: General information:
[16:06:47.680] <TB3> INFO: 16bit words read: 0
[16:06:47.680] <TB3> INFO: valid events total: 0
[16:06:47.680] <TB3> INFO: empty events: 0
[16:06:47.680] <TB3> INFO: valid events with pixels: 0
[16:06:47.680] <TB3> INFO: valid pixel hits: 0
[16:06:47.680] <TB3> INFO: Event errors: 0
[16:06:47.680] <TB3> INFO: start marker: 0
[16:06:47.680] <TB3> INFO: stop marker: 0
[16:06:47.680] <TB3> INFO: overflow: 0
[16:06:47.680] <TB3> INFO: invalid 5bit words: 0
[16:06:47.680] <TB3> INFO: invalid XOR eye diagram: 0
[16:06:47.680] <TB3> INFO: frame (failed synchr.): 0
[16:06:47.680] <TB3> INFO: idle data (no TBM trl): 0
[16:06:47.680] <TB3> INFO: no data (only TBM hdr): 0
[16:06:47.680] <TB3> INFO: TBM errors: 0
[16:06:47.680] <TB3> INFO: flawed TBM headers: 0
[16:06:47.680] <TB3> INFO: flawed TBM trailers: 0
[16:06:47.680] <TB3> INFO: event ID mismatches: 0
[16:06:47.680] <TB3> INFO: ROC errors: 0
[16:06:47.680] <TB3> INFO: missing ROC header(s): 0
[16:06:47.680] <TB3> INFO: misplaced readback start: 0
[16:06:47.680] <TB3> INFO: Pixel decoding errors: 0
[16:06:47.680] <TB3> INFO: pixel data incomplete: 0
[16:06:47.680] <TB3> INFO: pixel address: 0
[16:06:47.680] <TB3> INFO: pulse height fill bit: 0
[16:06:47.681] <TB3> INFO: buffer corruption: 0
[16:06:47.727] <TB3> INFO: ######################################################################
[16:06:47.727] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:47.727] <TB3> INFO: ######################################################################
[16:06:47.727] <TB3> INFO: ----------------------------------------------------------------------
[16:06:47.727] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:47.727] <TB3> INFO: ----------------------------------------------------------------------
[16:06:47.727] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:06:47.743] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[16:06:47.743] <TB3> INFO: run 1 of 1
[16:06:47.978] <TB3> INFO: Expecting 36608000 events.
[16:07:11.531] <TB3> INFO: 674400 events read in total (22961ms).
[16:07:34.224] <TB3> INFO: 1335650 events read in total (45654ms).
[16:07:56.832] <TB3> INFO: 1997050 events read in total (68262ms).
[16:08:19.660] <TB3> INFO: 2657200 events read in total (91090ms).
[16:08:42.607] <TB3> INFO: 3317200 events read in total (114037ms).
[16:09:05.293] <TB3> INFO: 3976400 events read in total (136723ms).
[16:09:28.112] <TB3> INFO: 4636400 events read in total (159542ms).
[16:09:50.846] <TB3> INFO: 5296350 events read in total (182276ms).
[16:10:13.607] <TB3> INFO: 5954850 events read in total (205037ms).
[16:10:36.484] <TB3> INFO: 6613900 events read in total (227914ms).
[16:10:59.036] <TB3> INFO: 7272200 events read in total (250466ms).
[16:11:21.569] <TB3> INFO: 7928800 events read in total (272999ms).
[16:11:43.954] <TB3> INFO: 8586400 events read in total (295384ms).
[16:12:06.729] <TB3> INFO: 9245100 events read in total (318159ms).
[16:12:29.204] <TB3> INFO: 9900000 events read in total (340634ms).
[16:12:51.915] <TB3> INFO: 10555900 events read in total (363345ms).
[16:13:14.772] <TB3> INFO: 11209850 events read in total (386202ms).
[16:13:37.350] <TB3> INFO: 11866700 events read in total (408780ms).
[16:13:59.870] <TB3> INFO: 12522800 events read in total (431300ms).
[16:14:22.989] <TB3> INFO: 13179350 events read in total (454419ms).
[16:14:45.303] <TB3> INFO: 13832750 events read in total (476733ms).
[16:15:07.878] <TB3> INFO: 14486150 events read in total (499308ms).
[16:15:30.551] <TB3> INFO: 15139350 events read in total (521981ms).
[16:15:53.166] <TB3> INFO: 15792300 events read in total (544596ms).
[16:16:15.605] <TB3> INFO: 16444850 events read in total (567035ms).
[16:16:38.117] <TB3> INFO: 17097700 events read in total (589547ms).
[16:17:00.915] <TB3> INFO: 17749450 events read in total (612345ms).
[16:17:23.571] <TB3> INFO: 18400500 events read in total (635001ms).
[16:17:46.272] <TB3> INFO: 19051100 events read in total (657702ms).
[16:18:08.873] <TB3> INFO: 19701350 events read in total (680303ms).
[16:18:31.099] <TB3> INFO: 20349650 events read in total (702529ms).
[16:18:53.659] <TB3> INFO: 20999100 events read in total (725089ms).
[16:19:16.463] <TB3> INFO: 21647650 events read in total (747893ms).
[16:19:39.091] <TB3> INFO: 22297650 events read in total (770521ms).
[16:20:01.640] <TB3> INFO: 22945800 events read in total (793070ms).
[16:20:24.424] <TB3> INFO: 23593500 events read in total (815854ms).
[16:20:46.787] <TB3> INFO: 24241250 events read in total (838217ms).
[16:21:09.355] <TB3> INFO: 24888950 events read in total (860786ms).
[16:21:31.716] <TB3> INFO: 25535900 events read in total (883146ms).
[16:21:54.528] <TB3> INFO: 26184150 events read in total (905958ms).
[16:22:16.804] <TB3> INFO: 26831050 events read in total (928234ms).
[16:22:39.325] <TB3> INFO: 27478950 events read in total (950755ms).
[16:23:01.954] <TB3> INFO: 28127050 events read in total (973384ms).
[16:23:24.324] <TB3> INFO: 28772250 events read in total (995754ms).
[16:23:46.615] <TB3> INFO: 29416150 events read in total (1018045ms).
[16:24:09.051] <TB3> INFO: 30061300 events read in total (1040481ms).
[16:24:31.581] <TB3> INFO: 30708400 events read in total (1063011ms).
[16:24:54.088] <TB3> INFO: 31353850 events read in total (1085518ms).
[16:25:16.735] <TB3> INFO: 31999750 events read in total (1108165ms).
[16:25:39.376] <TB3> INFO: 32645400 events read in total (1130806ms).
[16:26:01.683] <TB3> INFO: 33291750 events read in total (1153113ms).
[16:26:24.185] <TB3> INFO: 33939200 events read in total (1175615ms).
[16:26:46.393] <TB3> INFO: 34585500 events read in total (1197823ms).
[16:27:08.899] <TB3> INFO: 35232250 events read in total (1220329ms).
[16:27:31.425] <TB3> INFO: 35880150 events read in total (1242855ms).
[16:27:54.750] <TB3> INFO: 36539400 events read in total (1266180ms).
[16:27:57.662] <TB3> INFO: 36608000 events read in total (1269092ms).
[16:27:57.752] <TB3> INFO: Test took 1270009ms.
[16:27:58.324] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:27:59.974] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:01.575] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:03.194] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:04.944] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:06.816] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:08.296] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:09.805] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:11.327] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:12.782] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:14.245] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:15.703] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:17.168] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:18.632] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:20.479] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:22.528] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:28:24.624] <TB3> INFO: PixTestScurves::scurves() done
[16:28:24.624] <TB3> INFO: Vcal mean: 110.96 107.63 126.12 124.75 117.36 126.76 115.02 110.65 118.53 121.00 112.09 99.44 121.78 116.45 104.58 118.16
[16:28:24.624] <TB3> INFO: Vcal RMS: 4.83 5.33 7.75 6.81 5.96 6.42 6.08 5.46 5.78 5.83 5.60 5.72 6.25 5.57 4.90 6.14
[16:28:24.624] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1296 seconds
[16:28:24.624] <TB3> INFO: Decoding statistics:
[16:28:24.624] <TB3> INFO: General information:
[16:28:24.624] <TB3> INFO: 16bit words read: 0
[16:28:24.624] <TB3> INFO: valid events total: 0
[16:28:24.624] <TB3> INFO: empty events: 0
[16:28:24.624] <TB3> INFO: valid events with pixels: 0
[16:28:24.624] <TB3> INFO: valid pixel hits: 0
[16:28:24.624] <TB3> INFO: Event errors: 0
[16:28:24.624] <TB3> INFO: start marker: 0
[16:28:24.624] <TB3> INFO: stop marker: 0
[16:28:24.624] <TB3> INFO: overflow: 0
[16:28:24.624] <TB3> INFO: invalid 5bit words: 0
[16:28:24.624] <TB3> INFO: invalid XOR eye diagram: 0
[16:28:24.624] <TB3> INFO: frame (failed synchr.): 0
[16:28:24.624] <TB3> INFO: idle data (no TBM trl): 0
[16:28:24.624] <TB3> INFO: no data (only TBM hdr): 0
[16:28:24.624] <TB3> INFO: TBM errors: 0
[16:28:24.624] <TB3> INFO: flawed TBM headers: 0
[16:28:24.624] <TB3> INFO: flawed TBM trailers: 0
[16:28:24.624] <TB3> INFO: event ID mismatches: 0
[16:28:24.624] <TB3> INFO: ROC errors: 0
[16:28:24.624] <TB3> INFO: missing ROC header(s): 0
[16:28:24.624] <TB3> INFO: misplaced readback start: 0
[16:28:24.624] <TB3> INFO: Pixel decoding errors: 0
[16:28:24.624] <TB3> INFO: pixel data incomplete: 0
[16:28:24.624] <TB3> INFO: pixel address: 0
[16:28:24.624] <TB3> INFO: pulse height fill bit: 0
[16:28:24.624] <TB3> INFO: buffer corruption: 0
[16:28:24.695] <TB3> INFO: ######################################################################
[16:28:24.695] <TB3> INFO: PixTestTrim::doTest()
[16:28:24.695] <TB3> INFO: ######################################################################
[16:28:24.696] <TB3> INFO: ----------------------------------------------------------------------
[16:28:24.696] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:28:24.696] <TB3> INFO: ----------------------------------------------------------------------
[16:28:24.738] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:28:24.738] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:28:24.752] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:28:24.752] <TB3> INFO: run 1 of 1
[16:28:25.008] <TB3> INFO: Expecting 5025280 events.
[16:28:55.824] <TB3> INFO: 819640 events read in total (30214ms).
[16:29:25.731] <TB3> INFO: 1637032 events read in total (60121ms).
[16:29:55.858] <TB3> INFO: 2451544 events read in total (90248ms).
[16:30:25.698] <TB3> INFO: 3263488 events read in total (120088ms).
[16:30:55.500] <TB3> INFO: 4073016 events read in total (149890ms).
[16:31:26.721] <TB3> INFO: 4881424 events read in total (181111ms).
[16:31:32.437] <TB3> INFO: 5025280 events read in total (186827ms).
[16:31:32.499] <TB3> INFO: Test took 187747ms.
[16:31:49.176] <TB3> INFO: ROC 0 VthrComp = 116
[16:31:49.176] <TB3> INFO: ROC 1 VthrComp = 112
[16:31:49.176] <TB3> INFO: ROC 2 VthrComp = 122
[16:31:49.176] <TB3> INFO: ROC 3 VthrComp = 126
[16:31:49.176] <TB3> INFO: ROC 4 VthrComp = 126
[16:31:49.176] <TB3> INFO: ROC 5 VthrComp = 130
[16:31:49.176] <TB3> INFO: ROC 6 VthrComp = 113
[16:31:49.176] <TB3> INFO: ROC 7 VthrComp = 103
[16:31:49.176] <TB3> INFO: ROC 8 VthrComp = 129
[16:31:49.176] <TB3> INFO: ROC 9 VthrComp = 128
[16:31:49.177] <TB3> INFO: ROC 10 VthrComp = 116
[16:31:49.177] <TB3> INFO: ROC 11 VthrComp = 103
[16:31:49.178] <TB3> INFO: ROC 12 VthrComp = 129
[16:31:49.178] <TB3> INFO: ROC 13 VthrComp = 128
[16:31:49.178] <TB3> INFO: ROC 14 VthrComp = 111
[16:31:49.178] <TB3> INFO: ROC 15 VthrComp = 119
[16:31:49.476] <TB3> INFO: Expecting 41600 events.
[16:31:52.986] <TB3> INFO: 41600 events read in total (2918ms).
[16:31:52.987] <TB3> INFO: Test took 3807ms.
[16:31:52.999] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:31:52.999] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:31:53.013] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:31:53.013] <TB3> INFO: run 1 of 1
[16:31:53.291] <TB3> INFO: Expecting 5025280 events.
[16:32:19.545] <TB3> INFO: 588944 events read in total (25662ms).
[16:32:45.203] <TB3> INFO: 1176448 events read in total (51320ms).
[16:33:10.961] <TB3> INFO: 1763552 events read in total (77078ms).
[16:33:36.483] <TB3> INFO: 2350600 events read in total (102600ms).
[16:34:02.101] <TB3> INFO: 2935744 events read in total (128218ms).
[16:34:27.993] <TB3> INFO: 3520648 events read in total (154110ms).
[16:34:53.627] <TB3> INFO: 4104912 events read in total (179744ms).
[16:35:19.804] <TB3> INFO: 4689872 events read in total (205921ms).
[16:35:35.957] <TB3> INFO: 5025280 events read in total (222074ms).
[16:35:36.062] <TB3> INFO: Test took 223049ms.
[16:36:02.281] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 59.7866 for pixel 15/13 mean/min/max = 45.9111/31.9683/59.8539
[16:36:02.282] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 60.8562 for pixel 30/79 mean/min/max = 46.2839/31.7108/60.857
[16:36:02.282] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 66.7409 for pixel 14/75 mean/min/max = 48.3846/29.9551/66.8141
[16:36:02.283] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 63.5855 for pixel 2/9 mean/min/max = 47.4386/31.0822/63.7951
[16:36:02.283] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 59.6468 for pixel 0/48 mean/min/max = 45.3547/31.0592/59.6502
[16:36:02.284] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 62.4095 for pixel 51/22 mean/min/max = 47.3884/32.2592/62.5176
[16:36:02.284] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 62.2682 for pixel 8/78 mean/min/max = 47.2938/31.7713/62.8162
[16:36:02.285] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 68.2105 for pixel 14/8 mean/min/max = 50.7291/33.1853/68.2729
[16:36:02.285] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.4608 for pixel 1/7 mean/min/max = 45.9177/31.3123/60.5231
[16:36:02.286] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.6243 for pixel 6/2 mean/min/max = 46.6354/31.4247/61.8462
[16:36:02.286] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.6525 for pixel 23/76 mean/min/max = 46.2613/31.7756/60.7469
[16:36:02.287] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 60.2307 for pixel 16/8 mean/min/max = 46.8798/33.4953/60.2643
[16:36:02.287] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.5265 for pixel 7/67 mean/min/max = 45.2615/31.8332/58.6898
[16:36:02.288] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.2757 for pixel 14/8 mean/min/max = 44.0065/30.7221/57.291
[16:36:02.288] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.6938 for pixel 51/0 mean/min/max = 46.7708/34.6425/58.899
[16:36:02.289] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 61.2556 for pixel 11/75 mean/min/max = 45.7708/30.245/61.2966
[16:36:02.289] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:36:02.378] <TB3> INFO: Expecting 411648 events.
[16:36:12.018] <TB3> INFO: 411648 events read in total (9048ms).
[16:36:12.026] <TB3> INFO: Expecting 411648 events.
[16:36:21.550] <TB3> INFO: 411648 events read in total (9121ms).
[16:36:21.561] <TB3> INFO: Expecting 411648 events.
[16:36:30.993] <TB3> INFO: 411648 events read in total (9029ms).
[16:36:31.007] <TB3> INFO: Expecting 411648 events.
[16:36:40.429] <TB3> INFO: 411648 events read in total (9019ms).
[16:36:40.445] <TB3> INFO: Expecting 411648 events.
[16:36:49.944] <TB3> INFO: 411648 events read in total (9096ms).
[16:36:49.963] <TB3> INFO: Expecting 411648 events.
[16:36:59.460] <TB3> INFO: 411648 events read in total (9093ms).
[16:36:59.488] <TB3> INFO: Expecting 411648 events.
[16:37:08.931] <TB3> INFO: 411648 events read in total (9040ms).
[16:37:08.963] <TB3> INFO: Expecting 411648 events.
[16:37:18.431] <TB3> INFO: 411648 events read in total (9065ms).
[16:37:18.465] <TB3> INFO: Expecting 411648 events.
[16:37:27.981] <TB3> INFO: 411648 events read in total (9113ms).
[16:37:28.018] <TB3> INFO: Expecting 411648 events.
[16:37:37.500] <TB3> INFO: 411648 events read in total (9079ms).
[16:37:37.535] <TB3> INFO: Expecting 411648 events.
[16:37:47.042] <TB3> INFO: 411648 events read in total (9104ms).
[16:37:47.113] <TB3> INFO: Expecting 411648 events.
[16:37:56.511] <TB3> INFO: 411648 events read in total (8995ms).
[16:37:56.551] <TB3> INFO: Expecting 411648 events.
[16:38:05.916] <TB3> INFO: 411648 events read in total (8962ms).
[16:38:05.995] <TB3> INFO: Expecting 411648 events.
[16:38:15.537] <TB3> INFO: 411648 events read in total (9139ms).
[16:38:15.590] <TB3> INFO: Expecting 411648 events.
[16:38:24.917] <TB3> INFO: 411648 events read in total (8924ms).
[16:38:25.032] <TB3> INFO: Expecting 411648 events.
[16:38:34.221] <TB3> INFO: 411648 events read in total (8786ms).
[16:38:34.277] <TB3> INFO: Test took 151988ms.
[16:38:35.027] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:38:35.041] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:38:35.041] <TB3> INFO: run 1 of 1
[16:38:35.278] <TB3> INFO: Expecting 5025280 events.
[16:39:01.663] <TB3> INFO: 587248 events read in total (25794ms).
[16:39:27.493] <TB3> INFO: 1174672 events read in total (51624ms).
[16:39:53.646] <TB3> INFO: 1761152 events read in total (77777ms).
[16:40:19.630] <TB3> INFO: 2346136 events read in total (103761ms).
[16:40:45.860] <TB3> INFO: 2931344 events read in total (129991ms).
[16:41:12.128] <TB3> INFO: 3518136 events read in total (156259ms).
[16:41:38.109] <TB3> INFO: 4104616 events read in total (182240ms).
[16:42:04.378] <TB3> INFO: 4688976 events read in total (208509ms).
[16:42:20.081] <TB3> INFO: 5025280 events read in total (224212ms).
[16:42:20.251] <TB3> INFO: Test took 225211ms.
[16:42:42.383] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.234123 .. 146.715639
[16:42:42.653] <TB3> INFO: Expecting 208000 events.
[16:42:52.493] <TB3> INFO: 208000 events read in total (9248ms).
[16:42:52.494] <TB3> INFO: Test took 10109ms.
[16:42:52.541] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 156 (-1/-1) hits flags = 528 (plus default)
[16:42:52.556] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:42:52.556] <TB3> INFO: run 1 of 1
[16:42:52.834] <TB3> INFO: Expecting 5224960 events.
[16:43:19.144] <TB3> INFO: 585600 events read in total (25719ms).
[16:43:44.698] <TB3> INFO: 1170848 events read in total (51274ms).
[16:44:10.746] <TB3> INFO: 1755888 events read in total (77321ms).
[16:44:36.655] <TB3> INFO: 2340744 events read in total (103230ms).
[16:45:02.690] <TB3> INFO: 2925592 events read in total (129266ms).
[16:45:28.556] <TB3> INFO: 3509696 events read in total (155131ms).
[16:45:54.445] <TB3> INFO: 4094048 events read in total (181020ms).
[16:46:20.354] <TB3> INFO: 4677920 events read in total (206929ms).
[16:46:45.920] <TB3> INFO: 5224960 events read in total (232495ms).
[16:46:46.026] <TB3> INFO: Test took 233471ms.
[16:47:12.213] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.167848 .. 48.078140
[16:47:12.454] <TB3> INFO: Expecting 208000 events.
[16:47:22.276] <TB3> INFO: 208000 events read in total (9230ms).
[16:47:22.277] <TB3> INFO: Test took 10062ms.
[16:47:22.325] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 58 (-1/-1) hits flags = 528 (plus default)
[16:47:22.339] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:47:22.339] <TB3> INFO: run 1 of 1
[16:47:22.617] <TB3> INFO: Expecting 1397760 events.
[16:47:50.718] <TB3> INFO: 647424 events read in total (27510ms).
[16:48:18.424] <TB3> INFO: 1293168 events read in total (55216ms).
[16:48:23.374] <TB3> INFO: 1397760 events read in total (60166ms).
[16:48:23.409] <TB3> INFO: Test took 61071ms.
[16:48:35.808] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 24.466624 .. 50.054281
[16:48:36.047] <TB3> INFO: Expecting 208000 events.
[16:48:45.762] <TB3> INFO: 208000 events read in total (9123ms).
[16:48:45.763] <TB3> INFO: Test took 9953ms.
[16:48:45.810] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 14 .. 60 (-1/-1) hits flags = 528 (plus default)
[16:48:45.825] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:48:45.825] <TB3> INFO: run 1 of 1
[16:48:46.103] <TB3> INFO: Expecting 1564160 events.
[16:49:14.418] <TB3> INFO: 653008 events read in total (27723ms).
[16:49:42.064] <TB3> INFO: 1305168 events read in total (55370ms).
[16:49:53.054] <TB3> INFO: 1564160 events read in total (66359ms).
[16:49:53.086] <TB3> INFO: Test took 67262ms.
[16:50:06.795] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 24.900172 .. 53.959529
[16:50:07.073] <TB3> INFO: Expecting 208000 events.
[16:50:16.813] <TB3> INFO: 208000 events read in total (9148ms).
[16:50:16.814] <TB3> INFO: Test took 10018ms.
[16:50:16.861] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 63 (-1/-1) hits flags = 528 (plus default)
[16:50:16.874] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:50:16.874] <TB3> INFO: run 1 of 1
[16:50:17.152] <TB3> INFO: Expecting 1664000 events.
[16:50:44.929] <TB3> INFO: 644200 events read in total (27185ms).
[16:51:11.845] <TB3> INFO: 1287984 events read in total (54101ms).
[16:51:28.122] <TB3> INFO: 1664000 events read in total (70378ms).
[16:51:28.164] <TB3> INFO: Test took 71290ms.
[16:51:41.429] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:51:41.429] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:51:41.444] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:51:41.444] <TB3> INFO: run 1 of 1
[16:51:41.699] <TB3> INFO: Expecting 1364480 events.
[16:52:09.759] <TB3> INFO: 667032 events read in total (27468ms).
[16:52:37.266] <TB3> INFO: 1333888 events read in total (54976ms).
[16:52:39.006] <TB3> INFO: 1364480 events read in total (56715ms).
[16:52:39.044] <TB3> INFO: Test took 57601ms.
[16:52:51.067] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[16:52:51.067] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[16:52:51.067] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[16:52:51.067] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[16:52:51.067] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[16:52:51.067] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[16:52:51.067] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[16:52:51.068] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[16:52:51.068] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C0.dat
[16:52:51.073] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C1.dat
[16:52:51.078] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C2.dat
[16:52:51.082] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C3.dat
[16:52:51.087] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C4.dat
[16:52:51.092] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C5.dat
[16:52:51.096] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C6.dat
[16:52:51.101] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C7.dat
[16:52:51.106] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C8.dat
[16:52:51.111] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C9.dat
[16:52:51.115] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C10.dat
[16:52:51.120] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C11.dat
[16:52:51.125] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C12.dat
[16:52:51.129] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C13.dat
[16:52:51.134] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C14.dat
[16:52:51.139] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C15.dat
[16:52:51.143] <TB3> INFO: PixTestTrim::trimTest() done
[16:52:51.143] <TB3> INFO: vtrim: 136 138 143 135 131 148 118 133 126 144 123 111 127 139 129 139
[16:52:51.143] <TB3> INFO: vthrcomp: 116 112 122 126 126 130 113 103 129 128 116 103 129 128 111 119
[16:52:51.143] <TB3> INFO: vcal mean: 34.99 34.97 35.03 34.98 34.95 34.98 35.00 36.25 34.90 35.02 34.98 34.95 34.92 34.94 34.96 34.91
[16:52:51.143] <TB3> INFO: vcal RMS: 1.12 1.11 1.33 1.24 1.06 1.17 1.10 2.48 1.11 1.11 1.01 1.03 1.08 1.02 0.96 1.25
[16:52:51.143] <TB3> INFO: bits mean: 9.51 9.79 9.69 9.39 9.59 9.73 9.22 9.27 9.65 9.37 9.51 9.13 9.86 10.31 8.51 10.17
[16:52:51.143] <TB3> INFO: bits RMS: 2.72 2.56 2.69 2.77 2.76 2.44 2.73 2.84 2.72 2.75 2.70 2.60 2.63 2.57 2.71 2.57
[16:52:51.151] <TB3> INFO: ----------------------------------------------------------------------
[16:52:51.151] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[16:52:51.151] <TB3> INFO: ----------------------------------------------------------------------
[16:52:51.154] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[16:52:51.167] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:52:51.167] <TB3> INFO: run 1 of 1
[16:52:51.436] <TB3> INFO: Expecting 4160000 events.
[16:53:23.511] <TB3> INFO: 742455 events read in total (31483ms).
[16:53:55.100] <TB3> INFO: 1477965 events read in total (63072ms).
[16:54:26.425] <TB3> INFO: 2207785 events read in total (94397ms).
[16:54:57.663] <TB3> INFO: 2932450 events read in total (125635ms).
[16:55:29.838] <TB3> INFO: 3654540 events read in total (157810ms).
[16:55:51.597] <TB3> INFO: 4160000 events read in total (179569ms).
[16:55:51.699] <TB3> INFO: Test took 180532ms.
[16:56:14.982] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[16:56:14.996] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:56:14.996] <TB3> INFO: run 1 of 1
[16:56:15.232] <TB3> INFO: Expecting 4264000 events.
[16:56:46.612] <TB3> INFO: 710420 events read in total (30789ms).
[16:57:17.270] <TB3> INFO: 1415480 events read in total (61447ms).
[16:57:47.913] <TB3> INFO: 2115880 events read in total (92090ms).
[16:58:18.368] <TB3> INFO: 2812055 events read in total (122545ms).
[16:58:49.092] <TB3> INFO: 3505630 events read in total (153269ms).
[16:59:20.363] <TB3> INFO: 4200055 events read in total (184540ms).
[16:59:23.414] <TB3> INFO: 4264000 events read in total (187591ms).
[16:59:23.511] <TB3> INFO: Test took 188515ms.
[16:59:51.284] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[16:59:51.297] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:59:51.297] <TB3> INFO: run 1 of 1
[16:59:51.534] <TB3> INFO: Expecting 4201600 events.
[17:00:22.898] <TB3> INFO: 714005 events read in total (30772ms).
[17:00:53.670] <TB3> INFO: 1422375 events read in total (61544ms).
[17:01:24.489] <TB3> INFO: 2126195 events read in total (92363ms).
[17:01:55.085] <TB3> INFO: 2825565 events read in total (122959ms).
[17:02:27.495] <TB3> INFO: 3522470 events read in total (155369ms).
[17:02:56.920] <TB3> INFO: 4201600 events read in total (184794ms).
[17:02:57.014] <TB3> INFO: Test took 185717ms.
[17:03:22.615] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 189 (-1/-1) hits flags = 528 (plus default)
[17:03:22.629] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:03:22.630] <TB3> INFO: run 1 of 1
[17:03:22.908] <TB3> INFO: Expecting 3952000 events.
[17:03:54.601] <TB3> INFO: 729590 events read in total (31102ms).
[17:04:25.449] <TB3> INFO: 1452955 events read in total (61950ms).
[17:04:56.320] <TB3> INFO: 2169725 events read in total (92821ms).
[17:05:26.928] <TB3> INFO: 2882460 events read in total (123429ms).
[17:05:57.844] <TB3> INFO: 3593145 events read in total (154345ms).
[17:06:13.700] <TB3> INFO: 3952000 events read in total (170201ms).
[17:06:13.820] <TB3> INFO: Test took 171190ms.
[17:06:39.053] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 190 (-1/-1) hits flags = 528 (plus default)
[17:06:39.068] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:06:39.068] <TB3> INFO: run 1 of 1
[17:06:39.322] <TB3> INFO: Expecting 3972800 events.
[17:07:11.395] <TB3> INFO: 728530 events read in total (31481ms).
[17:07:42.155] <TB3> INFO: 1450720 events read in total (62241ms).
[17:08:12.906] <TB3> INFO: 2166565 events read in total (92992ms).
[17:08:43.396] <TB3> INFO: 2878160 events read in total (123482ms).
[17:09:14.054] <TB3> INFO: 3587670 events read in total (154140ms).
[17:09:30.620] <TB3> INFO: 3972800 events read in total (170706ms).
[17:09:30.700] <TB3> INFO: Test took 171632ms.
[17:10:00.007] <TB3> INFO: PixTestTrim::trimBitTest() done
[17:10:00.008] <TB3> INFO: PixTestTrim::doTest() done, duration: 2495 seconds
[17:10:00.009] <TB3> INFO: Decoding statistics:
[17:10:00.009] <TB3> INFO: General information:
[17:10:00.009] <TB3> INFO: 16bit words read: 0
[17:10:00.009] <TB3> INFO: valid events total: 0
[17:10:00.009] <TB3> INFO: empty events: 0
[17:10:00.009] <TB3> INFO: valid events with pixels: 0
[17:10:00.009] <TB3> INFO: valid pixel hits: 0
[17:10:00.009] <TB3> INFO: Event errors: 0
[17:10:00.009] <TB3> INFO: start marker: 0
[17:10:00.009] <TB3> INFO: stop marker: 0
[17:10:00.009] <TB3> INFO: overflow: 0
[17:10:00.009] <TB3> INFO: invalid 5bit words: 0
[17:10:00.009] <TB3> INFO: invalid XOR eye diagram: 0
[17:10:00.009] <TB3> INFO: frame (failed synchr.): 0
[17:10:00.009] <TB3> INFO: idle data (no TBM trl): 0
[17:10:00.009] <TB3> INFO: no data (only TBM hdr): 0
[17:10:00.009] <TB3> INFO: TBM errors: 0
[17:10:00.009] <TB3> INFO: flawed TBM headers: 0
[17:10:00.009] <TB3> INFO: flawed TBM trailers: 0
[17:10:00.009] <TB3> INFO: event ID mismatches: 0
[17:10:00.009] <TB3> INFO: ROC errors: 0
[17:10:00.009] <TB3> INFO: missing ROC header(s): 0
[17:10:00.009] <TB3> INFO: misplaced readback start: 0
[17:10:00.009] <TB3> INFO: Pixel decoding errors: 0
[17:10:00.009] <TB3> INFO: pixel data incomplete: 0
[17:10:00.009] <TB3> INFO: pixel address: 0
[17:10:00.009] <TB3> INFO: pulse height fill bit: 0
[17:10:00.009] <TB3> INFO: buffer corruption: 0
[17:10:00.653] <TB3> INFO: ######################################################################
[17:10:00.653] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:10:00.653] <TB3> INFO: ######################################################################
[17:10:00.890] <TB3> INFO: Expecting 41600 events.
[17:10:04.323] <TB3> INFO: 41600 events read in total (2841ms).
[17:10:04.324] <TB3> INFO: Test took 3670ms.
[17:10:04.764] <TB3> INFO: Expecting 41600 events.
[17:10:08.246] <TB3> INFO: 41600 events read in total (2890ms).
[17:10:08.247] <TB3> INFO: Test took 3720ms.
[17:10:08.537] <TB3> INFO: Expecting 41600 events.
[17:10:12.075] <TB3> INFO: 41600 events read in total (2946ms).
[17:10:12.076] <TB3> INFO: Test took 3803ms.
[17:10:12.368] <TB3> INFO: Expecting 41600 events.
[17:10:15.942] <TB3> INFO: 41600 events read in total (2982ms).
[17:10:15.943] <TB3> INFO: Test took 3840ms.
[17:10:16.233] <TB3> INFO: Expecting 41600 events.
[17:10:19.859] <TB3> INFO: 41600 events read in total (3034ms).
[17:10:19.860] <TB3> INFO: Test took 3892ms.
[17:10:20.149] <TB3> INFO: Expecting 41600 events.
[17:10:23.680] <TB3> INFO: 41600 events read in total (2939ms).
[17:10:23.682] <TB3> INFO: Test took 3797ms.
[17:10:23.972] <TB3> INFO: Expecting 41600 events.
[17:10:27.498] <TB3> INFO: 41600 events read in total (2934ms).
[17:10:27.499] <TB3> INFO: Test took 3792ms.
[17:10:27.789] <TB3> INFO: Expecting 41600 events.
[17:10:31.427] <TB3> INFO: 41600 events read in total (3046ms).
[17:10:31.428] <TB3> INFO: Test took 3904ms.
[17:10:31.718] <TB3> INFO: Expecting 41600 events.
[17:10:35.252] <TB3> INFO: 41600 events read in total (2942ms).
[17:10:35.253] <TB3> INFO: Test took 3800ms.
[17:10:35.543] <TB3> INFO: Expecting 41600 events.
[17:10:39.088] <TB3> INFO: 41600 events read in total (2952ms).
[17:10:39.088] <TB3> INFO: Test took 3810ms.
[17:10:39.378] <TB3> INFO: Expecting 41600 events.
[17:10:42.918] <TB3> INFO: 41600 events read in total (2948ms).
[17:10:42.919] <TB3> INFO: Test took 3806ms.
[17:10:43.210] <TB3> INFO: Expecting 41600 events.
[17:10:46.823] <TB3> INFO: 41600 events read in total (3021ms).
[17:10:46.824] <TB3> INFO: Test took 3879ms.
[17:10:47.130] <TB3> INFO: Expecting 41600 events.
[17:10:50.682] <TB3> INFO: 41600 events read in total (2960ms).
[17:10:50.683] <TB3> INFO: Test took 3829ms.
[17:10:50.975] <TB3> INFO: Expecting 41600 events.
[17:10:54.526] <TB3> INFO: 41600 events read in total (2959ms).
[17:10:54.527] <TB3> INFO: Test took 3816ms.
[17:10:54.817] <TB3> INFO: Expecting 41600 events.
[17:10:58.374] <TB3> INFO: 41600 events read in total (2965ms).
[17:10:58.375] <TB3> INFO: Test took 3824ms.
[17:10:58.665] <TB3> INFO: Expecting 41600 events.
[17:11:02.230] <TB3> INFO: 41600 events read in total (2973ms).
[17:11:02.230] <TB3> INFO: Test took 3830ms.
[17:11:02.520] <TB3> INFO: Expecting 41600 events.
[17:11:06.191] <TB3> INFO: 41600 events read in total (3080ms).
[17:11:06.192] <TB3> INFO: Test took 3937ms.
[17:11:06.481] <TB3> INFO: Expecting 41600 events.
[17:11:10.117] <TB3> INFO: 41600 events read in total (3044ms).
[17:11:10.118] <TB3> INFO: Test took 3902ms.
[17:11:10.410] <TB3> INFO: Expecting 41600 events.
[17:11:14.012] <TB3> INFO: 41600 events read in total (3010ms).
[17:11:14.013] <TB3> INFO: Test took 3868ms.
[17:11:14.302] <TB3> INFO: Expecting 41600 events.
[17:11:17.867] <TB3> INFO: 41600 events read in total (2973ms).
[17:11:17.869] <TB3> INFO: Test took 3831ms.
[17:11:18.195] <TB3> INFO: Expecting 41600 events.
[17:11:21.702] <TB3> INFO: 41600 events read in total (2914ms).
[17:11:21.703] <TB3> INFO: Test took 3807ms.
[17:11:21.992] <TB3> INFO: Expecting 41600 events.
[17:11:25.569] <TB3> INFO: 41600 events read in total (2985ms).
[17:11:25.570] <TB3> INFO: Test took 3843ms.
[17:11:25.861] <TB3> INFO: Expecting 41600 events.
[17:11:29.381] <TB3> INFO: 41600 events read in total (2928ms).
[17:11:29.382] <TB3> INFO: Test took 3785ms.
[17:11:29.674] <TB3> INFO: Expecting 41600 events.
[17:11:33.197] <TB3> INFO: 41600 events read in total (2931ms).
[17:11:33.197] <TB3> INFO: Test took 3788ms.
[17:11:33.541] <TB3> INFO: Expecting 41600 events.
[17:11:37.074] <TB3> INFO: 41600 events read in total (2941ms).
[17:11:37.075] <TB3> INFO: Test took 3853ms.
[17:11:37.364] <TB3> INFO: Expecting 41600 events.
[17:11:40.908] <TB3> INFO: 41600 events read in total (2953ms).
[17:11:40.908] <TB3> INFO: Test took 3809ms.
[17:11:41.198] <TB3> INFO: Expecting 41600 events.
[17:11:44.696] <TB3> INFO: 41600 events read in total (2906ms).
[17:11:44.697] <TB3> INFO: Test took 3764ms.
[17:11:44.987] <TB3> INFO: Expecting 41600 events.
[17:11:48.492] <TB3> INFO: 41600 events read in total (2913ms).
[17:11:48.492] <TB3> INFO: Test took 3770ms.
[17:11:48.784] <TB3> INFO: Expecting 41600 events.
[17:11:52.406] <TB3> INFO: 41600 events read in total (3030ms).
[17:11:52.406] <TB3> INFO: Test took 3887ms.
[17:11:52.698] <TB3> INFO: Expecting 41600 events.
[17:11:56.390] <TB3> INFO: 41600 events read in total (3100ms).
[17:11:56.391] <TB3> INFO: Test took 3958ms.
[17:11:56.681] <TB3> INFO: Expecting 2560 events.
[17:11:57.573] <TB3> INFO: 2560 events read in total (300ms).
[17:11:57.573] <TB3> INFO: Test took 1169ms.
[17:11:57.881] <TB3> INFO: Expecting 2560 events.
[17:11:58.777] <TB3> INFO: 2560 events read in total (304ms).
[17:11:58.777] <TB3> INFO: Test took 1203ms.
[17:11:59.084] <TB3> INFO: Expecting 2560 events.
[17:11:59.973] <TB3> INFO: 2560 events read in total (297ms).
[17:11:59.973] <TB3> INFO: Test took 1195ms.
[17:12:00.281] <TB3> INFO: Expecting 2560 events.
[17:12:01.171] <TB3> INFO: 2560 events read in total (299ms).
[17:12:01.172] <TB3> INFO: Test took 1199ms.
[17:12:01.479] <TB3> INFO: Expecting 2560 events.
[17:12:02.368] <TB3> INFO: 2560 events read in total (297ms).
[17:12:02.368] <TB3> INFO: Test took 1196ms.
[17:12:02.676] <TB3> INFO: Expecting 2560 events.
[17:12:03.562] <TB3> INFO: 2560 events read in total (294ms).
[17:12:03.563] <TB3> INFO: Test took 1195ms.
[17:12:03.871] <TB3> INFO: Expecting 2560 events.
[17:12:04.755] <TB3> INFO: 2560 events read in total (293ms).
[17:12:04.756] <TB3> INFO: Test took 1193ms.
[17:12:05.063] <TB3> INFO: Expecting 2560 events.
[17:12:05.949] <TB3> INFO: 2560 events read in total (294ms).
[17:12:05.949] <TB3> INFO: Test took 1193ms.
[17:12:06.257] <TB3> INFO: Expecting 2560 events.
[17:12:07.138] <TB3> INFO: 2560 events read in total (289ms).
[17:12:07.138] <TB3> INFO: Test took 1189ms.
[17:12:07.446] <TB3> INFO: Expecting 2560 events.
[17:12:08.334] <TB3> INFO: 2560 events read in total (296ms).
[17:12:08.334] <TB3> INFO: Test took 1195ms.
[17:12:08.642] <TB3> INFO: Expecting 2560 events.
[17:12:09.535] <TB3> INFO: 2560 events read in total (301ms).
[17:12:09.535] <TB3> INFO: Test took 1200ms.
[17:12:09.843] <TB3> INFO: Expecting 2560 events.
[17:12:10.732] <TB3> INFO: 2560 events read in total (298ms).
[17:12:10.733] <TB3> INFO: Test took 1197ms.
[17:12:11.041] <TB3> INFO: Expecting 2560 events.
[17:12:11.933] <TB3> INFO: 2560 events read in total (300ms).
[17:12:11.933] <TB3> INFO: Test took 1200ms.
[17:12:12.240] <TB3> INFO: Expecting 2560 events.
[17:12:13.133] <TB3> INFO: 2560 events read in total (301ms).
[17:12:13.134] <TB3> INFO: Test took 1200ms.
[17:12:13.440] <TB3> INFO: Expecting 2560 events.
[17:12:14.333] <TB3> INFO: 2560 events read in total (301ms).
[17:12:14.334] <TB3> INFO: Test took 1200ms.
[17:12:14.642] <TB3> INFO: Expecting 2560 events.
[17:12:15.526] <TB3> INFO: 2560 events read in total (292ms).
[17:12:15.526] <TB3> INFO: Test took 1192ms.
[17:12:15.531] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:12:15.835] <TB3> INFO: Expecting 655360 events.
[17:12:30.866] <TB3> INFO: 655360 events read in total (14439ms).
[17:12:30.877] <TB3> INFO: Expecting 655360 events.
[17:12:45.579] <TB3> INFO: 655360 events read in total (14299ms).
[17:12:45.596] <TB3> INFO: Expecting 655360 events.
[17:13:00.541] <TB3> INFO: 655360 events read in total (14542ms).
[17:13:00.561] <TB3> INFO: Expecting 655360 events.
[17:13:15.423] <TB3> INFO: 655360 events read in total (14458ms).
[17:13:15.449] <TB3> INFO: Expecting 655360 events.
[17:13:30.314] <TB3> INFO: 655360 events read in total (14462ms).
[17:13:30.344] <TB3> INFO: Expecting 655360 events.
[17:13:45.126] <TB3> INFO: 655360 events read in total (14379ms).
[17:13:45.160] <TB3> INFO: Expecting 655360 events.
[17:13:59.872] <TB3> INFO: 655360 events read in total (14309ms).
[17:13:59.929] <TB3> INFO: Expecting 655360 events.
[17:14:14.674] <TB3> INFO: 655360 events read in total (14342ms).
[17:14:14.717] <TB3> INFO: Expecting 655360 events.
[17:14:29.566] <TB3> INFO: 655360 events read in total (14446ms).
[17:14:29.701] <TB3> INFO: Expecting 655360 events.
[17:14:44.604] <TB3> INFO: 655360 events read in total (14500ms).
[17:14:44.676] <TB3> INFO: Expecting 655360 events.
[17:14:59.447] <TB3> INFO: 655360 events read in total (14368ms).
[17:14:59.515] <TB3> INFO: Expecting 655360 events.
[17:15:14.276] <TB3> INFO: 655360 events read in total (14358ms).
[17:15:14.415] <TB3> INFO: Expecting 655360 events.
[17:15:29.175] <TB3> INFO: 655360 events read in total (14357ms).
[17:15:29.272] <TB3> INFO: Expecting 655360 events.
[17:15:43.933] <TB3> INFO: 655360 events read in total (14258ms).
[17:15:44.017] <TB3> INFO: Expecting 655360 events.
[17:15:58.634] <TB3> INFO: 655360 events read in total (14212ms).
[17:15:58.728] <TB3> INFO: Expecting 655360 events.
[17:16:13.265] <TB3> INFO: 655360 events read in total (14134ms).
[17:16:13.418] <TB3> INFO: Test took 237887ms.
[17:16:13.517] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:16:13.770] <TB3> INFO: Expecting 655360 events.
[17:16:28.582] <TB3> INFO: 655360 events read in total (14220ms).
[17:16:28.597] <TB3> INFO: Expecting 655360 events.
[17:16:42.866] <TB3> INFO: 655360 events read in total (13865ms).
[17:16:42.882] <TB3> INFO: Expecting 655360 events.
[17:16:57.459] <TB3> INFO: 655360 events read in total (14174ms).
[17:16:57.480] <TB3> INFO: Expecting 655360 events.
[17:17:11.925] <TB3> INFO: 655360 events read in total (14042ms).
[17:17:11.950] <TB3> INFO: Expecting 655360 events.
[17:17:26.266] <TB3> INFO: 655360 events read in total (13913ms).
[17:17:26.294] <TB3> INFO: Expecting 655360 events.
[17:17:40.768] <TB3> INFO: 655360 events read in total (14071ms).
[17:17:40.801] <TB3> INFO: Expecting 655360 events.
[17:17:55.391] <TB3> INFO: 655360 events read in total (14187ms).
[17:17:55.429] <TB3> INFO: Expecting 655360 events.
[17:18:09.850] <TB3> INFO: 655360 events read in total (14018ms).
[17:18:09.891] <TB3> INFO: Expecting 655360 events.
[17:18:24.501] <TB3> INFO: 655360 events read in total (14207ms).
[17:18:24.621] <TB3> INFO: Expecting 655360 events.
[17:18:39.080] <TB3> INFO: 655360 events read in total (14056ms).
[17:18:39.134] <TB3> INFO: Expecting 655360 events.
[17:18:53.556] <TB3> INFO: 655360 events read in total (14019ms).
[17:18:53.672] <TB3> INFO: Expecting 655360 events.
[17:19:08.438] <TB3> INFO: 655360 events read in total (14363ms).
[17:19:08.511] <TB3> INFO: Expecting 655360 events.
[17:19:23.246] <TB3> INFO: 655360 events read in total (14331ms).
[17:19:23.353] <TB3> INFO: Expecting 655360 events.
[17:19:38.094] <TB3> INFO: 655360 events read in total (14338ms).
[17:19:38.223] <TB3> INFO: Expecting 655360 events.
[17:19:52.954] <TB3> INFO: 655360 events read in total (14328ms).
[17:19:53.084] <TB3> INFO: Expecting 655360 events.
[17:20:07.538] <TB3> INFO: 655360 events read in total (14051ms).
[17:20:07.673] <TB3> INFO: Test took 234156ms.
[17:20:07.846] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.853] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.859] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.865] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.870] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:07.876] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:07.882] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:20:07.888] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[17:20:07.894] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[17:20:07.900] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.906] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.912] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:07.918] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.925] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.931] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.937] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:07.943] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:07.949] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:20:07.960] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[17:20:07.970] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[17:20:07.981] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[17:20:07.992] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:07.002] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:08.013] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:08.022] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:08.028] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:08.034] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:08.040] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:08.046] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:08.052] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:20:08.058] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[17:20:08.064] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:08.070] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:08.076] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:08.082] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[17:20:08.119] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[17:20:08.120] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[17:20:08.120] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[17:20:08.120] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[17:20:08.120] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[17:20:08.120] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[17:20:08.120] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[17:20:08.120] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[17:20:08.359] <TB3> INFO: Expecting 41600 events.
[17:20:11.575] <TB3> INFO: 41600 events read in total (2625ms).
[17:20:11.575] <TB3> INFO: Test took 3452ms.
[17:20:12.034] <TB3> INFO: Expecting 41600 events.
[17:20:15.157] <TB3> INFO: 41600 events read in total (2532ms).
[17:20:15.158] <TB3> INFO: Test took 3369ms.
[17:20:15.611] <TB3> INFO: Expecting 41600 events.
[17:20:18.861] <TB3> INFO: 41600 events read in total (2658ms).
[17:20:18.862] <TB3> INFO: Test took 3489ms.
[17:20:19.081] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:19.171] <TB3> INFO: Expecting 2560 events.
[17:20:20.064] <TB3> INFO: 2560 events read in total (301ms).
[17:20:20.065] <TB3> INFO: Test took 984ms.
[17:20:20.068] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:20.373] <TB3> INFO: Expecting 2560 events.
[17:20:21.261] <TB3> INFO: 2560 events read in total (296ms).
[17:20:21.262] <TB3> INFO: Test took 1194ms.
[17:20:21.263] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:21.570] <TB3> INFO: Expecting 2560 events.
[17:20:22.459] <TB3> INFO: 2560 events read in total (297ms).
[17:20:22.460] <TB3> INFO: Test took 1197ms.
[17:20:22.462] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:22.768] <TB3> INFO: Expecting 2560 events.
[17:20:23.659] <TB3> INFO: 2560 events read in total (299ms).
[17:20:23.659] <TB3> INFO: Test took 1197ms.
[17:20:23.662] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:23.968] <TB3> INFO: Expecting 2560 events.
[17:20:24.857] <TB3> INFO: 2560 events read in total (297ms).
[17:20:24.857] <TB3> INFO: Test took 1195ms.
[17:20:24.860] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:25.165] <TB3> INFO: Expecting 2560 events.
[17:20:26.053] <TB3> INFO: 2560 events read in total (296ms).
[17:20:26.054] <TB3> INFO: Test took 1194ms.
[17:20:26.056] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:26.363] <TB3> INFO: Expecting 2560 events.
[17:20:27.253] <TB3> INFO: 2560 events read in total (299ms).
[17:20:27.253] <TB3> INFO: Test took 1197ms.
[17:20:27.257] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:27.562] <TB3> INFO: Expecting 2560 events.
[17:20:28.458] <TB3> INFO: 2560 events read in total (304ms).
[17:20:28.458] <TB3> INFO: Test took 1202ms.
[17:20:28.461] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:28.767] <TB3> INFO: Expecting 2560 events.
[17:20:29.658] <TB3> INFO: 2560 events read in total (299ms).
[17:20:29.659] <TB3> INFO: Test took 1198ms.
[17:20:29.661] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:29.966] <TB3> INFO: Expecting 2560 events.
[17:20:30.857] <TB3> INFO: 2560 events read in total (299ms).
[17:20:30.858] <TB3> INFO: Test took 1197ms.
[17:20:30.861] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:31.165] <TB3> INFO: Expecting 2560 events.
[17:20:32.056] <TB3> INFO: 2560 events read in total (298ms).
[17:20:32.057] <TB3> INFO: Test took 1197ms.
[17:20:32.060] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:32.364] <TB3> INFO: Expecting 2560 events.
[17:20:33.258] <TB3> INFO: 2560 events read in total (301ms).
[17:20:33.258] <TB3> INFO: Test took 1198ms.
[17:20:33.264] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:33.566] <TB3> INFO: Expecting 2560 events.
[17:20:34.450] <TB3> INFO: 2560 events read in total (292ms).
[17:20:34.450] <TB3> INFO: Test took 1186ms.
[17:20:34.454] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:34.759] <TB3> INFO: Expecting 2560 events.
[17:20:35.647] <TB3> INFO: 2560 events read in total (296ms).
[17:20:35.647] <TB3> INFO: Test took 1193ms.
[17:20:35.650] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:35.955] <TB3> INFO: Expecting 2560 events.
[17:20:36.845] <TB3> INFO: 2560 events read in total (298ms).
[17:20:36.845] <TB3> INFO: Test took 1196ms.
[17:20:36.849] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:37.154] <TB3> INFO: Expecting 2560 events.
[17:20:38.044] <TB3> INFO: 2560 events read in total (299ms).
[17:20:38.045] <TB3> INFO: Test took 1196ms.
[17:20:38.048] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:38.353] <TB3> INFO: Expecting 2560 events.
[17:20:39.234] <TB3> INFO: 2560 events read in total (289ms).
[17:20:39.234] <TB3> INFO: Test took 1186ms.
[17:20:39.238] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:39.542] <TB3> INFO: Expecting 2560 events.
[17:20:40.433] <TB3> INFO: 2560 events read in total (299ms).
[17:20:40.434] <TB3> INFO: Test took 1196ms.
[17:20:40.437] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:40.741] <TB3> INFO: Expecting 2560 events.
[17:20:41.634] <TB3> INFO: 2560 events read in total (301ms).
[17:20:41.634] <TB3> INFO: Test took 1197ms.
[17:20:41.638] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:41.941] <TB3> INFO: Expecting 2560 events.
[17:20:42.829] <TB3> INFO: 2560 events read in total (296ms).
[17:20:42.829] <TB3> INFO: Test took 1191ms.
[17:20:42.832] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:43.138] <TB3> INFO: Expecting 2560 events.
[17:20:44.029] <TB3> INFO: 2560 events read in total (300ms).
[17:20:44.030] <TB3> INFO: Test took 1198ms.
[17:20:44.033] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:44.338] <TB3> INFO: Expecting 2560 events.
[17:20:45.231] <TB3> INFO: 2560 events read in total (301ms).
[17:20:45.231] <TB3> INFO: Test took 1198ms.
[17:20:45.235] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:45.539] <TB3> INFO: Expecting 2560 events.
[17:20:46.431] <TB3> INFO: 2560 events read in total (300ms).
[17:20:46.432] <TB3> INFO: Test took 1197ms.
[17:20:46.434] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:46.741] <TB3> INFO: Expecting 2560 events.
[17:20:47.624] <TB3> INFO: 2560 events read in total (292ms).
[17:20:47.625] <TB3> INFO: Test took 1191ms.
[17:20:47.628] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:47.932] <TB3> INFO: Expecting 2560 events.
[17:20:48.825] <TB3> INFO: 2560 events read in total (301ms).
[17:20:48.826] <TB3> INFO: Test took 1198ms.
[17:20:48.830] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:49.134] <TB3> INFO: Expecting 2560 events.
[17:20:50.023] <TB3> INFO: 2560 events read in total (297ms).
[17:20:50.023] <TB3> INFO: Test took 1194ms.
[17:20:50.026] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:50.332] <TB3> INFO: Expecting 2560 events.
[17:20:51.223] <TB3> INFO: 2560 events read in total (299ms).
[17:20:51.224] <TB3> INFO: Test took 1198ms.
[17:20:51.227] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:51.532] <TB3> INFO: Expecting 2560 events.
[17:20:52.425] <TB3> INFO: 2560 events read in total (301ms).
[17:20:52.425] <TB3> INFO: Test took 1198ms.
[17:20:52.429] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:52.733] <TB3> INFO: Expecting 2560 events.
[17:20:53.630] <TB3> INFO: 2560 events read in total (305ms).
[17:20:53.630] <TB3> INFO: Test took 1201ms.
[17:20:53.633] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:53.939] <TB3> INFO: Expecting 2560 events.
[17:20:54.830] <TB3> INFO: 2560 events read in total (299ms).
[17:20:54.831] <TB3> INFO: Test took 1198ms.
[17:20:54.833] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:55.142] <TB3> INFO: Expecting 2560 events.
[17:20:56.035] <TB3> INFO: 2560 events read in total (302ms).
[17:20:56.035] <TB3> INFO: Test took 1202ms.
[17:20:56.037] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:56.345] <TB3> INFO: Expecting 2560 events.
[17:20:57.242] <TB3> INFO: 2560 events read in total (305ms).
[17:20:57.242] <TB3> INFO: Test took 1205ms.
[17:20:57.728] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 657 seconds
[17:20:57.728] <TB3> INFO: PH scale (per ROC): 57 63 40 42 54 49 58 47 48 59 41 48 53 62 65 48
[17:20:57.728] <TB3> INFO: PH offset (per ROC): 126 135 97 92 111 98 116 130 106 139 97 89 130 131 112 125
[17:20:57.738] <TB3> INFO: Decoding statistics:
[17:20:57.738] <TB3> INFO: General information:
[17:20:57.738] <TB3> INFO: 16bit words read: 127876
[17:20:57.738] <TB3> INFO: valid events total: 20480
[17:20:57.738] <TB3> INFO: empty events: 17982
[17:20:57.738] <TB3> INFO: valid events with pixels: 2498
[17:20:57.738] <TB3> INFO: valid pixel hits: 2498
[17:20:57.738] <TB3> INFO: Event errors: 0
[17:20:57.738] <TB3> INFO: start marker: 0
[17:20:57.738] <TB3> INFO: stop marker: 0
[17:20:57.738] <TB3> INFO: overflow: 0
[17:20:57.738] <TB3> INFO: invalid 5bit words: 0
[17:20:57.738] <TB3> INFO: invalid XOR eye diagram: 0
[17:20:57.738] <TB3> INFO: frame (failed synchr.): 0
[17:20:57.738] <TB3> INFO: idle data (no TBM trl): 0
[17:20:57.738] <TB3> INFO: no data (only TBM hdr): 0
[17:20:57.738] <TB3> INFO: TBM errors: 0
[17:20:57.738] <TB3> INFO: flawed TBM headers: 0
[17:20:57.738] <TB3> INFO: flawed TBM trailers: 0
[17:20:57.738] <TB3> INFO: event ID mismatches: 0
[17:20:57.738] <TB3> INFO: ROC errors: 0
[17:20:57.738] <TB3> INFO: missing ROC header(s): 0
[17:20:57.738] <TB3> INFO: misplaced readback start: 0
[17:20:57.738] <TB3> INFO: Pixel decoding errors: 0
[17:20:57.738] <TB3> INFO: pixel data incomplete: 0
[17:20:57.738] <TB3> INFO: pixel address: 0
[17:20:57.738] <TB3> INFO: pulse height fill bit: 0
[17:20:57.738] <TB3> INFO: buffer corruption: 0
[17:20:57.898] <TB3> INFO: ######################################################################
[17:20:57.898] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:20:57.898] <TB3> INFO: ######################################################################
[17:20:57.913] <TB3> INFO: scanning low vcal = 10
[17:20:58.150] <TB3> INFO: Expecting 41600 events.
[17:21:01.773] <TB3> INFO: 41600 events read in total (3032ms).
[17:21:01.773] <TB3> INFO: Test took 3860ms.
[17:21:01.774] <TB3> INFO: scanning low vcal = 20
[17:21:02.067] <TB3> INFO: Expecting 41600 events.
[17:21:05.694] <TB3> INFO: 41600 events read in total (3035ms).
[17:21:05.694] <TB3> INFO: Test took 3920ms.
[17:21:05.697] <TB3> INFO: scanning low vcal = 30
[17:21:05.989] <TB3> INFO: Expecting 41600 events.
[17:21:09.658] <TB3> INFO: 41600 events read in total (3077ms).
[17:21:09.659] <TB3> INFO: Test took 3962ms.
[17:21:09.662] <TB3> INFO: scanning low vcal = 40
[17:21:09.940] <TB3> INFO: Expecting 41600 events.
[17:21:13.916] <TB3> INFO: 41600 events read in total (3384ms).
[17:21:13.918] <TB3> INFO: Test took 4256ms.
[17:21:13.921] <TB3> INFO: scanning low vcal = 50
[17:21:14.198] <TB3> INFO: Expecting 41600 events.
[17:21:18.222] <TB3> INFO: 41600 events read in total (3432ms).
[17:21:18.222] <TB3> INFO: Test took 4301ms.
[17:21:18.226] <TB3> INFO: scanning low vcal = 60
[17:21:18.503] <TB3> INFO: Expecting 41600 events.
[17:21:22.548] <TB3> INFO: 41600 events read in total (3453ms).
[17:21:22.549] <TB3> INFO: Test took 4323ms.
[17:21:22.552] <TB3> INFO: scanning low vcal = 70
[17:21:22.829] <TB3> INFO: Expecting 41600 events.
[17:21:26.856] <TB3> INFO: 41600 events read in total (3435ms).
[17:21:26.857] <TB3> INFO: Test took 4305ms.
[17:21:26.860] <TB3> INFO: scanning low vcal = 80
[17:21:27.138] <TB3> INFO: Expecting 41600 events.
[17:21:31.183] <TB3> INFO: 41600 events read in total (3453ms).
[17:21:31.184] <TB3> INFO: Test took 4324ms.
[17:21:31.187] <TB3> INFO: scanning low vcal = 90
[17:21:31.465] <TB3> INFO: Expecting 41600 events.
[17:21:35.492] <TB3> INFO: 41600 events read in total (3435ms).
[17:21:35.493] <TB3> INFO: Test took 4306ms.
[17:21:35.497] <TB3> INFO: scanning low vcal = 100
[17:21:35.779] <TB3> INFO: Expecting 41600 events.
[17:21:39.788] <TB3> INFO: 41600 events read in total (3417ms).
[17:21:39.789] <TB3> INFO: Test took 4292ms.
[17:21:39.792] <TB3> INFO: scanning low vcal = 110
[17:21:40.070] <TB3> INFO: Expecting 41600 events.
[17:21:44.080] <TB3> INFO: 41600 events read in total (3419ms).
[17:21:44.081] <TB3> INFO: Test took 4289ms.
[17:21:44.084] <TB3> INFO: scanning low vcal = 120
[17:21:44.362] <TB3> INFO: Expecting 41600 events.
[17:21:48.390] <TB3> INFO: 41600 events read in total (3436ms).
[17:21:48.391] <TB3> INFO: Test took 4306ms.
[17:21:48.394] <TB3> INFO: scanning low vcal = 130
[17:21:48.672] <TB3> INFO: Expecting 41600 events.
[17:21:52.659] <TB3> INFO: 41600 events read in total (3395ms).
[17:21:52.660] <TB3> INFO: Test took 4266ms.
[17:21:52.663] <TB3> INFO: scanning low vcal = 140
[17:21:52.939] <TB3> INFO: Expecting 41600 events.
[17:21:56.883] <TB3> INFO: 41600 events read in total (3352ms).
[17:21:56.884] <TB3> INFO: Test took 4221ms.
[17:21:56.887] <TB3> INFO: scanning low vcal = 150
[17:21:57.163] <TB3> INFO: Expecting 41600 events.
[17:22:01.133] <TB3> INFO: 41600 events read in total (3378ms).
[17:22:01.134] <TB3> INFO: Test took 4247ms.
[17:22:01.138] <TB3> INFO: scanning low vcal = 160
[17:22:01.414] <TB3> INFO: Expecting 41600 events.
[17:22:05.371] <TB3> INFO: 41600 events read in total (3366ms).
[17:22:05.372] <TB3> INFO: Test took 4234ms.
[17:22:05.376] <TB3> INFO: scanning low vcal = 170
[17:22:05.651] <TB3> INFO: Expecting 41600 events.
[17:22:09.590] <TB3> INFO: 41600 events read in total (3347ms).
[17:22:09.591] <TB3> INFO: Test took 4215ms.
[17:22:09.597] <TB3> INFO: scanning low vcal = 180
[17:22:09.870] <TB3> INFO: Expecting 41600 events.
[17:22:13.863] <TB3> INFO: 41600 events read in total (3401ms).
[17:22:13.864] <TB3> INFO: Test took 4267ms.
[17:22:13.867] <TB3> INFO: scanning low vcal = 190
[17:22:14.143] <TB3> INFO: Expecting 41600 events.
[17:22:18.093] <TB3> INFO: 41600 events read in total (3358ms).
[17:22:18.094] <TB3> INFO: Test took 4227ms.
[17:22:18.098] <TB3> INFO: scanning low vcal = 200
[17:22:18.373] <TB3> INFO: Expecting 41600 events.
[17:22:22.338] <TB3> INFO: 41600 events read in total (3373ms).
[17:22:22.339] <TB3> INFO: Test took 4241ms.
[17:22:22.342] <TB3> INFO: scanning low vcal = 210
[17:22:22.619] <TB3> INFO: Expecting 41600 events.
[17:22:26.573] <TB3> INFO: 41600 events read in total (3363ms).
[17:22:26.574] <TB3> INFO: Test took 4232ms.
[17:22:26.577] <TB3> INFO: scanning low vcal = 220
[17:22:26.853] <TB3> INFO: Expecting 41600 events.
[17:22:30.890] <TB3> INFO: 41600 events read in total (3445ms).
[17:22:30.891] <TB3> INFO: Test took 4314ms.
[17:22:30.895] <TB3> INFO: scanning low vcal = 230
[17:22:31.171] <TB3> INFO: Expecting 41600 events.
[17:22:35.219] <TB3> INFO: 41600 events read in total (3456ms).
[17:22:35.219] <TB3> INFO: Test took 4323ms.
[17:22:35.223] <TB3> INFO: scanning low vcal = 240
[17:22:35.500] <TB3> INFO: Expecting 41600 events.
[17:22:39.473] <TB3> INFO: 41600 events read in total (3382ms).
[17:22:39.474] <TB3> INFO: Test took 4251ms.
[17:22:39.478] <TB3> INFO: scanning low vcal = 250
[17:22:39.774] <TB3> INFO: Expecting 41600 events.
[17:22:43.780] <TB3> INFO: 41600 events read in total (3414ms).
[17:22:43.781] <TB3> INFO: Test took 4303ms.
[17:22:43.785] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[17:22:44.083] <TB3> INFO: Expecting 41600 events.
[17:22:48.110] <TB3> INFO: 41600 events read in total (3435ms).
[17:22:48.111] <TB3> INFO: Test took 4325ms.
[17:22:48.115] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[17:22:48.391] <TB3> INFO: Expecting 41600 events.
[17:22:52.391] <TB3> INFO: 41600 events read in total (3408ms).
[17:22:52.392] <TB3> INFO: Test took 4277ms.
[17:22:52.395] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[17:22:52.672] <TB3> INFO: Expecting 41600 events.
[17:22:56.639] <TB3> INFO: 41600 events read in total (3376ms).
[17:22:56.640] <TB3> INFO: Test took 4245ms.
[17:22:56.644] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[17:22:56.920] <TB3> INFO: Expecting 41600 events.
[17:23:00.961] <TB3> INFO: 41600 events read in total (3450ms).
[17:23:00.962] <TB3> INFO: Test took 4318ms.
[17:23:00.966] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:23:01.242] <TB3> INFO: Expecting 41600 events.
[17:23:05.257] <TB3> INFO: 41600 events read in total (3423ms).
[17:23:05.258] <TB3> INFO: Test took 4292ms.
[17:23:05.661] <TB3> INFO: PixTestGainPedestal::measure() done
[17:23:37.715] <TB3> INFO: PixTestGainPedestal::fit() done
[17:23:37.715] <TB3> INFO: non-linearity mean: 0.978 0.980 0.977 0.977 0.956 0.953 0.980 0.983 0.943 0.981 0.917 0.918 0.972 0.975 0.982 0.945
[17:23:37.715] <TB3> INFO: non-linearity RMS: 0.004 0.006 0.206 0.165 0.042 0.059 0.004 0.004 0.087 0.005 0.111 0.156 0.006 0.005 0.003 0.078
[17:23:37.716] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:23:37.728] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:23:37.741] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:23:37.754] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:23:37.767] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:23:37.780] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:23:37.793] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:23:37.806] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:23:37.819] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:23:37.833] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:23:37.846] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:23:37.859] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:23:37.872] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:23:37.885] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:23:37.897] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:23:37.910] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:23:37.923] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[17:23:37.923] <TB3> INFO: Decoding statistics:
[17:23:37.923] <TB3> INFO: General information:
[17:23:37.923] <TB3> INFO: 16bit words read: 3326974
[17:23:37.923] <TB3> INFO: valid events total: 332800
[17:23:37.923] <TB3> INFO: empty events: 0
[17:23:37.923] <TB3> INFO: valid events with pixels: 332800
[17:23:37.923] <TB3> INFO: valid pixel hits: 665087
[17:23:37.923] <TB3> INFO: Event errors: 0
[17:23:37.923] <TB3> INFO: start marker: 0
[17:23:37.923] <TB3> INFO: stop marker: 0
[17:23:37.923] <TB3> INFO: overflow: 0
[17:23:37.923] <TB3> INFO: invalid 5bit words: 0
[17:23:37.923] <TB3> INFO: invalid XOR eye diagram: 0
[17:23:37.923] <TB3> INFO: frame (failed synchr.): 0
[17:23:37.923] <TB3> INFO: idle data (no TBM trl): 0
[17:23:37.923] <TB3> INFO: no data (only TBM hdr): 0
[17:23:37.923] <TB3> INFO: TBM errors: 0
[17:23:37.923] <TB3> INFO: flawed TBM headers: 0
[17:23:37.923] <TB3> INFO: flawed TBM trailers: 0
[17:23:37.923] <TB3> INFO: event ID mismatches: 0
[17:23:37.923] <TB3> INFO: ROC errors: 0
[17:23:37.923] <TB3> INFO: missing ROC header(s): 0
[17:23:37.923] <TB3> INFO: misplaced readback start: 0
[17:23:37.923] <TB3> INFO: Pixel decoding errors: 0
[17:23:37.923] <TB3> INFO: pixel data incomplete: 0
[17:23:37.923] <TB3> INFO: pixel address: 0
[17:23:37.923] <TB3> INFO: pulse height fill bit: 0
[17:23:37.923] <TB3> INFO: buffer corruption: 0
[17:23:37.939] <TB3> INFO: Decoding statistics:
[17:23:37.939] <TB3> INFO: General information:
[17:23:37.939] <TB3> INFO: 16bit words read: 3456386
[17:23:37.939] <TB3> INFO: valid events total: 353536
[17:23:37.939] <TB3> INFO: empty events: 18238
[17:23:37.939] <TB3> INFO: valid events with pixels: 335298
[17:23:37.939] <TB3> INFO: valid pixel hits: 667585
[17:23:37.939] <TB3> INFO: Event errors: 0
[17:23:37.939] <TB3> INFO: start marker: 0
[17:23:37.939] <TB3> INFO: stop marker: 0
[17:23:37.939] <TB3> INFO: overflow: 0
[17:23:37.939] <TB3> INFO: invalid 5bit words: 0
[17:23:37.939] <TB3> INFO: invalid XOR eye diagram: 0
[17:23:37.939] <TB3> INFO: frame (failed synchr.): 0
[17:23:37.939] <TB3> INFO: idle data (no TBM trl): 0
[17:23:37.939] <TB3> INFO: no data (only TBM hdr): 0
[17:23:37.939] <TB3> INFO: TBM errors: 0
[17:23:37.939] <TB3> INFO: flawed TBM headers: 0
[17:23:37.939] <TB3> INFO: flawed TBM trailers: 0
[17:23:37.939] <TB3> INFO: event ID mismatches: 0
[17:23:37.939] <TB3> INFO: ROC errors: 0
[17:23:37.939] <TB3> INFO: missing ROC header(s): 0
[17:23:37.939] <TB3> INFO: misplaced readback start: 0
[17:23:37.939] <TB3> INFO: Pixel decoding errors: 0
[17:23:37.939] <TB3> INFO: pixel data incomplete: 0
[17:23:37.939] <TB3> INFO: pixel address: 0
[17:23:37.939] <TB3> INFO: pulse height fill bit: 0
[17:23:37.939] <TB3> INFO: buffer corruption: 0
[17:23:37.939] <TB3> INFO: enter test to run
[17:23:37.939] <TB3> INFO: test: exit no parameter change
[17:23:38.067] <TB3> QUIET: Connection to board 126 closed.
[17:23:38.068] <TB3> INFO: pXar: this is the end, my friend