[10:29:37.834] <TB3> INFO: *** Welcome to pxar ***
[10:29:37.834] <TB3> INFO: *** Today: 2016/11/02
[10:29:37.844] <TB3> INFO: *** Version: c8ba-dirty
[10:29:37.844] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C15.dat
[10:29:37.845] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C1b.dat
[10:29:37.845] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//defaultMaskFile.dat
[10:29:37.845] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters_C15.dat
[10:29:37.926] <TB3> INFO: clk: 4
[10:29:37.926] <TB3> INFO: ctr: 4
[10:29:37.926] <TB3> INFO: sda: 19
[10:29:37.926] <TB3> INFO: tin: 9
[10:29:37.926] <TB3> INFO: level: 15
[10:29:37.926] <TB3> INFO: triggerdelay: 0
[10:29:37.926] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[10:29:37.926] <TB3> INFO: Log level: INFO
[10:29:37.934] <TB3> INFO: Found DTB DTB_WWVASW
[10:29:37.943] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[10:29:37.944] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[10:29:37.946] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[10:29:39.445] <TB3> INFO: DUT info:
[10:29:39.445] <TB3> INFO: The DUT currently contains the following objects:
[10:29:39.445] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[10:29:39.445] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:29:39.445] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:29:39.445] <TB3> INFO: TBM Core alpha (2): 7 registers set
[10:29:39.445] <TB3> INFO: TBM Core beta (3): 7 registers set
[10:29:39.445] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:29:39.445] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.446] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:39.848] <TB3> INFO: enter 'restricted' command line mode
[10:29:39.848] <TB3> INFO: enter test to run
[10:29:39.848] <TB3> INFO: test: pretest no parameter change
[10:29:39.849] <TB3> INFO: running: pretest
[10:29:39.856] <TB3> INFO: ######################################################################
[10:29:39.856] <TB3> INFO: PixTestPretest::doTest()
[10:29:39.856] <TB3> INFO: ######################################################################
[10:29:39.857] <TB3> INFO: ----------------------------------------------------------------------
[10:29:39.857] <TB3> INFO: PixTestPretest::programROC()
[10:29:39.857] <TB3> INFO: ----------------------------------------------------------------------
[10:29:57.872] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:29:57.872] <TB3> INFO: IA differences per ROC: 20.1 17.7 20.1 17.7 21.7 19.3 19.3 17.7 20.1 20.9 17.7 18.5 17.7 18.5 20.1 18.5
[10:29:57.950] <TB3> INFO: ----------------------------------------------------------------------
[10:29:57.950] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:29:57.950] <TB3> INFO: ----------------------------------------------------------------------
[10:30:19.249] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 379.4 mA = 23.7125 mA/ROC
[10:30:19.249] <TB3> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 19.3 18.5 19.3 19.3 19.3 18.5 19.3 19.3 20.1 19.3 19.3 19.3 20.1
[10:30:19.279] <TB3> INFO: ----------------------------------------------------------------------
[10:30:19.279] <TB3> INFO: PixTestPretest::findTiming()
[10:30:19.279] <TB3> INFO: ----------------------------------------------------------------------
[10:30:19.279] <TB3> INFO: PixTestCmd::init()

[10:30:51.370] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:30:51.370] <TB3> INFO: (success/tries = 100/100), width = 3
[10:30:52.868] <TB3> INFO: ----------------------------------------------------------------------
[10:30:52.868] <TB3> INFO: PixTestPretest::findWorkingPixel()
[10:30:52.868] <TB3> INFO: ----------------------------------------------------------------------
[10:30:52.963] <TB3> INFO: Expecting 231680 events.
[10:31:02.995] <TB3> INFO: 231680 events read in total (9440ms).
[10:31:03.007] <TB3> INFO: Test took 10133ms.
[10:31:03.259] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:31:03.294] <TB3> INFO: ----------------------------------------------------------------------
[10:31:03.294] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[10:31:03.294] <TB3> INFO: ----------------------------------------------------------------------
[10:31:03.390] <TB3> INFO: Expecting 231680 events.
[10:31:13.480] <TB3> INFO: 231680 events read in total (9499ms).
[10:31:13.492] <TB3> INFO: Test took 10192ms.
[10:31:13.756] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[10:31:13.756] <TB3> INFO: CalDel: 118 102 91 87 88 88 103 95 92 95 80 109 93 115 105 95
[10:31:13.756] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:31:13.759] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C0.dat
[10:31:13.759] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C1.dat
[10:31:13.759] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C2.dat
[10:31:13.760] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C3.dat
[10:31:13.760] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C4.dat
[10:31:13.760] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C5.dat
[10:31:13.760] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C6.dat
[10:31:13.761] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C7.dat
[10:31:13.761] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C8.dat
[10:31:13.761] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C9.dat
[10:31:13.761] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C10.dat
[10:31:13.761] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C11.dat
[10:31:13.761] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C12.dat
[10:31:13.761] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C13.dat
[10:31:13.762] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C14.dat
[10:31:13.762] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C15.dat
[10:31:13.762] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C0a.dat
[10:31:13.762] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C0b.dat
[10:31:13.762] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C1a.dat
[10:31:13.762] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C1b.dat
[10:31:13.762] <TB3> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[10:31:13.818] <TB3> INFO: enter test to run
[10:31:13.818] <TB3> INFO: test: FullTest no parameter change
[10:31:13.818] <TB3> INFO: running: fulltest
[10:31:13.818] <TB3> INFO: ######################################################################
[10:31:13.818] <TB3> INFO: PixTestFullTest::doTest()
[10:31:13.818] <TB3> INFO: ######################################################################
[10:31:13.819] <TB3> INFO: ######################################################################
[10:31:13.819] <TB3> INFO: PixTestAlive::doTest()
[10:31:13.819] <TB3> INFO: ######################################################################
[10:31:13.820] <TB3> INFO: ----------------------------------------------------------------------
[10:31:13.820] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:31:13.820] <TB3> INFO: ----------------------------------------------------------------------
[10:31:14.063] <TB3> INFO: Expecting 41600 events.
[10:31:17.619] <TB3> INFO: 41600 events read in total (2964ms).
[10:31:17.620] <TB3> INFO: Test took 3798ms.
[10:31:17.848] <TB3> INFO: PixTestAlive::aliveTest() done
[10:31:17.848] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:31:17.849] <TB3> INFO: ----------------------------------------------------------------------
[10:31:17.849] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:31:17.849] <TB3> INFO: ----------------------------------------------------------------------
[10:31:18.093] <TB3> INFO: Expecting 41600 events.
[10:31:21.168] <TB3> INFO: 41600 events read in total (2483ms).
[10:31:21.168] <TB3> INFO: Test took 3316ms.
[10:31:21.169] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:31:21.411] <TB3> INFO: PixTestAlive::maskTest() done
[10:31:21.411] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:31:21.412] <TB3> INFO: ----------------------------------------------------------------------
[10:31:21.412] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:31:21.412] <TB3> INFO: ----------------------------------------------------------------------
[10:31:21.657] <TB3> INFO: Expecting 41600 events.
[10:31:25.203] <TB3> INFO: 41600 events read in total (2954ms).
[10:31:25.203] <TB3> INFO: Test took 3789ms.
[10:31:25.438] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[10:31:25.438] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:31:25.438] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:31:25.438] <TB3> INFO: Decoding statistics:
[10:31:25.438] <TB3> INFO: General information:
[10:31:25.438] <TB3> INFO: 16bit words read: 0
[10:31:25.438] <TB3> INFO: valid events total: 0
[10:31:25.438] <TB3> INFO: empty events: 0
[10:31:25.438] <TB3> INFO: valid events with pixels: 0
[10:31:25.438] <TB3> INFO: valid pixel hits: 0
[10:31:25.438] <TB3> INFO: Event errors: 0
[10:31:25.439] <TB3> INFO: start marker: 0
[10:31:25.439] <TB3> INFO: stop marker: 0
[10:31:25.439] <TB3> INFO: overflow: 0
[10:31:25.439] <TB3> INFO: invalid 5bit words: 0
[10:31:25.439] <TB3> INFO: invalid XOR eye diagram: 0
[10:31:25.439] <TB3> INFO: frame (failed synchr.): 0
[10:31:25.439] <TB3> INFO: idle data (no TBM trl): 0
[10:31:25.439] <TB3> INFO: no data (only TBM hdr): 0
[10:31:25.439] <TB3> INFO: TBM errors: 0
[10:31:25.439] <TB3> INFO: flawed TBM headers: 0
[10:31:25.439] <TB3> INFO: flawed TBM trailers: 0
[10:31:25.439] <TB3> INFO: event ID mismatches: 0
[10:31:25.439] <TB3> INFO: ROC errors: 0
[10:31:25.439] <TB3> INFO: missing ROC header(s): 0
[10:31:25.439] <TB3> INFO: misplaced readback start: 0
[10:31:25.439] <TB3> INFO: Pixel decoding errors: 0
[10:31:25.439] <TB3> INFO: pixel data incomplete: 0
[10:31:25.439] <TB3> INFO: pixel address: 0
[10:31:25.439] <TB3> INFO: pulse height fill bit: 0
[10:31:25.439] <TB3> INFO: buffer corruption: 0
[10:31:25.448] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:31:25.449] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[10:31:25.449] <TB3> INFO: ######################################################################
[10:31:25.449] <TB3> INFO: PixTestReadback::doTest()
[10:31:25.449] <TB3> INFO: ######################################################################
[10:31:25.449] <TB3> INFO: ----------------------------------------------------------------------
[10:31:25.449] <TB3> INFO: PixTestReadback::CalibrateVd()
[10:31:25.449] <TB3> INFO: ----------------------------------------------------------------------
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C1.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C2.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C3.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C4.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C5.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C6.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C7.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C8.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C9.dat
[10:31:35.432] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C10.dat
[10:31:35.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C11.dat
[10:31:35.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C12.dat
[10:31:35.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C13.dat
[10:31:35.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C14.dat
[10:31:35.433] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:31:35.464] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:31:35.464] <TB3> INFO: ----------------------------------------------------------------------
[10:31:35.464] <TB3> INFO: PixTestReadback::CalibrateVa()
[10:31:35.464] <TB3> INFO: ----------------------------------------------------------------------
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C1.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C2.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C3.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C4.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C5.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C6.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C7.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C8.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C9.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C10.dat
[10:31:45.402] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C11.dat
[10:31:45.403] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C12.dat
[10:31:45.403] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C13.dat
[10:31:45.403] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C14.dat
[10:31:45.403] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:31:45.432] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:31:45.432] <TB3> INFO: ----------------------------------------------------------------------
[10:31:45.432] <TB3> INFO: PixTestReadback::readbackVbg()
[10:31:45.432] <TB3> INFO: ----------------------------------------------------------------------
[10:31:53.106] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:31:53.107] <TB3> INFO: ----------------------------------------------------------------------
[10:31:53.107] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[10:31:53.107] <TB3> INFO: ----------------------------------------------------------------------
[10:31:53.107] <TB3> INFO: Vbg will be calibrated using Vd calibration
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 156.4calibrated Vbg = 1.19773 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 144.4calibrated Vbg = 1.19399 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156.1calibrated Vbg = 1.1896 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 150.8calibrated Vbg = 1.18663 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153.2calibrated Vbg = 1.19058 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 161.7calibrated Vbg = 1.20105 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 160.5calibrated Vbg = 1.19379 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 165.9calibrated Vbg = 1.19485 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 144.8calibrated Vbg = 1.19256 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160.9calibrated Vbg = 1.18497 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 144.9calibrated Vbg = 1.18694 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.1calibrated Vbg = 1.17876 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 164calibrated Vbg = 1.1879 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.9calibrated Vbg = 1.19208 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.8calibrated Vbg = 1.19724 :::*/*/*/*/
[10:31:53.107] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 158calibrated Vbg = 1.19171 :::*/*/*/*/
[10:31:53.110] <TB3> INFO: ----------------------------------------------------------------------
[10:31:53.110] <TB3> INFO: PixTestReadback::CalibrateIa()
[10:31:53.110] <TB3> INFO: ----------------------------------------------------------------------
[10:34:33.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat
[10:34:33.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C1.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C2.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C3.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C4.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C5.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C6.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C7.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C8.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C9.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C10.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C11.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C12.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C13.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C14.dat
[10:34:33.854] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:34:33.880] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:34:33.881] <TB3> INFO: PixTestReadback::doTest() done
[10:34:33.881] <TB3> INFO: Decoding statistics:
[10:34:33.881] <TB3> INFO: General information:
[10:34:33.881] <TB3> INFO: 16bit words read: 1536
[10:34:33.881] <TB3> INFO: valid events total: 256
[10:34:33.881] <TB3> INFO: empty events: 256
[10:34:33.881] <TB3> INFO: valid events with pixels: 0
[10:34:33.881] <TB3> INFO: valid pixel hits: 0
[10:34:33.881] <TB3> INFO: Event errors: 0
[10:34:33.881] <TB3> INFO: start marker: 0
[10:34:33.881] <TB3> INFO: stop marker: 0
[10:34:33.881] <TB3> INFO: overflow: 0
[10:34:33.881] <TB3> INFO: invalid 5bit words: 0
[10:34:33.881] <TB3> INFO: invalid XOR eye diagram: 0
[10:34:33.881] <TB3> INFO: frame (failed synchr.): 0
[10:34:33.881] <TB3> INFO: idle data (no TBM trl): 0
[10:34:33.881] <TB3> INFO: no data (only TBM hdr): 0
[10:34:33.882] <TB3> INFO: TBM errors: 0
[10:34:33.882] <TB3> INFO: flawed TBM headers: 0
[10:34:33.882] <TB3> INFO: flawed TBM trailers: 0
[10:34:33.882] <TB3> INFO: event ID mismatches: 0
[10:34:33.882] <TB3> INFO: ROC errors: 0
[10:34:33.882] <TB3> INFO: missing ROC header(s): 0
[10:34:33.882] <TB3> INFO: misplaced readback start: 0
[10:34:33.882] <TB3> INFO: Pixel decoding errors: 0
[10:34:33.882] <TB3> INFO: pixel data incomplete: 0
[10:34:33.882] <TB3> INFO: pixel address: 0
[10:34:33.882] <TB3> INFO: pulse height fill bit: 0
[10:34:33.882] <TB3> INFO: buffer corruption: 0
[10:34:33.932] <TB3> INFO: ######################################################################
[10:34:33.932] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:34:33.932] <TB3> INFO: ######################################################################
[10:34:33.935] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:34:33.975] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:34:33.975] <TB3> INFO: run 1 of 1
[10:34:34.225] <TB3> INFO: Expecting 3120000 events.
[10:35:05.293] <TB3> INFO: 656115 events read in total (30476ms).











[10:35:35.380] <TB3> INFO: 1306795 events read in total (60563ms).











[10:36:05.721] <TB3> INFO: 1954250 events read in total (90904ms).











[10:36:35.865] <TB3> INFO: 2599875 events read in total (121048ms).











[10:37:00.174] <TB3> INFO: 3120000 events read in total (145357ms).
[10:37:00.357] <TB3> INFO: Test took 146384ms.
[10:37:24.812] <TB3> INFO: PixTestBBMap::doTest() done with 57 decoding errors: , duration: 170 seconds
[10:37:24.812] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 0 1362 0 0 0 0
[10:37:24.813] <TB3> INFO: separation cut (per ROC): 95 105 95 105 109 103 100 112 104 106 104 94 108 108 99 110
[10:37:24.813] <TB3> INFO: Decoding statistics:
[10:37:24.813] <TB3> INFO: General information:
[10:37:24.813] <TB3> INFO: 16bit words read: 0
[10:37:24.813] <TB3> INFO: valid events total: 0
[10:37:24.813] <TB3> INFO: empty events: 0
[10:37:24.813] <TB3> INFO: valid events with pixels: 0
[10:37:24.813] <TB3> INFO: valid pixel hits: 0
[10:37:24.813] <TB3> INFO: Event errors: 0
[10:37:24.813] <TB3> INFO: start marker: 0
[10:37:24.813] <TB3> INFO: stop marker: 0
[10:37:24.813] <TB3> INFO: overflow: 0
[10:37:24.813] <TB3> INFO: invalid 5bit words: 0
[10:37:24.813] <TB3> INFO: invalid XOR eye diagram: 0
[10:37:24.813] <TB3> INFO: frame (failed synchr.): 0
[10:37:24.813] <TB3> INFO: idle data (no TBM trl): 0
[10:37:24.813] <TB3> INFO: no data (only TBM hdr): 0
[10:37:24.813] <TB3> INFO: TBM errors: 0
[10:37:24.813] <TB3> INFO: flawed TBM headers: 0
[10:37:24.813] <TB3> INFO: flawed TBM trailers: 0
[10:37:24.813] <TB3> INFO: event ID mismatches: 0
[10:37:24.813] <TB3> INFO: ROC errors: 0
[10:37:24.813] <TB3> INFO: missing ROC header(s): 0
[10:37:24.813] <TB3> INFO: misplaced readback start: 0
[10:37:24.813] <TB3> INFO: Pixel decoding errors: 0
[10:37:24.813] <TB3> INFO: pixel data incomplete: 0
[10:37:24.813] <TB3> INFO: pixel address: 0
[10:37:24.813] <TB3> INFO: pulse height fill bit: 0
[10:37:24.813] <TB3> INFO: buffer corruption: 0
[10:37:25.018] <TB3> INFO: ######################################################################
[10:37:25.018] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:37:25.018] <TB3> INFO: ######################################################################
[10:37:25.018] <TB3> INFO: ----------------------------------------------------------------------
[10:37:25.018] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:37:25.018] <TB3> INFO: ----------------------------------------------------------------------
[10:37:25.018] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:37:25.033] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[10:37:25.034] <TB3> INFO: run 1 of 1
[10:37:25.314] <TB3> INFO: Expecting 36608000 events.
[10:37:48.740] <TB3> INFO: 661850 events read in total (22834ms).
[10:38:11.678] <TB3> INFO: 1316600 events read in total (45772ms).
[10:38:34.574] <TB3> INFO: 1970350 events read in total (68668ms).
[10:38:57.365] <TB3> INFO: 2624300 events read in total (91459ms).
[10:39:20.268] <TB3> INFO: 3279350 events read in total (114362ms).
[10:39:43.472] <TB3> INFO: 3935400 events read in total (137566ms).
[10:40:06.404] <TB3> INFO: 4589850 events read in total (160498ms).
[10:40:29.256] <TB3> INFO: 5242600 events read in total (183350ms).
[10:40:52.111] <TB3> INFO: 5895750 events read in total (206205ms).
[10:41:15.146] <TB3> INFO: 6549700 events read in total (229240ms).
[10:41:38.092] <TB3> INFO: 7202500 events read in total (252186ms).
[10:42:00.696] <TB3> INFO: 7854250 events read in total (274790ms).
[10:42:23.642] <TB3> INFO: 8503800 events read in total (297736ms).
[10:42:46.610] <TB3> INFO: 9156800 events read in total (320704ms).
[10:43:09.199] <TB3> INFO: 9808450 events read in total (343293ms).
[10:43:32.051] <TB3> INFO: 10459950 events read in total (366145ms).
[10:43:55.086] <TB3> INFO: 11110550 events read in total (389180ms).
[10:44:18.108] <TB3> INFO: 11762400 events read in total (412202ms).
[10:44:40.873] <TB3> INFO: 12414600 events read in total (434967ms).
[10:45:03.966] <TB3> INFO: 13066400 events read in total (458060ms).
[10:45:26.719] <TB3> INFO: 13717000 events read in total (480813ms).
[10:45:49.361] <TB3> INFO: 14366400 events read in total (503455ms).
[10:46:12.177] <TB3> INFO: 15014950 events read in total (526271ms).
[10:46:34.898] <TB3> INFO: 15663100 events read in total (548992ms).
[10:46:57.900] <TB3> INFO: 16313050 events read in total (571994ms).
[10:47:21.031] <TB3> INFO: 16962450 events read in total (595125ms).
[10:47:44.035] <TB3> INFO: 17609250 events read in total (618129ms).
[10:48:06.994] <TB3> INFO: 18255450 events read in total (641088ms).
[10:48:29.882] <TB3> INFO: 18903700 events read in total (663976ms).
[10:48:52.792] <TB3> INFO: 19551550 events read in total (686886ms).
[10:49:15.613] <TB3> INFO: 20196500 events read in total (709707ms).
[10:49:38.337] <TB3> INFO: 20842350 events read in total (732431ms).
[10:50:00.960] <TB3> INFO: 21487250 events read in total (755054ms).
[10:50:23.674] <TB3> INFO: 22131850 events read in total (777768ms).
[10:50:46.591] <TB3> INFO: 22778550 events read in total (800685ms).
[10:51:09.186] <TB3> INFO: 23424350 events read in total (823280ms).
[10:51:31.002] <TB3> INFO: 24071650 events read in total (846096ms).
[10:51:54.492] <TB3> INFO: 24715750 events read in total (868586ms).
[10:52:17.288] <TB3> INFO: 25359850 events read in total (891382ms).
[10:52:39.872] <TB3> INFO: 26002900 events read in total (913966ms).
[10:53:02.715] <TB3> INFO: 26645500 events read in total (936809ms).
[10:53:25.420] <TB3> INFO: 27290100 events read in total (959514ms).
[10:53:48.132] <TB3> INFO: 27934350 events read in total (982226ms).
[10:54:10.800] <TB3> INFO: 28577450 events read in total (1004894ms).
[10:54:33.420] <TB3> INFO: 29221600 events read in total (1027514ms).
[10:54:55.000] <TB3> INFO: 29864200 events read in total (1050094ms).
[10:55:18.873] <TB3> INFO: 30506650 events read in total (1072967ms).
[10:55:41.992] <TB3> INFO: 31149000 events read in total (1096086ms).
[10:56:04.808] <TB3> INFO: 31791250 events read in total (1118902ms).
[10:56:27.679] <TB3> INFO: 32433900 events read in total (1141773ms).
[10:56:50.395] <TB3> INFO: 33076850 events read in total (1164489ms).
[10:57:13.205] <TB3> INFO: 33720250 events read in total (1187299ms).
[10:57:36.036] <TB3> INFO: 34365400 events read in total (1210130ms).
[10:57:58.686] <TB3> INFO: 35010300 events read in total (1232780ms).
[10:58:21.820] <TB3> INFO: 35655300 events read in total (1255914ms).
[10:58:45.455] <TB3> INFO: 36304800 events read in total (1279549ms).
[10:58:56.109] <TB3> INFO: 36608000 events read in total (1290203ms).
[10:58:56.296] <TB3> INFO: Test took 1291262ms.
[10:58:56.776] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:58:58.329] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:58:59.767] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:01.292] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:02.857] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:04.778] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:06.270] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:07.825] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:09.669] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:11.246] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:12.781] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:14.238] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:15.933] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:17.848] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:19.290] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:21.046] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:59:22.489] <TB3> INFO: PixTestScurves::scurves() done
[10:59:22.489] <TB3> INFO: Vcal mean: 103.38 109.75 106.62 106.73 118.58 115.48 107.29 118.93 115.57 111.24 104.22 102.75 114.97 111.45 109.07 110.89
[10:59:22.489] <TB3> INFO: Vcal RMS: 5.01 4.37 5.18 4.72 5.54 5.44 5.09 6.78 5.66 5.41 5.67 4.97 5.14 5.22 5.04 4.57
[10:59:22.489] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1317 seconds
[10:59:22.489] <TB3> INFO: Decoding statistics:
[10:59:22.489] <TB3> INFO: General information:
[10:59:22.489] <TB3> INFO: 16bit words read: 0
[10:59:22.489] <TB3> INFO: valid events total: 0
[10:59:22.489] <TB3> INFO: empty events: 0
[10:59:22.489] <TB3> INFO: valid events with pixels: 0
[10:59:22.489] <TB3> INFO: valid pixel hits: 0
[10:59:22.489] <TB3> INFO: Event errors: 0
[10:59:22.489] <TB3> INFO: start marker: 0
[10:59:22.489] <TB3> INFO: stop marker: 0
[10:59:22.489] <TB3> INFO: overflow: 0
[10:59:22.489] <TB3> INFO: invalid 5bit words: 0
[10:59:22.489] <TB3> INFO: invalid XOR eye diagram: 0
[10:59:22.489] <TB3> INFO: frame (failed synchr.): 0
[10:59:22.489] <TB3> INFO: idle data (no TBM trl): 0
[10:59:22.489] <TB3> INFO: no data (only TBM hdr): 0
[10:59:22.489] <TB3> INFO: TBM errors: 0
[10:59:22.489] <TB3> INFO: flawed TBM headers: 0
[10:59:22.489] <TB3> INFO: flawed TBM trailers: 0
[10:59:22.489] <TB3> INFO: event ID mismatches: 0
[10:59:22.489] <TB3> INFO: ROC errors: 0
[10:59:22.489] <TB3> INFO: missing ROC header(s): 0
[10:59:22.489] <TB3> INFO: misplaced readback start: 0
[10:59:22.489] <TB3> INFO: Pixel decoding errors: 0
[10:59:22.489] <TB3> INFO: pixel data incomplete: 0
[10:59:22.489] <TB3> INFO: pixel address: 0
[10:59:22.489] <TB3> INFO: pulse height fill bit: 0
[10:59:22.489] <TB3> INFO: buffer corruption: 0
[10:59:22.559] <TB3> INFO: ######################################################################
[10:59:22.559] <TB3> INFO: PixTestTrim::doTest()
[10:59:22.559] <TB3> INFO: ######################################################################
[10:59:22.561] <TB3> INFO: ----------------------------------------------------------------------
[10:59:22.561] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:59:22.561] <TB3> INFO: ----------------------------------------------------------------------
[10:59:22.606] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:59:22.606] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:59:22.619] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:59:22.619] <TB3> INFO: run 1 of 1
[10:59:22.858] <TB3> INFO: Expecting 5025280 events.
[10:59:54.014] <TB3> INFO: 819176 events read in total (30557ms).
[11:00:24.395] <TB3> INFO: 1636928 events read in total (60938ms).
[11:00:54.564] <TB3> INFO: 2452712 events read in total (91108ms).
[11:01:24.806] <TB3> INFO: 3265624 events read in total (121349ms).
[11:01:55.031] <TB3> INFO: 4074656 events read in total (151574ms).
[11:02:24.002] <TB3> INFO: 4881456 events read in total (181545ms).
[11:02:30.658] <TB3> INFO: 5025280 events read in total (187201ms).
[11:02:30.717] <TB3> INFO: Test took 188098ms.
[11:02:47.313] <TB3> INFO: ROC 0 VthrComp = 112
[11:02:47.314] <TB3> INFO: ROC 1 VthrComp = 119
[11:02:47.315] <TB3> INFO: ROC 2 VthrComp = 111
[11:02:47.315] <TB3> INFO: ROC 3 VthrComp = 118
[11:02:47.315] <TB3> INFO: ROC 4 VthrComp = 131
[11:02:47.315] <TB3> INFO: ROC 5 VthrComp = 123
[11:02:47.315] <TB3> INFO: ROC 6 VthrComp = 112
[11:02:47.315] <TB3> INFO: ROC 7 VthrComp = 120
[11:02:47.316] <TB3> INFO: ROC 8 VthrComp = 126
[11:02:47.316] <TB3> INFO: ROC 9 VthrComp = 118
[11:02:47.316] <TB3> INFO: ROC 10 VthrComp = 115
[11:02:47.316] <TB3> INFO: ROC 11 VthrComp = 101
[11:02:47.316] <TB3> INFO: ROC 12 VthrComp = 125
[11:02:47.316] <TB3> INFO: ROC 13 VthrComp = 123
[11:02:47.316] <TB3> INFO: ROC 14 VthrComp = 113
[11:02:47.316] <TB3> INFO: ROC 15 VthrComp = 125
[11:02:47.626] <TB3> INFO: Expecting 41600 events.
[11:02:51.137] <TB3> INFO: 41600 events read in total (2920ms).
[11:02:51.138] <TB3> INFO: Test took 3820ms.
[11:02:51.147] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:02:51.147] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:02:51.158] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:02:51.158] <TB3> INFO: run 1 of 1
[11:02:51.436] <TB3> INFO: Expecting 5025280 events.
[11:03:18.104] <TB3> INFO: 588968 events read in total (26075ms).
[11:03:43.708] <TB3> INFO: 1176944 events read in total (51679ms).
[11:04:09.835] <TB3> INFO: 1764704 events read in total (77806ms).
[11:04:35.894] <TB3> INFO: 2352288 events read in total (103865ms).
[11:05:01.867] <TB3> INFO: 2937776 events read in total (129838ms).
[11:05:27.601] <TB3> INFO: 3522000 events read in total (155572ms).
[11:05:53.746] <TB3> INFO: 4105920 events read in total (181717ms).
[11:06:20.185] <TB3> INFO: 4689176 events read in total (208156ms).
[11:06:35.797] <TB3> INFO: 5025280 events read in total (223768ms).
[11:06:35.951] <TB3> INFO: Test took 224793ms.
[11:07:00.623] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 56.9189 for pixel 1/59 mean/min/max = 44.7149/32.4586/56.9713
[11:07:00.623] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 57.6922 for pixel 11/66 mean/min/max = 44.8952/31.9301/57.8602
[11:07:00.624] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.7842 for pixel 1/6 mean/min/max = 47.0013/33.8243/60.1784
[11:07:00.624] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 56.796 for pixel 0/0 mean/min/max = 44.2864/31.711/56.8617
[11:07:00.625] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.7388 for pixel 1/3 mean/min/max = 46.3058/31.6865/60.9251
[11:07:00.625] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.7889 for pixel 22/2 mean/min/max = 45.8958/31.9892/59.8025
[11:07:00.626] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.1942 for pixel 13/64 mean/min/max = 46.3597/31.8213/60.8981
[11:07:00.626] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 65.6867 for pixel 20/79 mean/min/max = 47.8243/29.9165/65.7322
[11:07:00.627] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.1714 for pixel 0/17 mean/min/max = 45.6674/32.142/59.1927
[11:07:00.627] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.1869 for pixel 0/12 mean/min/max = 45.2323/31.0629/59.4017
[11:07:00.628] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 57.8915 for pixel 2/9 mean/min/max = 44.6379/31.3726/57.9032
[11:07:00.628] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 64.6317 for pixel 40/64 mean/min/max = 51.3762/37.9908/64.7616
[11:07:00.629] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 57.5208 for pixel 3/42 mean/min/max = 44.3524/31.0622/57.6426
[11:07:00.629] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.6542 for pixel 0/74 mean/min/max = 44.7687/31.6251/57.9123
[11:07:00.629] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.3313 for pixel 12/5 mean/min/max = 46.2743/31.1663/61.3822
[11:07:00.630] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 56.2177 for pixel 18/41 mean/min/max = 44.4326/32.393/56.4721
[11:07:00.630] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:00.720] <TB3> INFO: Expecting 411648 events.
[11:07:10.206] <TB3> INFO: 411648 events read in total (8894ms).
[11:07:10.214] <TB3> INFO: Expecting 411648 events.
[11:07:19.618] <TB3> INFO: 411648 events read in total (9001ms).
[11:07:19.628] <TB3> INFO: Expecting 411648 events.
[11:07:28.960] <TB3> INFO: 411648 events read in total (8929ms).
[11:07:28.974] <TB3> INFO: Expecting 411648 events.
[11:07:38.279] <TB3> INFO: 411648 events read in total (8902ms).
[11:07:38.302] <TB3> INFO: Expecting 411648 events.
[11:07:47.659] <TB3> INFO: 411648 events read in total (8954ms).
[11:07:47.678] <TB3> INFO: Expecting 411648 events.
[11:07:57.100] <TB3> INFO: 411648 events read in total (9019ms).
[11:07:57.122] <TB3> INFO: Expecting 411648 events.
[11:08:06.575] <TB3> INFO: 411648 events read in total (9050ms).
[11:08:06.600] <TB3> INFO: Expecting 411648 events.
[11:08:15.994] <TB3> INFO: 411648 events read in total (8991ms).
[11:08:16.021] <TB3> INFO: Expecting 411648 events.
[11:08:25.361] <TB3> INFO: 411648 events read in total (8937ms).
[11:08:25.390] <TB3> INFO: Expecting 411648 events.
[11:08:34.804] <TB3> INFO: 411648 events read in total (9011ms).
[11:08:34.837] <TB3> INFO: Expecting 411648 events.
[11:08:44.192] <TB3> INFO: 411648 events read in total (8952ms).
[11:08:44.228] <TB3> INFO: Expecting 411648 events.
[11:08:53.624] <TB3> INFO: 411648 events read in total (8993ms).
[11:08:53.663] <TB3> INFO: Expecting 411648 events.
[11:09:02.966] <TB3> INFO: 411648 events read in total (8897ms).
[11:09:03.008] <TB3> INFO: Expecting 411648 events.
[11:09:12.294] <TB3> INFO: 411648 events read in total (8883ms).
[11:09:12.416] <TB3> INFO: Expecting 411648 events.
[11:09:21.699] <TB3> INFO: 411648 events read in total (8880ms).
[11:09:21.748] <TB3> INFO: Expecting 411648 events.
[11:09:31.055] <TB3> INFO: 411648 events read in total (8904ms).
[11:09:31.117] <TB3> INFO: Test took 150487ms.
[11:09:31.879] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:09:31.893] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:09:31.893] <TB3> INFO: run 1 of 1
[11:09:32.204] <TB3> INFO: Expecting 5025280 events.
[11:09:58.498] <TB3> INFO: 583336 events read in total (25702ms).
[11:10:24.610] <TB3> INFO: 1164128 events read in total (51814ms).
[11:10:51.091] <TB3> INFO: 1743704 events read in total (78295ms).
[11:11:17.150] <TB3> INFO: 2322360 events read in total (104355ms).
[11:11:43.263] <TB3> INFO: 2900088 events read in total (130468ms).
[11:12:09.114] <TB3> INFO: 3477976 events read in total (156318ms).
[11:12:35.192] <TB3> INFO: 4055288 events read in total (182396ms).
[11:13:02.130] <TB3> INFO: 4632296 events read in total (209334ms).
[11:13:19.777] <TB3> INFO: 5025280 events read in total (226982ms).
[11:13:19.956] <TB3> INFO: Test took 228065ms.
[11:13:43.923] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.011847 .. 146.390634
[11:13:44.222] <TB3> INFO: Expecting 208000 events.
[11:13:54.079] <TB3> INFO: 208000 events read in total (9265ms).
[11:13:54.081] <TB3> INFO: Test took 10156ms.
[11:13:54.132] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 156 (-1/-1) hits flags = 528 (plus default)
[11:13:54.145] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:13:54.145] <TB3> INFO: run 1 of 1
[11:13:54.429] <TB3> INFO: Expecting 5224960 events.
[11:14:21.082] <TB3> INFO: 584560 events read in total (26062ms).
[11:14:46.913] <TB3> INFO: 1169680 events read in total (51893ms).
[11:15:12.611] <TB3> INFO: 1754792 events read in total (77591ms).
[11:15:38.332] <TB3> INFO: 2340000 events read in total (103313ms).
[11:16:04.495] <TB3> INFO: 2924856 events read in total (129475ms).
[11:16:30.440] <TB3> INFO: 3508928 events read in total (155420ms).
[11:16:57.090] <TB3> INFO: 4092968 events read in total (182070ms).
[11:17:23.589] <TB3> INFO: 4676688 events read in total (208569ms).
[11:17:48.024] <TB3> INFO: 5224960 events read in total (233004ms).
[11:17:48.133] <TB3> INFO: Test took 233988ms.
[11:18:12.654] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 24.514858 .. 45.161602
[11:18:12.895] <TB3> INFO: Expecting 208000 events.
[11:18:22.926] <TB3> INFO: 208000 events read in total (9439ms).
[11:18:22.928] <TB3> INFO: Test took 10273ms.
[11:18:23.010] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 14 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:18:23.025] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:18:23.025] <TB3> INFO: run 1 of 1
[11:18:23.313] <TB3> INFO: Expecting 1397760 events.
[11:18:52.255] <TB3> INFO: 670608 events read in total (28350ms).
[11:19:20.616] <TB3> INFO: 1339424 events read in total (56712ms).
[11:19:23.482] <TB3> INFO: 1397760 events read in total (59577ms).
[11:19:23.516] <TB3> INFO: Test took 60492ms.
[11:19:35.973] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 24.628225 .. 47.179731
[11:19:36.211] <TB3> INFO: Expecting 208000 events.
[11:19:45.956] <TB3> INFO: 208000 events read in total (9153ms).
[11:19:45.957] <TB3> INFO: Test took 9983ms.
[11:19:46.026] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 14 .. 57 (-1/-1) hits flags = 528 (plus default)
[11:19:46.040] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:19:46.040] <TB3> INFO: run 1 of 1
[11:19:46.335] <TB3> INFO: Expecting 1464320 events.
[11:20:15.315] <TB3> INFO: 663656 events read in total (28388ms).
[11:20:43.152] <TB3> INFO: 1325800 events read in total (56225ms).
[11:20:49.250] <TB3> INFO: 1464320 events read in total (62324ms).
[11:20:49.287] <TB3> INFO: Test took 63246ms.
[11:21:03.466] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 23.866238 .. 49.457760
[11:21:03.756] <TB3> INFO: Expecting 208000 events.
[11:21:13.495] <TB3> INFO: 208000 events read in total (9147ms).
[11:21:13.496] <TB3> INFO: Test took 10028ms.
[11:21:13.544] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 59 (-1/-1) hits flags = 528 (plus default)
[11:21:13.558] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:21:13.558] <TB3> INFO: run 1 of 1
[11:21:13.836] <TB3> INFO: Expecting 1564160 events.
[11:21:42.485] <TB3> INFO: 660064 events read in total (28057ms).
[11:22:10.582] <TB3> INFO: 1319744 events read in total (56155ms).
[11:22:21.100] <TB3> INFO: 1564160 events read in total (66672ms).
[11:22:21.138] <TB3> INFO: Test took 67581ms.
[11:22:34.732] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:22:34.732] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:22:34.747] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:22:34.747] <TB3> INFO: run 1 of 1
[11:22:35.042] <TB3> INFO: Expecting 1364480 events.
[11:23:04.152] <TB3> INFO: 667688 events read in total (28518ms).
[11:23:31.998] <TB3> INFO: 1334536 events read in total (56364ms).
[11:23:33.715] <TB3> INFO: 1364480 events read in total (58081ms).
[11:23:33.747] <TB3> INFO: Test took 59000ms.
[11:23:45.893] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C0.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C1.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C2.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C3.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C4.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C5.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C6.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C7.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C8.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C9.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C10.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C11.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C12.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C13.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C14.dat
[11:23:45.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C15.dat
[11:23:45.895] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C0.dat
[11:23:45.900] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C1.dat
[11:23:45.905] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C2.dat
[11:23:45.910] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C3.dat
[11:23:45.915] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C4.dat
[11:23:45.919] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C5.dat
[11:23:45.924] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C6.dat
[11:23:45.929] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C7.dat
[11:23:45.934] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C8.dat
[11:23:45.939] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C9.dat
[11:23:45.943] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C10.dat
[11:23:45.948] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C11.dat
[11:23:45.953] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C12.dat
[11:23:45.958] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C13.dat
[11:23:45.963] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C14.dat
[11:23:45.967] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C15.dat
[11:23:45.972] <TB3> INFO: PixTestTrim::trimTest() done
[11:23:45.972] <TB3> INFO: vtrim: 138 124 125 109 137 117 144 141 118 118 141 192 111 126 118 124
[11:23:45.972] <TB3> INFO: vthrcomp: 112 119 111 118 131 123 112 120 126 118 115 101 125 123 113 125
[11:23:45.972] <TB3> INFO: vcal mean: 34.96 34.92 35.04 34.94 35.02 34.97 34.96 35.04 34.96 35.00 35.00 35.32 34.95 34.95 34.96 34.92
[11:23:45.972] <TB3> INFO: vcal RMS: 1.00 1.04 1.05 0.97 1.16 1.06 1.05 1.24 1.06 0.99 0.96 1.91 1.10 0.99 1.09 0.96
[11:23:45.972] <TB3> INFO: bits mean: 10.03 9.65 8.84 9.69 9.72 9.45 9.87 9.66 9.35 9.53 9.92 10.16 9.83 9.52 9.24 9.63
[11:23:45.972] <TB3> INFO: bits RMS: 2.48 2.70 2.65 2.72 2.64 2.73 2.52 2.77 2.74 2.81 2.68 1.74 2.71 2.77 2.90 2.66
[11:23:45.980] <TB3> INFO: ----------------------------------------------------------------------
[11:23:45.980] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:23:45.980] <TB3> INFO: ----------------------------------------------------------------------
[11:23:45.983] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:23:45.997] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:23:45.997] <TB3> INFO: run 1 of 1
[11:23:46.234] <TB3> INFO: Expecting 4160000 events.
[11:24:18.449] <TB3> INFO: 734830 events read in total (31623ms).
[11:24:50.071] <TB3> INFO: 1466685 events read in total (63245ms).
[11:25:21.884] <TB3> INFO: 2193240 events read in total (95058ms).
[11:25:53.474] <TB3> INFO: 2914950 events read in total (126648ms).
[11:26:26.105] <TB3> INFO: 3632825 events read in total (159279ms).
[11:26:49.283] <TB3> INFO: 4160000 events read in total (182457ms).
[11:26:49.419] <TB3> INFO: Test took 183422ms.
[11:27:15.644] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[11:27:15.657] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:27:15.657] <TB3> INFO: run 1 of 1
[11:27:15.899] <TB3> INFO: Expecting 4222400 events.
[11:27:47.847] <TB3> INFO: 709060 events read in total (31356ms).
[11:28:19.165] <TB3> INFO: 1413440 events read in total (62674ms).
[11:28:49.882] <TB3> INFO: 2113760 events read in total (93391ms).
[11:29:20.841] <TB3> INFO: 2810340 events read in total (124350ms).
[11:29:52.948] <TB3> INFO: 3503745 events read in total (156457ms).
[11:30:24.147] <TB3> INFO: 4197600 events read in total (187656ms).
[11:30:25.620] <TB3> INFO: 4222400 events read in total (189129ms).
[11:30:25.722] <TB3> INFO: Test took 190064ms.
[11:30:52.787] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[11:30:52.801] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:30:52.801] <TB3> INFO: run 1 of 1
[11:30:53.061] <TB3> INFO: Expecting 3889600 events.
[11:31:26.015] <TB3> INFO: 729980 events read in total (32363ms).
[11:31:57.756] <TB3> INFO: 1454265 events read in total (64104ms).
[11:32:29.579] <TB3> INFO: 2172920 events read in total (95927ms).
[11:33:01.696] <TB3> INFO: 2887065 events read in total (128044ms).
[11:33:32.971] <TB3> INFO: 3598410 events read in total (159319ms).
[11:33:46.022] <TB3> INFO: 3889600 events read in total (172370ms).
[11:33:46.092] <TB3> INFO: Test took 173291ms.
[11:34:09.814] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[11:34:09.828] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:34:09.828] <TB3> INFO: run 1 of 1
[11:34:10.064] <TB3> INFO: Expecting 3868800 events.
[11:34:42.256] <TB3> INFO: 731410 events read in total (31600ms).
[11:35:13.622] <TB3> INFO: 1457145 events read in total (62966ms).
[11:35:45.207] <TB3> INFO: 2177060 events read in total (94551ms).
[11:36:16.612] <TB3> INFO: 2892480 events read in total (125956ms).
[11:36:47.882] <TB3> INFO: 3604600 events read in total (157226ms).
[11:36:59.922] <TB3> INFO: 3868800 events read in total (169266ms).
[11:36:59.992] <TB3> INFO: Test took 170164ms.
[11:37:26.030] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 180 (-1/-1) hits flags = 528 (plus default)
[11:37:26.047] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:37:26.047] <TB3> INFO: run 1 of 1
[11:37:26.285] <TB3> INFO: Expecting 3764800 events.
[11:37:58.771] <TB3> INFO: 739030 events read in total (31894ms).
[11:38:30.717] <TB3> INFO: 1471655 events read in total (63840ms).
[11:39:02.903] <TB3> INFO: 2197945 events read in total (96027ms).
[11:39:35.181] <TB3> INFO: 2919635 events read in total (128304ms).
[11:40:06.959] <TB3> INFO: 3639180 events read in total (160082ms).
[11:40:12.874] <TB3> INFO: 3764800 events read in total (165997ms).
[11:40:12.974] <TB3> INFO: Test took 166927ms.
[11:40:39.059] <TB3> INFO: PixTestTrim::trimBitTest() done
[11:40:39.060] <TB3> INFO: PixTestTrim::doTest() done, duration: 2476 seconds
[11:40:39.060] <TB3> INFO: Decoding statistics:
[11:40:39.060] <TB3> INFO: General information:
[11:40:39.060] <TB3> INFO: 16bit words read: 0
[11:40:39.060] <TB3> INFO: valid events total: 0
[11:40:39.060] <TB3> INFO: empty events: 0
[11:40:39.060] <TB3> INFO: valid events with pixels: 0
[11:40:39.060] <TB3> INFO: valid pixel hits: 0
[11:40:39.060] <TB3> INFO: Event errors: 0
[11:40:39.060] <TB3> INFO: start marker: 0
[11:40:39.060] <TB3> INFO: stop marker: 0
[11:40:39.060] <TB3> INFO: overflow: 0
[11:40:39.060] <TB3> INFO: invalid 5bit words: 0
[11:40:39.060] <TB3> INFO: invalid XOR eye diagram: 0
[11:40:39.060] <TB3> INFO: frame (failed synchr.): 0
[11:40:39.060] <TB3> INFO: idle data (no TBM trl): 0
[11:40:39.060] <TB3> INFO: no data (only TBM hdr): 0
[11:40:39.060] <TB3> INFO: TBM errors: 0
[11:40:39.060] <TB3> INFO: flawed TBM headers: 0
[11:40:39.060] <TB3> INFO: flawed TBM trailers: 0
[11:40:39.060] <TB3> INFO: event ID mismatches: 0
[11:40:39.060] <TB3> INFO: ROC errors: 0
[11:40:39.060] <TB3> INFO: missing ROC header(s): 0
[11:40:39.060] <TB3> INFO: misplaced readback start: 0
[11:40:39.060] <TB3> INFO: Pixel decoding errors: 0
[11:40:39.060] <TB3> INFO: pixel data incomplete: 0
[11:40:39.060] <TB3> INFO: pixel address: 0
[11:40:39.060] <TB3> INFO: pulse height fill bit: 0
[11:40:39.060] <TB3> INFO: buffer corruption: 0
[11:40:39.701] <TB3> INFO: ######################################################################
[11:40:39.701] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:40:39.701] <TB3> INFO: ######################################################################
[11:40:39.942] <TB3> INFO: Expecting 41600 events.
[11:40:43.451] <TB3> INFO: 41600 events read in total (2917ms).
[11:40:43.452] <TB3> INFO: Test took 3749ms.
[11:40:43.898] <TB3> INFO: Expecting 41600 events.
[11:40:47.423] <TB3> INFO: 41600 events read in total (2933ms).
[11:40:47.424] <TB3> INFO: Test took 3767ms.
[11:40:47.714] <TB3> INFO: Expecting 41600 events.
[11:40:51.220] <TB3> INFO: 41600 events read in total (2914ms).
[11:40:51.221] <TB3> INFO: Test took 3773ms.
[11:40:51.511] <TB3> INFO: Expecting 41600 events.
[11:40:55.188] <TB3> INFO: 41600 events read in total (3085ms).
[11:40:55.189] <TB3> INFO: Test took 3944ms.
[11:40:55.481] <TB3> INFO: Expecting 41600 events.
[11:40:58.982] <TB3> INFO: 41600 events read in total (2910ms).
[11:40:58.983] <TB3> INFO: Test took 3768ms.
[11:40:59.273] <TB3> INFO: Expecting 41600 events.
[11:41:02.781] <TB3> INFO: 41600 events read in total (2916ms).
[11:41:02.782] <TB3> INFO: Test took 3775ms.
[11:41:03.071] <TB3> INFO: Expecting 41600 events.
[11:41:06.569] <TB3> INFO: 41600 events read in total (2906ms).
[11:41:06.569] <TB3> INFO: Test took 3763ms.
[11:41:06.859] <TB3> INFO: Expecting 41600 events.
[11:41:10.609] <TB3> INFO: 41600 events read in total (3159ms).
[11:41:10.610] <TB3> INFO: Test took 4017ms.
[11:41:10.925] <TB3> INFO: Expecting 41600 events.
[11:41:14.553] <TB3> INFO: 41600 events read in total (3036ms).
[11:41:14.554] <TB3> INFO: Test took 3917ms.
[11:41:14.845] <TB3> INFO: Expecting 41600 events.
[11:41:18.379] <TB3> INFO: 41600 events read in total (2942ms).
[11:41:18.380] <TB3> INFO: Test took 3801ms.
[11:41:18.692] <TB3> INFO: Expecting 41600 events.
[11:41:22.208] <TB3> INFO: 41600 events read in total (2925ms).
[11:41:22.209] <TB3> INFO: Test took 3805ms.
[11:41:22.505] <TB3> INFO: Expecting 41600 events.
[11:41:26.083] <TB3> INFO: 41600 events read in total (2986ms).
[11:41:26.084] <TB3> INFO: Test took 3848ms.
[11:41:26.377] <TB3> INFO: Expecting 41600 events.
[11:41:29.923] <TB3> INFO: 41600 events read in total (2954ms).
[11:41:29.924] <TB3> INFO: Test took 3813ms.
[11:41:30.214] <TB3> INFO: Expecting 41600 events.
[11:41:33.830] <TB3> INFO: 41600 events read in total (3024ms).
[11:41:33.831] <TB3> INFO: Test took 3882ms.
[11:41:34.121] <TB3> INFO: Expecting 41600 events.
[11:41:37.664] <TB3> INFO: 41600 events read in total (2951ms).
[11:41:37.665] <TB3> INFO: Test took 3810ms.
[11:41:37.955] <TB3> INFO: Expecting 41600 events.
[11:41:41.476] <TB3> INFO: 41600 events read in total (2929ms).
[11:41:41.477] <TB3> INFO: Test took 3788ms.
[11:41:41.766] <TB3> INFO: Expecting 41600 events.
[11:41:45.297] <TB3> INFO: 41600 events read in total (2939ms).
[11:41:45.298] <TB3> INFO: Test took 3797ms.
[11:41:45.593] <TB3> INFO: Expecting 41600 events.
[11:41:49.144] <TB3> INFO: 41600 events read in total (2959ms).
[11:41:49.145] <TB3> INFO: Test took 3823ms.
[11:41:49.438] <TB3> INFO: Expecting 41600 events.
[11:41:53.066] <TB3> INFO: 41600 events read in total (3036ms).
[11:41:53.067] <TB3> INFO: Test took 3895ms.
[11:41:53.360] <TB3> INFO: Expecting 41600 events.
[11:41:56.927] <TB3> INFO: 41600 events read in total (2976ms).
[11:41:56.928] <TB3> INFO: Test took 3834ms.
[11:41:57.238] <TB3> INFO: Expecting 41600 events.
[11:42:00.835] <TB3> INFO: 41600 events read in total (3005ms).
[11:42:00.835] <TB3> INFO: Test took 3880ms.
[11:42:01.126] <TB3> INFO: Expecting 41600 events.
[11:42:04.706] <TB3> INFO: 41600 events read in total (2989ms).
[11:42:04.707] <TB3> INFO: Test took 3847ms.
[11:42:04.999] <TB3> INFO: Expecting 41600 events.
[11:42:08.512] <TB3> INFO: 41600 events read in total (2921ms).
[11:42:08.513] <TB3> INFO: Test took 3779ms.
[11:42:08.803] <TB3> INFO: Expecting 41600 events.
[11:42:12.309] <TB3> INFO: 41600 events read in total (2914ms).
[11:42:12.309] <TB3> INFO: Test took 3772ms.
[11:42:12.599] <TB3> INFO: Expecting 41600 events.
[11:42:16.139] <TB3> INFO: 41600 events read in total (2948ms).
[11:42:16.140] <TB3> INFO: Test took 3806ms.
[11:42:16.430] <TB3> INFO: Expecting 41600 events.
[11:42:19.971] <TB3> INFO: 41600 events read in total (2950ms).
[11:42:19.972] <TB3> INFO: Test took 3808ms.
[11:42:20.262] <TB3> INFO: Expecting 41600 events.
[11:42:23.780] <TB3> INFO: 41600 events read in total (2926ms).
[11:42:23.781] <TB3> INFO: Test took 3784ms.
[11:42:24.071] <TB3> INFO: Expecting 41600 events.
[11:42:27.658] <TB3> INFO: 41600 events read in total (2995ms).
[11:42:27.659] <TB3> INFO: Test took 3853ms.
[11:42:27.948] <TB3> INFO: Expecting 41600 events.
[11:42:31.483] <TB3> INFO: 41600 events read in total (2943ms).
[11:42:31.484] <TB3> INFO: Test took 3801ms.
[11:42:31.790] <TB3> INFO: Expecting 41600 events.
[11:42:35.421] <TB3> INFO: 41600 events read in total (3040ms).
[11:42:35.421] <TB3> INFO: Test took 3913ms.
[11:42:35.711] <TB3> INFO: Expecting 41600 events.
[11:42:39.206] <TB3> INFO: 41600 events read in total (2903ms).
[11:42:39.207] <TB3> INFO: Test took 3761ms.
[11:42:39.496] <TB3> INFO: Expecting 41600 events.
[11:42:43.076] <TB3> INFO: 41600 events read in total (2988ms).
[11:42:43.077] <TB3> INFO: Test took 3846ms.
[11:42:43.365] <TB3> INFO: Expecting 41600 events.
[11:42:46.974] <TB3> INFO: 41600 events read in total (3017ms).
[11:42:46.975] <TB3> INFO: Test took 3875ms.
[11:42:47.265] <TB3> INFO: Expecting 41600 events.
[11:42:50.814] <TB3> INFO: 41600 events read in total (2957ms).
[11:42:50.815] <TB3> INFO: Test took 3815ms.
[11:42:51.105] <TB3> INFO: Expecting 41600 events.
[11:42:54.669] <TB3> INFO: 41600 events read in total (2972ms).
[11:42:54.670] <TB3> INFO: Test took 3831ms.
[11:42:54.986] <TB3> INFO: Expecting 41600 events.
[11:42:58.520] <TB3> INFO: 41600 events read in total (2942ms).
[11:42:58.521] <TB3> INFO: Test took 3823ms.
[11:42:58.811] <TB3> INFO: Expecting 41600 events.
[11:43:02.366] <TB3> INFO: 41600 events read in total (2964ms).
[11:43:02.367] <TB3> INFO: Test took 3822ms.
[11:43:02.660] <TB3> INFO: Expecting 41600 events.
[11:43:06.209] <TB3> INFO: 41600 events read in total (2957ms).
[11:43:06.210] <TB3> INFO: Test took 3816ms.
[11:43:06.500] <TB3> INFO: Expecting 41600 events.
[11:43:10.016] <TB3> INFO: 41600 events read in total (2924ms).
[11:43:10.017] <TB3> INFO: Test took 3782ms.
[11:43:10.306] <TB3> INFO: Expecting 41600 events.
[11:43:13.830] <TB3> INFO: 41600 events read in total (2932ms).
[11:43:13.831] <TB3> INFO: Test took 3790ms.
[11:43:14.121] <TB3> INFO: Expecting 41600 events.
[11:43:17.803] <TB3> INFO: 41600 events read in total (3091ms).
[11:43:17.804] <TB3> INFO: Test took 3948ms.
[11:43:18.094] <TB3> INFO: Expecting 41600 events.
[11:43:21.703] <TB3> INFO: 41600 events read in total (3017ms).
[11:43:21.704] <TB3> INFO: Test took 3876ms.
[11:43:21.993] <TB3> INFO: Expecting 41600 events.
[11:43:25.553] <TB3> INFO: 41600 events read in total (2968ms).
[11:43:25.553] <TB3> INFO: Test took 3825ms.
[11:43:25.843] <TB3> INFO: Expecting 41600 events.
[11:43:29.411] <TB3> INFO: 41600 events read in total (2976ms).
[11:43:29.412] <TB3> INFO: Test took 3834ms.
[11:43:29.705] <TB3> INFO: Expecting 41600 events.
[11:43:33.391] <TB3> INFO: 41600 events read in total (3093ms).
[11:43:33.392] <TB3> INFO: Test took 3953ms.
[11:43:33.684] <TB3> INFO: Expecting 41600 events.
[11:43:37.216] <TB3> INFO: 41600 events read in total (2940ms).
[11:43:37.217] <TB3> INFO: Test took 3799ms.
[11:43:37.508] <TB3> INFO: Expecting 41600 events.
[11:43:41.072] <TB3> INFO: 41600 events read in total (2972ms).
[11:43:41.073] <TB3> INFO: Test took 3832ms.
[11:43:41.362] <TB3> INFO: Expecting 41600 events.
[11:43:44.899] <TB3> INFO: 41600 events read in total (2945ms).
[11:43:44.900] <TB3> INFO: Test took 3802ms.
[11:43:45.189] <TB3> INFO: Expecting 41600 events.
[11:43:48.711] <TB3> INFO: 41600 events read in total (2930ms).
[11:43:48.712] <TB3> INFO: Test took 3788ms.
[11:43:49.005] <TB3> INFO: Expecting 41600 events.
[11:43:52.576] <TB3> INFO: 41600 events read in total (2979ms).
[11:43:52.577] <TB3> INFO: Test took 3841ms.
[11:43:52.867] <TB3> INFO: Expecting 41600 events.
[11:43:56.369] <TB3> INFO: 41600 events read in total (2910ms).
[11:43:56.371] <TB3> INFO: Test took 3769ms.
[11:43:56.661] <TB3> INFO: Expecting 41600 events.
[11:44:00.219] <TB3> INFO: 41600 events read in total (2966ms).
[11:44:00.220] <TB3> INFO: Test took 3824ms.
[11:44:00.512] <TB3> INFO: Expecting 41600 events.
[11:44:04.040] <TB3> INFO: 41600 events read in total (2937ms).
[11:44:04.041] <TB3> INFO: Test took 3795ms.
[11:44:04.332] <TB3> INFO: Expecting 41600 events.
[11:44:07.885] <TB3> INFO: 41600 events read in total (2962ms).
[11:44:07.885] <TB3> INFO: Test took 3818ms.
[11:44:08.176] <TB3> INFO: Expecting 2560 events.
[11:44:09.064] <TB3> INFO: 2560 events read in total (297ms).
[11:44:09.064] <TB3> INFO: Test took 1165ms.
[11:44:09.373] <TB3> INFO: Expecting 2560 events.
[11:44:10.262] <TB3> INFO: 2560 events read in total (297ms).
[11:44:10.262] <TB3> INFO: Test took 1197ms.
[11:44:10.570] <TB3> INFO: Expecting 2560 events.
[11:44:11.455] <TB3> INFO: 2560 events read in total (293ms).
[11:44:11.455] <TB3> INFO: Test took 1192ms.
[11:44:11.762] <TB3> INFO: Expecting 2560 events.
[11:44:12.647] <TB3> INFO: 2560 events read in total (293ms).
[11:44:12.647] <TB3> INFO: Test took 1191ms.
[11:44:12.956] <TB3> INFO: Expecting 2560 events.
[11:44:13.835] <TB3> INFO: 2560 events read in total (288ms).
[11:44:13.835] <TB3> INFO: Test took 1188ms.
[11:44:14.144] <TB3> INFO: Expecting 2560 events.
[11:44:15.035] <TB3> INFO: 2560 events read in total (300ms).
[11:44:15.036] <TB3> INFO: Test took 1200ms.
[11:44:15.343] <TB3> INFO: Expecting 2560 events.
[11:44:16.232] <TB3> INFO: 2560 events read in total (297ms).
[11:44:16.233] <TB3> INFO: Test took 1197ms.
[11:44:16.540] <TB3> INFO: Expecting 2560 events.
[11:44:17.419] <TB3> INFO: 2560 events read in total (287ms).
[11:44:17.419] <TB3> INFO: Test took 1185ms.
[11:44:17.727] <TB3> INFO: Expecting 2560 events.
[11:44:18.609] <TB3> INFO: 2560 events read in total (290ms).
[11:44:18.609] <TB3> INFO: Test took 1189ms.
[11:44:18.917] <TB3> INFO: Expecting 2560 events.
[11:44:19.798] <TB3> INFO: 2560 events read in total (289ms).
[11:44:19.798] <TB3> INFO: Test took 1188ms.
[11:44:20.106] <TB3> INFO: Expecting 2560 events.
[11:44:20.993] <TB3> INFO: 2560 events read in total (295ms).
[11:44:20.994] <TB3> INFO: Test took 1195ms.
[11:44:21.302] <TB3> INFO: Expecting 2560 events.
[11:44:22.182] <TB3> INFO: 2560 events read in total (289ms).
[11:44:22.182] <TB3> INFO: Test took 1187ms.
[11:44:22.490] <TB3> INFO: Expecting 2560 events.
[11:44:23.378] <TB3> INFO: 2560 events read in total (296ms).
[11:44:23.378] <TB3> INFO: Test took 1195ms.
[11:44:23.686] <TB3> INFO: Expecting 2560 events.
[11:44:24.575] <TB3> INFO: 2560 events read in total (297ms).
[11:44:24.575] <TB3> INFO: Test took 1196ms.
[11:44:24.883] <TB3> INFO: Expecting 2560 events.
[11:44:25.772] <TB3> INFO: 2560 events read in total (297ms).
[11:44:25.772] <TB3> INFO: Test took 1196ms.
[11:44:26.080] <TB3> INFO: Expecting 2560 events.
[11:44:26.966] <TB3> INFO: 2560 events read in total (295ms).
[11:44:26.966] <TB3> INFO: Test took 1193ms.
[11:44:27.274] <TB3> INFO: Expecting 655360 events.
[11:44:48.167] <TB3> INFO: 531260 events read in total (20301ms).
[11:44:53.136] <TB3> INFO: 655360 events read in total (25270ms).
[11:44:53.153] <TB3> INFO: Test took 26183ms.
[11:44:53.181] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:44:53.442] <TB3> INFO: Expecting 655360 events.
[11:45:08.234] <TB3> INFO: 655360 events read in total (14200ms).
[11:45:08.249] <TB3> INFO: Expecting 655360 events.
[11:45:22.797] <TB3> INFO: 655360 events read in total (14145ms).
[11:45:22.814] <TB3> INFO: Expecting 655360 events.
[11:45:37.312] <TB3> INFO: 655360 events read in total (14095ms).
[11:45:37.332] <TB3> INFO: Expecting 655360 events.
[11:45:52.016] <TB3> INFO: 655360 events read in total (14281ms).
[11:45:52.049] <TB3> INFO: Expecting 655360 events.
[11:46:06.558] <TB3> INFO: 655360 events read in total (14106ms).
[11:46:06.597] <TB3> INFO: Expecting 655360 events.
[11:46:20.958] <TB3> INFO: 655360 events read in total (13958ms).
[11:46:20.991] <TB3> INFO: Expecting 655360 events.
[11:46:35.748] <TB3> INFO: 655360 events read in total (14353ms).
[11:46:35.790] <TB3> INFO: Expecting 655360 events.
[11:46:50.451] <TB3> INFO: 655360 events read in total (14258ms).
[11:46:50.492] <TB3> INFO: Expecting 655360 events.
[11:47:04.003] <TB3> INFO: 655360 events read in total (14108ms).
[11:47:05.054] <TB3> INFO: Expecting 655360 events.
[11:47:19.688] <TB3> INFO: 655360 events read in total (14231ms).
[11:47:19.739] <TB3> INFO: Expecting 655360 events.
[11:47:34.279] <TB3> INFO: 655360 events read in total (14136ms).
[11:47:34.368] <TB3> INFO: Expecting 655360 events.
[11:47:48.570] <TB3> INFO: 655360 events read in total (13799ms).
[11:47:48.687] <TB3> INFO: Expecting 655360 events.
[11:48:03.420] <TB3> INFO: 655360 events read in total (14330ms).
[11:48:03.510] <TB3> INFO: Expecting 655360 events.
[11:48:17.658] <TB3> INFO: 655360 events read in total (13745ms).
[11:48:17.755] <TB3> INFO: Expecting 655360 events.
[11:48:32.319] <TB3> INFO: 655360 events read in total (14160ms).
[11:48:32.450] <TB3> INFO: Expecting 655360 events.
[11:48:46.882] <TB3> INFO: 655360 events read in total (14029ms).
[11:48:47.034] <TB3> INFO: Test took 233853ms.
[11:48:47.262] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.271] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.280] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.288] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:48:47.296] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.301] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.307] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.313] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.318] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.324] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:48:47.329] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.335] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.341] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.346] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.353] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:48:47.359] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:48:47.365] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:48:47.371] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.377] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.383] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.390] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:48:47.396] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:48:47.402] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:48:47.408] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[11:48:47.415] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[11:48:47.421] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[11:48:47.427] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[11:48:47.434] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.440] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.447] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.454] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.460] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.466] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.473] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.479] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.486] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.492] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.498] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:48:47.504] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:48:47.510] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:48:47.517] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[11:48:47.523] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.529] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.536] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.542] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:48:47.548] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:48:47.555] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:48:47.561] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[11:48:47.567] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[11:48:47.574] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[11:48:47.579] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[11:48:47.586] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[11:48:47.592] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.598] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.605] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:48:47.611] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:48:47.617] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:48:47.623] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.629] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:48:47.666] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C0.dat
[11:48:47.666] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C1.dat
[11:48:47.666] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C2.dat
[11:48:47.666] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C3.dat
[11:48:47.666] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C4.dat
[11:48:47.666] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C5.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C6.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C7.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C8.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C9.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C10.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C11.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C12.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C13.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C14.dat
[11:48:47.667] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C15.dat
[11:48:47.907] <TB3> INFO: Expecting 41600 events.
[11:48:51.083] <TB3> INFO: 41600 events read in total (2584ms).
[11:48:51.084] <TB3> INFO: Test took 3414ms.
[11:48:51.541] <TB3> INFO: Expecting 41600 events.
[11:48:54.651] <TB3> INFO: 41600 events read in total (2518ms).
[11:48:54.652] <TB3> INFO: Test took 3349ms.
[11:48:55.105] <TB3> INFO: Expecting 41600 events.
[11:48:58.211] <TB3> INFO: 41600 events read in total (2514ms).
[11:48:58.211] <TB3> INFO: Test took 3345ms.
[11:48:58.434] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:48:58.523] <TB3> INFO: Expecting 2560 events.
[11:48:59.407] <TB3> INFO: 2560 events read in total (293ms).
[11:48:59.408] <TB3> INFO: Test took 974ms.
[11:48:59.412] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:48:59.715] <TB3> INFO: Expecting 2560 events.
[11:49:00.599] <TB3> INFO: 2560 events read in total (292ms).
[11:49:00.599] <TB3> INFO: Test took 1187ms.
[11:49:00.602] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:00.908] <TB3> INFO: Expecting 2560 events.
[11:49:01.792] <TB3> INFO: 2560 events read in total (292ms).
[11:49:01.793] <TB3> INFO: Test took 1191ms.
[11:49:01.795] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:02.101] <TB3> INFO: Expecting 2560 events.
[11:49:02.987] <TB3> INFO: 2560 events read in total (295ms).
[11:49:02.987] <TB3> INFO: Test took 1193ms.
[11:49:02.990] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:03.296] <TB3> INFO: Expecting 2560 events.
[11:49:04.184] <TB3> INFO: 2560 events read in total (296ms).
[11:49:04.185] <TB3> INFO: Test took 1195ms.
[11:49:04.187] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:04.493] <TB3> INFO: Expecting 2560 events.
[11:49:05.377] <TB3> INFO: 2560 events read in total (292ms).
[11:49:05.377] <TB3> INFO: Test took 1190ms.
[11:49:05.379] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:05.690] <TB3> INFO: Expecting 2560 events.
[11:49:06.581] <TB3> INFO: 2560 events read in total (300ms).
[11:49:06.582] <TB3> INFO: Test took 1203ms.
[11:49:06.584] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:06.890] <TB3> INFO: Expecting 2560 events.
[11:49:07.785] <TB3> INFO: 2560 events read in total (301ms).
[11:49:07.786] <TB3> INFO: Test took 1202ms.
[11:49:07.789] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:08.094] <TB3> INFO: Expecting 2560 events.
[11:49:08.976] <TB3> INFO: 2560 events read in total (291ms).
[11:49:08.977] <TB3> INFO: Test took 1188ms.
[11:49:08.979] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:09.285] <TB3> INFO: Expecting 2560 events.
[11:49:10.170] <TB3> INFO: 2560 events read in total (293ms).
[11:49:10.170] <TB3> INFO: Test took 1191ms.
[11:49:10.173] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:10.477] <TB3> INFO: Expecting 2560 events.
[11:49:11.359] <TB3> INFO: 2560 events read in total (290ms).
[11:49:11.360] <TB3> INFO: Test took 1187ms.
[11:49:11.362] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:11.667] <TB3> INFO: Expecting 2560 events.
[11:49:12.547] <TB3> INFO: 2560 events read in total (288ms).
[11:49:12.548] <TB3> INFO: Test took 1186ms.
[11:49:12.551] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:12.856] <TB3> INFO: Expecting 2560 events.
[11:49:13.736] <TB3> INFO: 2560 events read in total (288ms).
[11:49:13.736] <TB3> INFO: Test took 1186ms.
[11:49:13.738] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:14.046] <TB3> INFO: Expecting 2560 events.
[11:49:14.929] <TB3> INFO: 2560 events read in total (292ms).
[11:49:14.929] <TB3> INFO: Test took 1191ms.
[11:49:14.933] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:15.238] <TB3> INFO: Expecting 2560 events.
[11:49:16.118] <TB3> INFO: 2560 events read in total (288ms).
[11:49:16.118] <TB3> INFO: Test took 1186ms.
[11:49:16.121] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:16.427] <TB3> INFO: Expecting 2560 events.
[11:49:17.307] <TB3> INFO: 2560 events read in total (289ms).
[11:49:17.308] <TB3> INFO: Test took 1187ms.
[11:49:17.310] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:17.617] <TB3> INFO: Expecting 2560 events.
[11:49:18.506] <TB3> INFO: 2560 events read in total (297ms).
[11:49:18.506] <TB3> INFO: Test took 1196ms.
[11:49:18.509] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:18.815] <TB3> INFO: Expecting 2560 events.
[11:49:19.699] <TB3> INFO: 2560 events read in total (292ms).
[11:49:19.700] <TB3> INFO: Test took 1191ms.
[11:49:19.703] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:20.007] <TB3> INFO: Expecting 2560 events.
[11:49:20.895] <TB3> INFO: 2560 events read in total (295ms).
[11:49:20.896] <TB3> INFO: Test took 1193ms.
[11:49:20.900] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:21.204] <TB3> INFO: Expecting 2560 events.
[11:49:22.085] <TB3> INFO: 2560 events read in total (289ms).
[11:49:22.085] <TB3> INFO: Test took 1186ms.
[11:49:22.087] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:22.395] <TB3> INFO: Expecting 2560 events.
[11:49:23.281] <TB3> INFO: 2560 events read in total (295ms).
[11:49:23.281] <TB3> INFO: Test took 1194ms.
[11:49:23.284] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:23.590] <TB3> INFO: Expecting 2560 events.
[11:49:24.470] <TB3> INFO: 2560 events read in total (289ms).
[11:49:24.471] <TB3> INFO: Test took 1187ms.
[11:49:24.474] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:24.779] <TB3> INFO: Expecting 2560 events.
[11:49:25.660] <TB3> INFO: 2560 events read in total (289ms).
[11:49:25.660] <TB3> INFO: Test took 1186ms.
[11:49:25.662] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:25.969] <TB3> INFO: Expecting 2560 events.
[11:49:26.852] <TB3> INFO: 2560 events read in total (291ms).
[11:49:26.852] <TB3> INFO: Test took 1190ms.
[11:49:26.855] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:27.161] <TB3> INFO: Expecting 2560 events.
[11:49:28.046] <TB3> INFO: 2560 events read in total (293ms).
[11:49:28.046] <TB3> INFO: Test took 1191ms.
[11:49:28.049] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:28.354] <TB3> INFO: Expecting 2560 events.
[11:49:29.244] <TB3> INFO: 2560 events read in total (299ms).
[11:49:29.245] <TB3> INFO: Test took 1196ms.
[11:49:29.247] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:29.553] <TB3> INFO: Expecting 2560 events.
[11:49:30.441] <TB3> INFO: 2560 events read in total (296ms).
[11:49:30.442] <TB3> INFO: Test took 1195ms.
[11:49:30.445] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:30.750] <TB3> INFO: Expecting 2560 events.
[11:49:31.639] <TB3> INFO: 2560 events read in total (297ms).
[11:49:31.639] <TB3> INFO: Test took 1195ms.
[11:49:31.643] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:31.947] <TB3> INFO: Expecting 2560 events.
[11:49:32.832] <TB3> INFO: 2560 events read in total (294ms).
[11:49:32.832] <TB3> INFO: Test took 1190ms.
[11:49:32.835] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:33.141] <TB3> INFO: Expecting 2560 events.
[11:49:34.036] <TB3> INFO: 2560 events read in total (303ms).
[11:49:34.036] <TB3> INFO: Test took 1201ms.
[11:49:34.038] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:34.344] <TB3> INFO: Expecting 2560 events.
[11:49:35.237] <TB3> INFO: 2560 events read in total (301ms).
[11:49:35.237] <TB3> INFO: Test took 1199ms.
[11:49:35.240] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:35.545] <TB3> INFO: Expecting 2560 events.
[11:49:36.438] <TB3> INFO: 2560 events read in total (301ms).
[11:49:36.438] <TB3> INFO: Test took 1198ms.
[11:49:36.934] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 537 seconds
[11:49:36.934] <TB3> INFO: PH scale (per ROC): 43 55 42 52 54 45 44 41 30 44 45 39 61 51 42 53
[11:49:36.934] <TB3> INFO: PH offset (per ROC): 125 131 153 123 125 82 112 102 121 108 114 112 115 138 102 134
[11:49:36.943] <TB3> INFO: Decoding statistics:
[11:49:36.944] <TB3> INFO: General information:
[11:49:36.944] <TB3> INFO: 16bit words read: 127890
[11:49:36.944] <TB3> INFO: valid events total: 20480
[11:49:36.944] <TB3> INFO: empty events: 17975
[11:49:36.944] <TB3> INFO: valid events with pixels: 2505
[11:49:36.944] <TB3> INFO: valid pixel hits: 2505
[11:49:36.944] <TB3> INFO: Event errors: 0
[11:49:36.944] <TB3> INFO: start marker: 0
[11:49:36.944] <TB3> INFO: stop marker: 0
[11:49:36.944] <TB3> INFO: overflow: 0
[11:49:36.944] <TB3> INFO: invalid 5bit words: 0
[11:49:36.944] <TB3> INFO: invalid XOR eye diagram: 0
[11:49:36.944] <TB3> INFO: frame (failed synchr.): 0
[11:49:36.944] <TB3> INFO: idle data (no TBM trl): 0
[11:49:36.944] <TB3> INFO: no data (only TBM hdr): 0
[11:49:36.944] <TB3> INFO: TBM errors: 0
[11:49:36.944] <TB3> INFO: flawed TBM headers: 0
[11:49:36.944] <TB3> INFO: flawed TBM trailers: 0
[11:49:36.944] <TB3> INFO: event ID mismatches: 0
[11:49:36.944] <TB3> INFO: ROC errors: 0
[11:49:36.944] <TB3> INFO: missing ROC header(s): 0
[11:49:36.944] <TB3> INFO: misplaced readback start: 0
[11:49:36.944] <TB3> INFO: Pixel decoding errors: 0
[11:49:36.944] <TB3> INFO: pixel data incomplete: 0
[11:49:36.944] <TB3> INFO: pixel address: 0
[11:49:36.944] <TB3> INFO: pulse height fill bit: 0
[11:49:36.944] <TB3> INFO: buffer corruption: 0
[11:49:37.113] <TB3> INFO: ######################################################################
[11:49:37.114] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:49:37.114] <TB3> INFO: ######################################################################
[11:49:37.128] <TB3> INFO: scanning low vcal = 10
[11:49:37.365] <TB3> INFO: Expecting 41600 events.
[11:49:40.957] <TB3> INFO: 41600 events read in total (3000ms).
[11:49:40.957] <TB3> INFO: Test took 3829ms.
[11:49:40.958] <TB3> INFO: scanning low vcal = 20
[11:49:41.252] <TB3> INFO: Expecting 41600 events.
[11:49:44.854] <TB3> INFO: 41600 events read in total (3010ms).
[11:49:44.854] <TB3> INFO: Test took 3897ms.
[11:49:44.857] <TB3> INFO: scanning low vcal = 30
[11:49:45.150] <TB3> INFO: Expecting 41600 events.
[11:49:48.857] <TB3> INFO: 41600 events read in total (3115ms).
[11:49:48.858] <TB3> INFO: Test took 4001ms.
[11:49:48.861] <TB3> INFO: scanning low vcal = 40
[11:49:49.138] <TB3> INFO: Expecting 41600 events.
[11:49:53.120] <TB3> INFO: 41600 events read in total (3391ms).
[11:49:53.121] <TB3> INFO: Test took 4260ms.
[11:49:53.125] <TB3> INFO: scanning low vcal = 50
[11:49:53.402] <TB3> INFO: Expecting 41600 events.
[11:49:57.412] <TB3> INFO: 41600 events read in total (3418ms).
[11:49:57.413] <TB3> INFO: Test took 4287ms.
[11:49:57.416] <TB3> INFO: scanning low vcal = 60
[11:49:57.694] <TB3> INFO: Expecting 41600 events.
[11:50:01.723] <TB3> INFO: 41600 events read in total (3438ms).
[11:50:01.724] <TB3> INFO: Test took 4307ms.
[11:50:01.727] <TB3> INFO: scanning low vcal = 70
[11:50:02.005] <TB3> INFO: Expecting 41600 events.
[11:50:06.048] <TB3> INFO: 41600 events read in total (3451ms).
[11:50:06.049] <TB3> INFO: Test took 4322ms.
[11:50:06.052] <TB3> INFO: scanning low vcal = 80
[11:50:06.329] <TB3> INFO: Expecting 41600 events.
[11:50:10.341] <TB3> INFO: 41600 events read in total (3420ms).
[11:50:10.341] <TB3> INFO: Test took 4289ms.
[11:50:10.344] <TB3> INFO: scanning low vcal = 90
[11:50:10.621] <TB3> INFO: Expecting 41600 events.
[11:50:14.622] <TB3> INFO: 41600 events read in total (3405ms).
[11:50:14.623] <TB3> INFO: Test took 4278ms.
[11:50:14.627] <TB3> INFO: scanning low vcal = 100
[11:50:14.903] <TB3> INFO: Expecting 41600 events.
[11:50:18.920] <TB3> INFO: 41600 events read in total (3425ms).
[11:50:18.921] <TB3> INFO: Test took 4294ms.
[11:50:18.924] <TB3> INFO: scanning low vcal = 110
[11:50:19.201] <TB3> INFO: Expecting 41600 events.
[11:50:23.185] <TB3> INFO: 41600 events read in total (3392ms).
[11:50:23.186] <TB3> INFO: Test took 4262ms.
[11:50:23.189] <TB3> INFO: scanning low vcal = 120
[11:50:23.467] <TB3> INFO: Expecting 41600 events.
[11:50:27.553] <TB3> INFO: 41600 events read in total (3494ms).
[11:50:27.554] <TB3> INFO: Test took 4365ms.
[11:50:27.557] <TB3> INFO: scanning low vcal = 130
[11:50:27.834] <TB3> INFO: Expecting 41600 events.
[11:50:31.831] <TB3> INFO: 41600 events read in total (3405ms).
[11:50:31.832] <TB3> INFO: Test took 4275ms.
[11:50:31.835] <TB3> INFO: scanning low vcal = 140
[11:50:32.112] <TB3> INFO: Expecting 41600 events.
[11:50:36.106] <TB3> INFO: 41600 events read in total (3403ms).
[11:50:36.107] <TB3> INFO: Test took 4272ms.
[11:50:36.110] <TB3> INFO: scanning low vcal = 150
[11:50:36.387] <TB3> INFO: Expecting 41600 events.
[11:50:40.383] <TB3> INFO: 41600 events read in total (3404ms).
[11:50:40.384] <TB3> INFO: Test took 4274ms.
[11:50:40.387] <TB3> INFO: scanning low vcal = 160
[11:50:40.664] <TB3> INFO: Expecting 41600 events.
[11:50:44.712] <TB3> INFO: 41600 events read in total (3456ms).
[11:50:44.713] <TB3> INFO: Test took 4326ms.
[11:50:44.716] <TB3> INFO: scanning low vcal = 170
[11:50:44.994] <TB3> INFO: Expecting 41600 events.
[11:50:48.980] <TB3> INFO: 41600 events read in total (3394ms).
[11:50:48.981] <TB3> INFO: Test took 4265ms.
[11:50:48.986] <TB3> INFO: scanning low vcal = 180
[11:50:49.262] <TB3> INFO: Expecting 41600 events.
[11:50:53.241] <TB3> INFO: 41600 events read in total (3388ms).
[11:50:53.241] <TB3> INFO: Test took 4255ms.
[11:50:53.245] <TB3> INFO: scanning low vcal = 190
[11:50:53.522] <TB3> INFO: Expecting 41600 events.
[11:50:57.516] <TB3> INFO: 41600 events read in total (3402ms).
[11:50:57.517] <TB3> INFO: Test took 4272ms.
[11:50:57.520] <TB3> INFO: scanning low vcal = 200
[11:50:57.797] <TB3> INFO: Expecting 41600 events.
[11:51:01.818] <TB3> INFO: 41600 events read in total (3426ms).
[11:51:01.819] <TB3> INFO: Test took 4298ms.
[11:51:01.822] <TB3> INFO: scanning low vcal = 210
[11:51:02.098] <TB3> INFO: Expecting 41600 events.
[11:51:06.105] <TB3> INFO: 41600 events read in total (3415ms).
[11:51:06.106] <TB3> INFO: Test took 4284ms.
[11:51:06.109] <TB3> INFO: scanning low vcal = 220
[11:51:06.387] <TB3> INFO: Expecting 41600 events.
[11:51:10.431] <TB3> INFO: 41600 events read in total (3452ms).
[11:51:10.432] <TB3> INFO: Test took 4323ms.
[11:51:10.435] <TB3> INFO: scanning low vcal = 230
[11:51:10.712] <TB3> INFO: Expecting 41600 events.
[11:51:14.720] <TB3> INFO: 41600 events read in total (3412ms).
[11:51:14.721] <TB3> INFO: Test took 4286ms.
[11:51:14.724] <TB3> INFO: scanning low vcal = 240
[11:51:14.001] <TB3> INFO: Expecting 41600 events.
[11:51:19.013] <TB3> INFO: 41600 events read in total (3420ms).
[11:51:19.013] <TB3> INFO: Test took 4290ms.
[11:51:19.016] <TB3> INFO: scanning low vcal = 250
[11:51:19.294] <TB3> INFO: Expecting 41600 events.
[11:51:23.285] <TB3> INFO: 41600 events read in total (3399ms).
[11:51:23.286] <TB3> INFO: Test took 4270ms.
[11:51:23.290] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[11:51:23.566] <TB3> INFO: Expecting 41600 events.
[11:51:27.553] <TB3> INFO: 41600 events read in total (3395ms).
[11:51:27.554] <TB3> INFO: Test took 4264ms.
[11:51:27.557] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[11:51:27.835] <TB3> INFO: Expecting 41600 events.
[11:51:31.863] <TB3> INFO: 41600 events read in total (3437ms).
[11:51:31.864] <TB3> INFO: Test took 4307ms.
[11:51:31.867] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[11:51:32.145] <TB3> INFO: Expecting 41600 events.
[11:51:36.210] <TB3> INFO: 41600 events read in total (3473ms).
[11:51:36.210] <TB3> INFO: Test took 4343ms.
[11:51:36.213] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[11:51:36.491] <TB3> INFO: Expecting 41600 events.
[11:51:40.479] <TB3> INFO: 41600 events read in total (3396ms).
[11:51:40.480] <TB3> INFO: Test took 4266ms.
[11:51:40.483] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:51:40.761] <TB3> INFO: Expecting 41600 events.
[11:51:44.737] <TB3> INFO: 41600 events read in total (3384ms).
[11:51:44.738] <TB3> INFO: Test took 4255ms.
[11:51:45.141] <TB3> INFO: PixTestGainPedestal::measure() done
[11:52:16.613] <TB3> INFO: PixTestGainPedestal::fit() done
[11:52:16.613] <TB3> INFO: non-linearity mean: 0.944 0.974 0.956 0.957 0.973 0.906 0.944 0.954 0.930 0.935 0.914 0.930 0.982 0.965 0.936 0.969
[11:52:16.613] <TB3> INFO: non-linearity RMS: 0.027 0.003 0.012 0.030 0.004 0.093 0.034 0.012 0.174 0.043 0.083 0.042 0.003 0.005 0.039 0.006
[11:52:16.613] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[11:52:16.632] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[11:52:16.645] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[11:52:16.657] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[11:52:16.670] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[11:52:16.684] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[11:52:16.698] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[11:52:16.711] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[11:52:16.724] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[11:52:16.737] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[11:52:16.750] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[11:52:16.763] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[11:52:16.776] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[11:52:16.788] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[11:52:16.801] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[11:52:16.814] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[11:52:16.826] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 159 seconds
[11:52:16.826] <TB3> INFO: Decoding statistics:
[11:52:16.826] <TB3> INFO: General information:
[11:52:16.826] <TB3> INFO: 16bit words read: 3327850
[11:52:16.826] <TB3> INFO: valid events total: 332800
[11:52:16.826] <TB3> INFO: empty events: 0
[11:52:16.826] <TB3> INFO: valid events with pixels: 332800
[11:52:16.826] <TB3> INFO: valid pixel hits: 665525
[11:52:16.826] <TB3> INFO: Event errors: 0
[11:52:16.826] <TB3> INFO: start marker: 0
[11:52:16.826] <TB3> INFO: stop marker: 0
[11:52:16.826] <TB3> INFO: overflow: 0
[11:52:16.826] <TB3> INFO: invalid 5bit words: 0
[11:52:16.826] <TB3> INFO: invalid XOR eye diagram: 0
[11:52:16.826] <TB3> INFO: frame (failed synchr.): 0
[11:52:16.826] <TB3> INFO: idle data (no TBM trl): 0
[11:52:16.826] <TB3> INFO: no data (only TBM hdr): 0
[11:52:16.826] <TB3> INFO: TBM errors: 0
[11:52:16.826] <TB3> INFO: flawed TBM headers: 0
[11:52:16.827] <TB3> INFO: flawed TBM trailers: 0
[11:52:16.827] <TB3> INFO: event ID mismatches: 0
[11:52:16.827] <TB3> INFO: ROC errors: 0
[11:52:16.827] <TB3> INFO: missing ROC header(s): 0
[11:52:16.827] <TB3> INFO: misplaced readback start: 0
[11:52:16.827] <TB3> INFO: Pixel decoding errors: 0
[11:52:16.827] <TB3> INFO: pixel data incomplete: 0
[11:52:16.827] <TB3> INFO: pixel address: 0
[11:52:16.827] <TB3> INFO: pulse height fill bit: 0
[11:52:16.827] <TB3> INFO: buffer corruption: 0
[11:52:16.847] <TB3> INFO: Decoding statistics:
[11:52:16.847] <TB3> INFO: General information:
[11:52:16.847] <TB3> INFO: 16bit words read: 3457276
[11:52:16.847] <TB3> INFO: valid events total: 353536
[11:52:16.847] <TB3> INFO: empty events: 18231
[11:52:16.847] <TB3> INFO: valid events with pixels: 335305
[11:52:16.847] <TB3> INFO: valid pixel hits: 668030
[11:52:16.847] <TB3> INFO: Event errors: 0
[11:52:16.847] <TB3> INFO: start marker: 0
[11:52:16.847] <TB3> INFO: stop marker: 0
[11:52:16.847] <TB3> INFO: overflow: 0
[11:52:16.847] <TB3> INFO: invalid 5bit words: 0
[11:52:16.847] <TB3> INFO: invalid XOR eye diagram: 0
[11:52:16.847] <TB3> INFO: frame (failed synchr.): 0
[11:52:16.847] <TB3> INFO: idle data (no TBM trl): 0
[11:52:16.847] <TB3> INFO: no data (only TBM hdr): 0
[11:52:16.847] <TB3> INFO: TBM errors: 0
[11:52:16.847] <TB3> INFO: flawed TBM headers: 0
[11:52:16.847] <TB3> INFO: flawed TBM trailers: 0
[11:52:16.847] <TB3> INFO: event ID mismatches: 0
[11:52:16.847] <TB3> INFO: ROC errors: 0
[11:52:16.847] <TB3> INFO: missing ROC header(s): 0
[11:52:16.847] <TB3> INFO: misplaced readback start: 0
[11:52:16.847] <TB3> INFO: Pixel decoding errors: 0
[11:52:16.847] <TB3> INFO: pixel data incomplete: 0
[11:52:16.847] <TB3> INFO: pixel address: 0
[11:52:16.847] <TB3> INFO: pulse height fill bit: 0
[11:52:16.847] <TB3> INFO: buffer corruption: 0
[11:52:16.847] <TB3> INFO: enter test to run
[11:52:16.847] <TB3> INFO: test: exit no parameter change
[11:52:17.004] <TB3> QUIET: Connection to board 126 closed.
[11:52:17.006] <TB3> INFO: pXar: this is the end, my friend