[16:26:59.884] <TB1> INFO: *** Welcome to pxar ***
[16:26:59.884] <TB1> INFO: *** Today: 2016/11/02
[16:26:59.889] <TB1> INFO: *** Version: c8ba-dirty
[16:26:59.889] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C15.dat
[16:26:59.890] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C1b.dat
[16:26:59.890] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//defaultMaskFile.dat
[16:26:59.890] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters_C15.dat
[16:26:59.944] <TB1> INFO: clk: 4
[16:26:59.944] <TB1> INFO: ctr: 4
[16:26:59.944] <TB1> INFO: sda: 19
[16:26:59.944] <TB1> INFO: tin: 9
[16:26:59.944] <TB1> INFO: level: 15
[16:26:59.944] <TB1> INFO: triggerdelay: 0
[16:26:59.944] <TB1> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[16:26:59.944] <TB1> INFO: Log level: INFO
[16:26:59.953] <TB1> INFO: Found DTB DTB_WXBYFL
[16:26:59.963] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[16:26:59.965] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[16:26:59.967] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[16:27:01.451] <TB1> INFO: DUT info:
[16:27:01.451] <TB1> INFO: The DUT currently contains the following objects:
[16:27:01.451] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[16:27:01.451] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:27:01.451] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:27:01.451] <TB1> INFO: TBM Core alpha (2): 7 registers set
[16:27:01.451] <TB1> INFO: TBM Core beta (3): 7 registers set
[16:27:01.451] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:27:01.451] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.451] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:01.852] <TB1> INFO: enter 'restricted' command line mode
[16:27:01.852] <TB1> INFO: enter test to run
[16:27:01.852] <TB1> INFO: test: pretest no parameter change
[16:27:01.852] <TB1> INFO: running: pretest
[16:27:02.397] <TB1> INFO: ######################################################################
[16:27:02.397] <TB1> INFO: PixTestPretest::doTest()
[16:27:02.397] <TB1> INFO: ######################################################################
[16:27:02.398] <TB1> INFO: ----------------------------------------------------------------------
[16:27:02.398] <TB1> INFO: PixTestPretest::programROC()
[16:27:02.398] <TB1> INFO: ----------------------------------------------------------------------
[16:27:20.411] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:27:20.411] <TB1> INFO: IA differences per ROC: 19.3 20.9 18.5 18.5 19.3 19.3 18.5 16.9 17.7 19.3 20.1 18.5 18.5 17.7 18.5 20.1
[16:27:20.446] <TB1> INFO: ----------------------------------------------------------------------
[16:27:20.446] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:27:20.446] <TB1> INFO: ----------------------------------------------------------------------
[16:27:41.686] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 393.1 mA = 24.5688 mA/ROC
[16:27:41.686] <TB1> INFO: i(loss) [mA/ROC]: 20.9 20.9 21.7 20.9 19.3 21.7 20.9 20.1 20.1 20.1 20.1 20.9 20.9 20.1 20.9 20.9
[16:27:41.715] <TB1> INFO: ----------------------------------------------------------------------
[16:27:41.715] <TB1> INFO: PixTestPretest::findTiming()
[16:27:41.715] <TB1> INFO: ----------------------------------------------------------------------
[16:27:41.715] <TB1> INFO: PixTestCmd::init()

[16:28:13.129] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:28:13.129] <TB1> INFO: (success/tries = 100/100), width = 4
[16:28:14.645] <TB1> INFO: ----------------------------------------------------------------------
[16:28:14.645] <TB1> INFO: PixTestPretest::findWorkingPixel()
[16:28:14.645] <TB1> INFO: ----------------------------------------------------------------------
[16:28:14.736] <TB1> INFO: Expecting 231680 events.
[16:28:24.365] <TB1> INFO: 231680 events read in total (9037ms).
[16:28:24.373] <TB1> INFO: Test took 9726ms.
[16:28:24.619] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:28:24.649] <TB1> INFO: ----------------------------------------------------------------------
[16:28:24.649] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[16:28:24.649] <TB1> INFO: ----------------------------------------------------------------------
[16:28:24.740] <TB1> INFO: Expecting 231680 events.
[16:28:34.392] <TB1> INFO: 231680 events read in total (9060ms).
[16:28:34.399] <TB1> INFO: Test took 9747ms.
[16:28:34.658] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[16:28:34.658] <TB1> INFO: CalDel: 97 98 98 93 102 104 96 88 83 100 108 100 88 91 96 101
[16:28:34.658] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 53 51 51 51
[16:28:34.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C0.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C1.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C2.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C3.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C4.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C5.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C6.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C7.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C8.dat
[16:28:34.661] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C9.dat
[16:28:34.662] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C10.dat
[16:28:34.662] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C11.dat
[16:28:34.662] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C12.dat
[16:28:34.662] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C13.dat
[16:28:34.662] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C14.dat
[16:28:34.662] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C15.dat
[16:28:34.662] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C0a.dat
[16:28:34.662] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C0b.dat
[16:28:34.662] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C1a.dat
[16:28:34.662] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C1b.dat
[16:28:34.663] <TB1> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[16:28:34.757] <TB1> INFO: enter test to run
[16:28:34.757] <TB1> INFO: test: FullTest no parameter change
[16:28:34.757] <TB1> INFO: running: fulltest
[16:28:34.758] <TB1> INFO: ######################################################################
[16:28:34.758] <TB1> INFO: PixTestFullTest::doTest()
[16:28:34.758] <TB1> INFO: ######################################################################
[16:28:34.759] <TB1> INFO: ######################################################################
[16:28:34.759] <TB1> INFO: PixTestAlive::doTest()
[16:28:34.759] <TB1> INFO: ######################################################################
[16:28:34.760] <TB1> INFO: ----------------------------------------------------------------------
[16:28:34.760] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:34.760] <TB1> INFO: ----------------------------------------------------------------------
[16:28:34.992] <TB1> INFO: Expecting 41600 events.
[16:28:38.521] <TB1> INFO: 41600 events read in total (2937ms).
[16:28:38.522] <TB1> INFO: Test took 3761ms.
[16:28:38.748] <TB1> INFO: PixTestAlive::aliveTest() done
[16:28:38.748] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:28:38.749] <TB1> INFO: ----------------------------------------------------------------------
[16:28:38.749] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:38.749] <TB1> INFO: ----------------------------------------------------------------------
[16:28:38.982] <TB1> INFO: Expecting 41600 events.
[16:28:41.945] <TB1> INFO: 41600 events read in total (2372ms).
[16:28:41.945] <TB1> INFO: Test took 3195ms.
[16:28:41.946] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:28:42.181] <TB1> INFO: PixTestAlive::maskTest() done
[16:28:42.181] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:28:42.183] <TB1> INFO: ----------------------------------------------------------------------
[16:28:42.183] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:42.183] <TB1> INFO: ----------------------------------------------------------------------
[16:28:42.418] <TB1> INFO: Expecting 41600 events.
[16:28:45.889] <TB1> INFO: 41600 events read in total (2880ms).
[16:28:45.890] <TB1> INFO: Test took 3706ms.
[16:28:46.118] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[16:28:46.118] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:28:46.118] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:28:46.118] <TB1> INFO: Decoding statistics:
[16:28:46.118] <TB1> INFO: General information:
[16:28:46.118] <TB1> INFO: 16bit words read: 0
[16:28:46.118] <TB1> INFO: valid events total: 0
[16:28:46.118] <TB1> INFO: empty events: 0
[16:28:46.118] <TB1> INFO: valid events with pixels: 0
[16:28:46.118] <TB1> INFO: valid pixel hits: 0
[16:28:46.118] <TB1> INFO: Event errors: 0
[16:28:46.118] <TB1> INFO: start marker: 0
[16:28:46.118] <TB1> INFO: stop marker: 0
[16:28:46.118] <TB1> INFO: overflow: 0
[16:28:46.118] <TB1> INFO: invalid 5bit words: 0
[16:28:46.118] <TB1> INFO: invalid XOR eye diagram: 0
[16:28:46.118] <TB1> INFO: frame (failed synchr.): 0
[16:28:46.118] <TB1> INFO: idle data (no TBM trl): 0
[16:28:46.118] <TB1> INFO: no data (only TBM hdr): 0
[16:28:46.118] <TB1> INFO: TBM errors: 0
[16:28:46.118] <TB1> INFO: flawed TBM headers: 0
[16:28:46.118] <TB1> INFO: flawed TBM trailers: 0
[16:28:46.118] <TB1> INFO: event ID mismatches: 0
[16:28:46.118] <TB1> INFO: ROC errors: 0
[16:28:46.118] <TB1> INFO: missing ROC header(s): 0
[16:28:46.119] <TB1> INFO: misplaced readback start: 0
[16:28:46.119] <TB1> INFO: Pixel decoding errors: 0
[16:28:46.119] <TB1> INFO: pixel data incomplete: 0
[16:28:46.119] <TB1> INFO: pixel address: 0
[16:28:46.119] <TB1> INFO: pulse height fill bit: 0
[16:28:46.119] <TB1> INFO: buffer corruption: 0
[16:28:46.125] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:28:46.126] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:28:46.126] <TB1> INFO: ######################################################################
[16:28:46.126] <TB1> INFO: PixTestReadback::doTest()
[16:28:46.126] <TB1> INFO: ######################################################################
[16:28:46.126] <TB1> INFO: ----------------------------------------------------------------------
[16:28:46.126] <TB1> INFO: PixTestReadback::CalibrateVd()
[16:28:46.126] <TB1> INFO: ----------------------------------------------------------------------
[16:28:56.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C1.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C2.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C3.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C4.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C5.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C6.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C7.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C8.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C9.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C10.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C11.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C12.dat
[16:28:56.090] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C13.dat
[16:28:56.091] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C14.dat
[16:28:56.091] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:28:56.118] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:28:56.118] <TB1> INFO: ----------------------------------------------------------------------
[16:28:56.118] <TB1> INFO: PixTestReadback::CalibrateVa()
[16:28:56.118] <TB1> INFO: ----------------------------------------------------------------------
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C1.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C2.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C3.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C4.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C5.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C6.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C7.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C8.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C9.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C10.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C11.dat
[16:29:06.010] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C12.dat
[16:29:06.011] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C13.dat
[16:29:06.011] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C14.dat
[16:29:06.011] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:29:06.039] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:29:06.039] <TB1> INFO: ----------------------------------------------------------------------
[16:29:06.039] <TB1> INFO: PixTestReadback::readbackVbg()
[16:29:06.039] <TB1> INFO: ----------------------------------------------------------------------
[16:29:13.682] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:29:13.682] <TB1> INFO: ----------------------------------------------------------------------
[16:29:13.682] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[16:29:13.682] <TB1> INFO: ----------------------------------------------------------------------
[16:29:13.682] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 149.1calibrated Vbg = 1.14252 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.4calibrated Vbg = 1.1443 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.1calibrated Vbg = 1.13853 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 148.5calibrated Vbg = 1.13322 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.8calibrated Vbg = 1.1385 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.4calibrated Vbg = 1.13631 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 149calibrated Vbg = 1.14604 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158.8calibrated Vbg = 1.1425 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 146.1calibrated Vbg = 1.13701 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 161.7calibrated Vbg = 1.14173 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 165.7calibrated Vbg = 1.12723 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.4calibrated Vbg = 1.13646 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.9calibrated Vbg = 1.13707 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.9calibrated Vbg = 1.13477 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 143.1calibrated Vbg = 1.1382 :::*/*/*/*/
[16:29:13.682] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 156.2calibrated Vbg = 1.14231 :::*/*/*/*/
[16:29:13.684] <TB1> INFO: ----------------------------------------------------------------------
[16:29:13.684] <TB1> INFO: PixTestReadback::CalibrateIa()
[16:29:13.684] <TB1> INFO: ----------------------------------------------------------------------
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C1.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C2.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C3.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C4.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C5.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C6.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C7.dat
[16:31:53.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C8.dat
[16:31:53.978] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C9.dat
[16:31:53.978] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C10.dat
[16:31:53.978] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C11.dat
[16:31:53.978] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C12.dat
[16:31:53.978] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C13.dat
[16:31:53.978] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C14.dat
[16:31:53.978] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:31:54.006] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:31:54.007] <TB1> INFO: PixTestReadback::doTest() done
[16:31:54.008] <TB1> INFO: Decoding statistics:
[16:31:54.008] <TB1> INFO: General information:
[16:31:54.008] <TB1> INFO: 16bit words read: 1536
[16:31:54.008] <TB1> INFO: valid events total: 256
[16:31:54.008] <TB1> INFO: empty events: 256
[16:31:54.008] <TB1> INFO: valid events with pixels: 0
[16:31:54.008] <TB1> INFO: valid pixel hits: 0
[16:31:54.008] <TB1> INFO: Event errors: 0
[16:31:54.008] <TB1> INFO: start marker: 0
[16:31:54.008] <TB1> INFO: stop marker: 0
[16:31:54.008] <TB1> INFO: overflow: 0
[16:31:54.008] <TB1> INFO: invalid 5bit words: 0
[16:31:54.008] <TB1> INFO: invalid XOR eye diagram: 0
[16:31:54.008] <TB1> INFO: frame (failed synchr.): 0
[16:31:54.008] <TB1> INFO: idle data (no TBM trl): 0
[16:31:54.008] <TB1> INFO: no data (only TBM hdr): 0
[16:31:54.008] <TB1> INFO: TBM errors: 0
[16:31:54.008] <TB1> INFO: flawed TBM headers: 0
[16:31:54.008] <TB1> INFO: flawed TBM trailers: 0
[16:31:54.008] <TB1> INFO: event ID mismatches: 0
[16:31:54.008] <TB1> INFO: ROC errors: 0
[16:31:54.008] <TB1> INFO: missing ROC header(s): 0
[16:31:54.008] <TB1> INFO: misplaced readback start: 0
[16:31:54.008] <TB1> INFO: Pixel decoding errors: 0
[16:31:54.008] <TB1> INFO: pixel data incomplete: 0
[16:31:54.008] <TB1> INFO: pixel address: 0
[16:31:54.008] <TB1> INFO: pulse height fill bit: 0
[16:31:54.008] <TB1> INFO: buffer corruption: 0
[16:31:54.043] <TB1> INFO: ######################################################################
[16:31:54.043] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:31:54.043] <TB1> INFO: ######################################################################
[16:31:54.045] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:31:54.056] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:31:54.056] <TB1> INFO: run 1 of 1
[16:31:54.334] <TB1> INFO: Expecting 3120000 events.
[16:32:24.402] <TB1> INFO: 661755 events read in total (29476ms).











[16:32:53.451] <TB1> INFO: 1313200 events read in total (58525ms).











[16:33:22.514] <TB1> INFO: 1960050 events read in total (87588ms).











[16:33:51.227] <TB1> INFO: 2607395 events read in total (116301ms).











[16:34:13.856] <TB1> INFO: 3120000 events read in total (138930ms).
[16:34:13.922] <TB1> INFO: Test took 139867ms.
[16:34:39.999] <TB1> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 165 seconds
[16:34:39.999] <TB1> INFO: number of dead bumps (per ROC): 0 0 1 0 3 0 1 0 0 0 0 1 0 0 0 0
[16:34:39.999] <TB1> INFO: separation cut (per ROC): 105 108 103 105 102 105 104 104 103 103 115 96 107 109 91 109
[16:34:39.999] <TB1> INFO: Decoding statistics:
[16:34:39.999] <TB1> INFO: General information:
[16:34:39.999] <TB1> INFO: 16bit words read: 0
[16:34:39.999] <TB1> INFO: valid events total: 0
[16:34:39.999] <TB1> INFO: empty events: 0
[16:34:39.999] <TB1> INFO: valid events with pixels: 0
[16:34:39.999] <TB1> INFO: valid pixel hits: 0
[16:34:39.999] <TB1> INFO: Event errors: 0
[16:34:39.999] <TB1> INFO: start marker: 0
[16:34:39.999] <TB1> INFO: stop marker: 0
[16:34:39.999] <TB1> INFO: overflow: 0
[16:34:39.999] <TB1> INFO: invalid 5bit words: 0
[16:34:39.999] <TB1> INFO: invalid XOR eye diagram: 0
[16:34:39.999] <TB1> INFO: frame (failed synchr.): 0
[16:34:39.999] <TB1> INFO: idle data (no TBM trl): 0
[16:34:39.999] <TB1> INFO: no data (only TBM hdr): 0
[16:34:39.999] <TB1> INFO: TBM errors: 0
[16:34:39.999] <TB1> INFO: flawed TBM headers: 0
[16:34:39.999] <TB1> INFO: flawed TBM trailers: 0
[16:34:39.999] <TB1> INFO: event ID mismatches: 0
[16:34:39.999] <TB1> INFO: ROC errors: 0
[16:34:39.999] <TB1> INFO: missing ROC header(s): 0
[16:34:39.999] <TB1> INFO: misplaced readback start: 0
[16:34:39.999] <TB1> INFO: Pixel decoding errors: 0
[16:34:39.999] <TB1> INFO: pixel data incomplete: 0
[16:34:39.999] <TB1> INFO: pixel address: 0
[16:34:39.999] <TB1> INFO: pulse height fill bit: 0
[16:34:39.999] <TB1> INFO: buffer corruption: 0
[16:34:40.043] <TB1> INFO: ######################################################################
[16:34:40.043] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:34:40.043] <TB1> INFO: ######################################################################
[16:34:40.043] <TB1> INFO: ----------------------------------------------------------------------
[16:34:40.043] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:34:40.043] <TB1> INFO: ----------------------------------------------------------------------
[16:34:40.043] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:34:40.055] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[16:34:40.055] <TB1> INFO: run 1 of 1
[16:34:40.333] <TB1> INFO: Expecting 36608000 events.
[16:35:03.228] <TB1> INFO: 673550 events read in total (22302ms).
[16:35:25.845] <TB1> INFO: 1333100 events read in total (44919ms).
[16:35:48.155] <TB1> INFO: 1991200 events read in total (67229ms).
[16:36:10.727] <TB1> INFO: 2647300 events read in total (89801ms).
[16:36:33.132] <TB1> INFO: 3305750 events read in total (112206ms).
[16:36:55.451] <TB1> INFO: 3962950 events read in total (134525ms).
[16:37:17.867] <TB1> INFO: 4619050 events read in total (156941ms).
[16:37:40.191] <TB1> INFO: 5276200 events read in total (179265ms).
[16:38:02.698] <TB1> INFO: 5931800 events read in total (201772ms).
[16:38:25.129] <TB1> INFO: 6587400 events read in total (224203ms).
[16:38:47.567] <TB1> INFO: 7241850 events read in total (246641ms).
[16:39:09.897] <TB1> INFO: 7898300 events read in total (268971ms).
[16:39:32.143] <TB1> INFO: 8553500 events read in total (291217ms).
[16:39:54.417] <TB1> INFO: 9209950 events read in total (313491ms).
[16:40:16.475] <TB1> INFO: 9864350 events read in total (335549ms).
[16:40:38.735] <TB1> INFO: 10519650 events read in total (357809ms).
[16:41:00.814] <TB1> INFO: 11173100 events read in total (379888ms).
[16:41:23.098] <TB1> INFO: 11827000 events read in total (402172ms).
[16:41:45.436] <TB1> INFO: 12482150 events read in total (424510ms).
[16:42:07.692] <TB1> INFO: 13138650 events read in total (446766ms).
[16:42:30.041] <TB1> INFO: 13795600 events read in total (469115ms).
[16:42:52.406] <TB1> INFO: 14450650 events read in total (491480ms).
[16:43:14.491] <TB1> INFO: 15106050 events read in total (513565ms).
[16:43:36.612] <TB1> INFO: 15758400 events read in total (535686ms).
[16:43:58.812] <TB1> INFO: 16410250 events read in total (557886ms).
[16:44:21.583] <TB1> INFO: 17063000 events read in total (580657ms).
[16:44:43.975] <TB1> INFO: 17717500 events read in total (603049ms).
[16:45:06.327] <TB1> INFO: 18369350 events read in total (625401ms).
[16:45:28.708] <TB1> INFO: 19020300 events read in total (647782ms).
[16:45:51.144] <TB1> INFO: 19668550 events read in total (670218ms).
[16:46:13.262] <TB1> INFO: 20318250 events read in total (692336ms).
[16:46:35.283] <TB1> INFO: 20968050 events read in total (714357ms).
[16:46:57.596] <TB1> INFO: 21618150 events read in total (736670ms).
[16:47:19.862] <TB1> INFO: 22267550 events read in total (758936ms).
[16:47:42.163] <TB1> INFO: 22916500 events read in total (781237ms).
[16:48:04.210] <TB1> INFO: 23566200 events read in total (803284ms).
[16:48:26.841] <TB1> INFO: 24217250 events read in total (825915ms).
[16:48:49.353] <TB1> INFO: 24866950 events read in total (848427ms).
[16:49:11.638] <TB1> INFO: 25516800 events read in total (870712ms).
[16:49:33.744] <TB1> INFO: 26166650 events read in total (892818ms).
[16:49:55.915] <TB1> INFO: 26814550 events read in total (914989ms).
[16:50:18.388] <TB1> INFO: 27463250 events read in total (937462ms).
[16:50:40.828] <TB1> INFO: 28110750 events read in total (959902ms).
[16:51:03.282] <TB1> INFO: 28758000 events read in total (982356ms).
[16:51:25.304] <TB1> INFO: 29404550 events read in total (1004378ms).
[16:51:47.584] <TB1> INFO: 30050850 events read in total (1026658ms).
[16:52:09.565] <TB1> INFO: 30698450 events read in total (1048639ms).
[16:52:31.619] <TB1> INFO: 31344500 events read in total (1070693ms).
[16:52:53.707] <TB1> INFO: 31990700 events read in total (1092781ms).
[16:53:15.832] <TB1> INFO: 32636200 events read in total (1114906ms).
[16:53:38.169] <TB1> INFO: 33281450 events read in total (1137243ms).
[16:54:00.225] <TB1> INFO: 33929050 events read in total (1159299ms).
[16:54:22.462] <TB1> INFO: 34580000 events read in total (1181536ms).
[16:54:44.720] <TB1> INFO: 35228400 events read in total (1203794ms).
[16:55:07.010] <TB1> INFO: 35875750 events read in total (1226084ms).
[16:55:29.379] <TB1> INFO: 36535150 events read in total (1248453ms).
[16:55:32.131] <TB1> INFO: 36608000 events read in total (1251205ms).
[16:55:32.189] <TB1> INFO: Test took 1252134ms.
[16:55:32.595] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:34.652] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:36.689] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:38.706] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:40.747] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:42.843] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:44.889] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:46.952] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:49.172] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:51.429] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:53.674] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:55.766] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:55:57.872] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:00.021] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:02.145] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:04.165] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:06.317] <TB1> INFO: PixTestScurves::scurves() done
[16:56:06.317] <TB1> INFO: Vcal mean: 116.75 123.72 114.72 108.73 110.77 116.79 109.91 114.69 112.76 120.58 120.36 97.11 120.88 119.46 95.46 116.00
[16:56:06.317] <TB1> INFO: Vcal RMS: 5.32 6.07 5.51 4.55 5.02 5.39 4.72 5.54 6.33 6.82 6.23 4.94 5.62 5.72 4.89 5.16
[16:56:06.317] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1286 seconds
[16:56:06.318] <TB1> INFO: Decoding statistics:
[16:56:06.318] <TB1> INFO: General information:
[16:56:06.318] <TB1> INFO: 16bit words read: 0
[16:56:06.318] <TB1> INFO: valid events total: 0
[16:56:06.318] <TB1> INFO: empty events: 0
[16:56:06.318] <TB1> INFO: valid events with pixels: 0
[16:56:06.318] <TB1> INFO: valid pixel hits: 0
[16:56:06.318] <TB1> INFO: Event errors: 0
[16:56:06.318] <TB1> INFO: start marker: 0
[16:56:06.318] <TB1> INFO: stop marker: 0
[16:56:06.318] <TB1> INFO: overflow: 0
[16:56:06.318] <TB1> INFO: invalid 5bit words: 0
[16:56:06.318] <TB1> INFO: invalid XOR eye diagram: 0
[16:56:06.318] <TB1> INFO: frame (failed synchr.): 0
[16:56:06.318] <TB1> INFO: idle data (no TBM trl): 0
[16:56:06.318] <TB1> INFO: no data (only TBM hdr): 0
[16:56:06.318] <TB1> INFO: TBM errors: 0
[16:56:06.318] <TB1> INFO: flawed TBM headers: 0
[16:56:06.318] <TB1> INFO: flawed TBM trailers: 0
[16:56:06.318] <TB1> INFO: event ID mismatches: 0
[16:56:06.318] <TB1> INFO: ROC errors: 0
[16:56:06.318] <TB1> INFO: missing ROC header(s): 0
[16:56:06.318] <TB1> INFO: misplaced readback start: 0
[16:56:06.318] <TB1> INFO: Pixel decoding errors: 0
[16:56:06.318] <TB1> INFO: pixel data incomplete: 0
[16:56:06.318] <TB1> INFO: pixel address: 0
[16:56:06.318] <TB1> INFO: pulse height fill bit: 0
[16:56:06.318] <TB1> INFO: buffer corruption: 0
[16:56:06.404] <TB1> INFO: ######################################################################
[16:56:06.404] <TB1> INFO: PixTestTrim::doTest()
[16:56:06.404] <TB1> INFO: ######################################################################
[16:56:06.406] <TB1> INFO: ----------------------------------------------------------------------
[16:56:06.406] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:56:06.406] <TB1> INFO: ----------------------------------------------------------------------
[16:56:06.470] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:56:06.470] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:56:06.482] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:56:06.482] <TB1> INFO: run 1 of 1
[16:56:06.803] <TB1> INFO: Expecting 5025280 events.
[16:56:37.242] <TB1> INFO: 822224 events read in total (29847ms).
[16:57:07.050] <TB1> INFO: 1642032 events read in total (59655ms).
[16:57:36.820] <TB1> INFO: 2459184 events read in total (89426ms).
[16:58:06.064] <TB1> INFO: 3271808 events read in total (118669ms).
[16:58:35.473] <TB1> INFO: 4080632 events read in total (148078ms).
[16:59:05.445] <TB1> INFO: 4888064 events read in total (178050ms).
[16:59:10.867] <TB1> INFO: 5025280 events read in total (183472ms).
[16:59:10.910] <TB1> INFO: Test took 184428ms.
[16:59:29.650] <TB1> INFO: ROC 0 VthrComp = 130
[16:59:29.650] <TB1> INFO: ROC 1 VthrComp = 133
[16:59:29.650] <TB1> INFO: ROC 2 VthrComp = 124
[16:59:29.650] <TB1> INFO: ROC 3 VthrComp = 117
[16:59:29.650] <TB1> INFO: ROC 4 VthrComp = 115
[16:59:29.650] <TB1> INFO: ROC 5 VthrComp = 129
[16:59:29.651] <TB1> INFO: ROC 6 VthrComp = 123
[16:59:29.651] <TB1> INFO: ROC 7 VthrComp = 120
[16:59:29.651] <TB1> INFO: ROC 8 VthrComp = 122
[16:59:29.651] <TB1> INFO: ROC 9 VthrComp = 122
[16:59:29.651] <TB1> INFO: ROC 10 VthrComp = 132
[16:59:29.651] <TB1> INFO: ROC 11 VthrComp = 108
[16:59:29.651] <TB1> INFO: ROC 12 VthrComp = 133
[16:59:29.651] <TB1> INFO: ROC 13 VthrComp = 132
[16:59:29.651] <TB1> INFO: ROC 14 VthrComp = 106
[16:59:29.652] <TB1> INFO: ROC 15 VthrComp = 132
[16:59:29.939] <TB1> INFO: Expecting 41600 events.
[16:59:33.483] <TB1> INFO: 41600 events read in total (2953ms).
[16:59:33.484] <TB1> INFO: Test took 3830ms.
[16:59:33.495] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:59:33.495] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:59:33.505] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:59:33.505] <TB1> INFO: run 1 of 1
[16:59:33.783] <TB1> INFO: Expecting 5025280 events.
[16:59:59.575] <TB1> INFO: 588560 events read in total (25201ms).
[17:00:24.460] <TB1> INFO: 1175792 events read in total (50086ms).
[17:00:49.582] <TB1> INFO: 1763840 events read in total (75208ms).
[17:01:14.518] <TB1> INFO: 2351840 events read in total (100144ms).
[17:01:39.794] <TB1> INFO: 2938136 events read in total (125420ms).
[17:02:04.988] <TB1> INFO: 3523176 events read in total (150614ms).
[17:02:30.282] <TB1> INFO: 4107288 events read in total (175908ms).
[17:02:55.713] <TB1> INFO: 4690096 events read in total (201339ms).
[17:03:10.009] <TB1> INFO: 5025280 events read in total (215635ms).
[17:03:10.087] <TB1> INFO: Test took 216582ms.
[17:03:38.661] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 56.6211 for pixel 35/67 mean/min/max = 44.0707/31.4054/56.736
[17:03:38.661] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.8497 for pixel 0/52 mean/min/max = 46.8039/33.6394/59.9685
[17:03:38.662] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 59.0749 for pixel 11/14 mean/min/max = 45.0593/30.906/59.2127
[17:03:38.662] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 57.4853 for pixel 21/8 mean/min/max = 45.2344/32.9466/57.5223
[17:03:38.662] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.2074 for pixel 22/74 mean/min/max = 45.0541/31.8901/58.2181
[17:03:38.663] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.1976 for pixel 0/0 mean/min/max = 45.4259/32.3886/58.4632
[17:03:38.663] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 55.7356 for pixel 6/18 mean/min/max = 43.739/31.5981/55.8799
[17:03:38.664] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.3071 for pixel 0/18 mean/min/max = 46.3039/32.1634/60.4443
[17:03:38.664] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 62.3513 for pixel 0/55 mean/min/max = 46.4398/30.4/62.4795
[17:03:38.664] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 66.3906 for pixel 0/4 mean/min/max = 48.3159/30.0668/66.5649
[17:03:38.665] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.6524 for pixel 0/71 mean/min/max = 46.7516/32.8183/60.6849
[17:03:38.665] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 56.6952 for pixel 51/79 mean/min/max = 45.5819/34.4488/56.7149
[17:03:38.666] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 59.0983 for pixel 45/12 mean/min/max = 46.428/33.6661/59.1899
[17:03:38.666] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.2524 for pixel 0/59 mean/min/max = 44.5401/31.7475/57.3326
[17:03:38.666] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 56.8307 for pixel 17/73 mean/min/max = 45.5696/34.28/56.8592
[17:03:38.667] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 57.5844 for pixel 21/4 mean/min/max = 44.7274/31.8469/57.6079
[17:03:38.667] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:38.756] <TB1> INFO: Expecting 411648 events.
[17:03:48.286] <TB1> INFO: 411648 events read in total (8938ms).
[17:03:48.294] <TB1> INFO: Expecting 411648 events.
[17:03:57.298] <TB1> INFO: 411648 events read in total (8601ms).
[17:03:57.307] <TB1> INFO: Expecting 411648 events.
[17:04:06.432] <TB1> INFO: 411648 events read in total (8722ms).
[17:04:06.449] <TB1> INFO: Expecting 411648 events.
[17:04:15.577] <TB1> INFO: 411648 events read in total (8725ms).
[17:04:15.597] <TB1> INFO: Expecting 411648 events.
[17:04:24.618] <TB1> INFO: 411648 events read in total (8618ms).
[17:04:24.643] <TB1> INFO: Expecting 411648 events.
[17:04:33.732] <TB1> INFO: 411648 events read in total (8686ms).
[17:04:33.759] <TB1> INFO: Expecting 411648 events.
[17:04:42.771] <TB1> INFO: 411648 events read in total (8610ms).
[17:04:42.801] <TB1> INFO: Expecting 411648 events.
[17:04:51.780] <TB1> INFO: 411648 events read in total (8576ms).
[17:04:51.814] <TB1> INFO: Expecting 411648 events.
[17:05:00.841] <TB1> INFO: 411648 events read in total (8624ms).
[17:05:00.871] <TB1> INFO: Expecting 411648 events.
[17:05:09.834] <TB1> INFO: 411648 events read in total (8560ms).
[17:05:09.874] <TB1> INFO: Expecting 411648 events.
[17:05:18.863] <TB1> INFO: 411648 events read in total (8586ms).
[17:05:18.897] <TB1> INFO: Expecting 411648 events.
[17:05:27.942] <TB1> INFO: 411648 events read in total (8642ms).
[17:05:27.991] <TB1> INFO: Expecting 411648 events.
[17:05:37.062] <TB1> INFO: 411648 events read in total (8668ms).
[17:05:37.116] <TB1> INFO: Expecting 411648 events.
[17:05:46.112] <TB1> INFO: 411648 events read in total (8593ms).
[17:05:46.154] <TB1> INFO: Expecting 411648 events.
[17:05:55.212] <TB1> INFO: 411648 events read in total (8655ms).
[17:05:55.259] <TB1> INFO: Expecting 411648 events.
[17:06:04.272] <TB1> INFO: 411648 events read in total (8610ms).
[17:06:04.337] <TB1> INFO: Test took 145670ms.
[17:06:05.117] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:06:05.127] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:06:05.127] <TB1> INFO: run 1 of 1
[17:06:05.361] <TB1> INFO: Expecting 5025280 events.
[17:06:31.242] <TB1> INFO: 583928 events read in total (25289ms).
[17:06:56.481] <TB1> INFO: 1166464 events read in total (50529ms).
[17:07:21.874] <TB1> INFO: 1747752 events read in total (75921ms).
[17:07:47.137] <TB1> INFO: 2328248 events read in total (101184ms).
[17:08:12.496] <TB1> INFO: 2908152 events read in total (126544ms).
[17:08:37.746] <TB1> INFO: 3488912 events read in total (151793ms).
[17:09:02.969] <TB1> INFO: 4069640 events read in total (177016ms).
[17:09:28.422] <TB1> INFO: 4652440 events read in total (202469ms).
[17:09:44.721] <TB1> INFO: 5025280 events read in total (218768ms).
[17:09:44.839] <TB1> INFO: Test took 219713ms.
[17:10:11.174] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 146.917931
[17:10:11.425] <TB1> INFO: Expecting 208000 events.
[17:10:21.268] <TB1> INFO: 208000 events read in total (9251ms).
[17:10:21.269] <TB1> INFO: Test took 10093ms.
[17:10:21.343] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 156 (-1/-1) hits flags = 528 (plus default)
[17:10:21.353] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:10:21.353] <TB1> INFO: run 1 of 1
[17:10:21.631] <TB1> INFO: Expecting 5158400 events.
[17:10:47.480] <TB1> INFO: 582400 events read in total (25258ms).
[17:11:12.786] <TB1> INFO: 1165272 events read in total (50564ms).
[17:11:37.940] <TB1> INFO: 1748160 events read in total (75718ms).
[17:12:03.095] <TB1> INFO: 2331088 events read in total (100873ms).
[17:12:28.196] <TB1> INFO: 2913720 events read in total (125974ms).
[17:12:53.195] <TB1> INFO: 3495632 events read in total (150973ms).
[17:13:18.510] <TB1> INFO: 4076704 events read in total (176288ms).
[17:13:43.570] <TB1> INFO: 4657088 events read in total (201348ms).
[17:14:05.407] <TB1> INFO: 5158400 events read in total (223185ms).
[17:14:05.487] <TB1> INFO: Test took 224134ms.
[17:14:34.494] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.664340 .. 44.792381
[17:14:34.728] <TB1> INFO: Expecting 208000 events.
[17:14:44.603] <TB1> INFO: 208000 events read in total (9284ms).
[17:14:44.604] <TB1> INFO: Test took 10109ms.
[17:14:44.650] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 54 (-1/-1) hits flags = 528 (plus default)
[17:14:44.659] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:14:44.659] <TB1> INFO: run 1 of 1
[17:14:44.937] <TB1> INFO: Expecting 1264640 events.
[17:15:13.090] <TB1> INFO: 662696 events read in total (27562ms).
[17:15:37.697] <TB1> INFO: 1264640 events read in total (52169ms).
[17:15:37.732] <TB1> INFO: Test took 53073ms.
[17:15:51.899] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 24.947992 .. 44.913746
[17:15:52.139] <TB1> INFO: Expecting 208000 events.
[17:16:01.912] <TB1> INFO: 208000 events read in total (9181ms).
[17:16:01.913] <TB1> INFO: Test took 10013ms.
[17:16:01.981] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 14 .. 54 (-1/-1) hits flags = 528 (plus default)
[17:16:01.992] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:16:01.992] <TB1> INFO: run 1 of 1
[17:16:02.269] <TB1> INFO: Expecting 1364480 events.
[17:16:30.310] <TB1> INFO: 675240 events read in total (27449ms).
[17:16:57.737] <TB1> INFO: 1349264 events read in total (54877ms).
[17:16:58.832] <TB1> INFO: 1364480 events read in total (55971ms).
[17:16:58.858] <TB1> INFO: Test took 56866ms.
[17:17:12.992] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 24.009549 .. 43.125294
[17:17:13.231] <TB1> INFO: Expecting 208000 events.
[17:17:23.037] <TB1> INFO: 208000 events read in total (9215ms).
[17:17:23.038] <TB1> INFO: Test took 10044ms.
[17:17:23.084] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 53 (-1/-1) hits flags = 528 (plus default)
[17:17:23.093] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:17:23.093] <TB1> INFO: run 1 of 1
[17:17:23.371] <TB1> INFO: Expecting 1331200 events.
[17:17:51.710] <TB1> INFO: 680552 events read in total (27748ms).
[17:18:18.239] <TB1> INFO: 1331200 events read in total (54277ms).
[17:18:18.262] <TB1> INFO: Test took 55170ms.
[17:18:31.815] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:18:31.815] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:18:31.826] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:18:31.826] <TB1> INFO: run 1 of 1
[17:18:32.065] <TB1> INFO: Expecting 1364480 events.
[17:18:59.842] <TB1> INFO: 667104 events read in total (27186ms).
[17:19:27.382] <TB1> INFO: 1333840 events read in total (54726ms).
[17:19:29.076] <TB1> INFO: 1364480 events read in total (56420ms).
[17:19:29.106] <TB1> INFO: Test took 57281ms.
[17:19:43.409] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C0.dat
[17:19:43.409] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C1.dat
[17:19:43.409] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C2.dat
[17:19:43.409] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C3.dat
[17:19:43.409] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C4.dat
[17:19:43.409] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C5.dat
[17:19:43.409] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C6.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C7.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C8.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C9.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C10.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C11.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C12.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C13.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C14.dat
[17:19:43.410] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C15.dat
[17:19:43.410] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C0.dat
[17:19:43.418] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C1.dat
[17:19:43.425] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C2.dat
[17:19:43.432] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C3.dat
[17:19:43.439] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C4.dat
[17:19:43.446] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C5.dat
[17:19:43.453] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C6.dat
[17:19:43.461] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C7.dat
[17:19:43.466] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C8.dat
[17:19:43.472] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C9.dat
[17:19:43.477] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C10.dat
[17:19:43.484] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C11.dat
[17:19:43.491] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C12.dat
[17:19:43.499] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C13.dat
[17:19:43.507] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C14.dat
[17:19:43.514] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C15.dat
[17:19:43.521] <TB1> INFO: PixTestTrim::trimTest() done
[17:19:43.521] <TB1> INFO: vtrim: 137 148 159 147 141 144 125 120 137 163 172 113 139 142 134 150
[17:19:43.521] <TB1> INFO: vthrcomp: 130 133 124 117 115 129 123 120 122 122 132 108 133 132 106 132
[17:19:43.521] <TB1> INFO: vcal mean: 34.89 35.04 34.99 34.98 34.95 34.99 34.99 34.98 34.94 34.96 34.96 34.98 35.00 35.01 34.98 34.91
[17:19:43.521] <TB1> INFO: vcal RMS: 1.08 1.03 1.06 0.99 1.00 1.01 0.94 1.06 1.07 1.24 1.05 0.89 1.07 1.08 0.92 1.03
[17:19:43.521] <TB1> INFO: bits mean: 10.51 9.06 10.34 9.86 10.13 9.82 10.21 9.80 9.34 9.50 9.99 8.97 9.77 10.37 9.62 10.72
[17:19:43.521] <TB1> INFO: bits RMS: 2.37 2.55 2.48 2.45 2.44 2.54 2.52 2.54 2.88 2.73 2.27 2.56 2.26 2.41 2.28 2.16
[17:19:43.539] <TB1> INFO: ----------------------------------------------------------------------
[17:19:43.539] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:19:43.539] <TB1> INFO: ----------------------------------------------------------------------
[17:19:43.542] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:19:43.554] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:19:43.555] <TB1> INFO: run 1 of 1
[17:19:43.819] <TB1> INFO: Expecting 4160000 events.
[17:20:15.242] <TB1> INFO: 734430 events read in total (30831ms).
[17:20:45.810] <TB1> INFO: 1463100 events read in total (61399ms).
[17:21:16.887] <TB1> INFO: 2189320 events read in total (92476ms).
[17:21:47.687] <TB1> INFO: 2911190 events read in total (123276ms).
[17:22:18.072] <TB1> INFO: 3629815 events read in total (153661ms).
[17:22:40.513] <TB1> INFO: 4160000 events read in total (176102ms).
[17:22:40.582] <TB1> INFO: Test took 177027ms.
[17:23:10.487] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:23:10.501] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:23:10.501] <TB1> INFO: run 1 of 1
[17:23:10.793] <TB1> INFO: Expecting 4160000 events.
[17:23:41.434] <TB1> INFO: 711975 events read in total (30049ms).
[17:24:11.484] <TB1> INFO: 1419150 events read in total (60099ms).
[17:24:41.595] <TB1> INFO: 2125110 events read in total (90210ms).
[17:25:11.433] <TB1> INFO: 2826820 events read in total (120048ms).
[17:25:41.744] <TB1> INFO: 3526470 events read in total (150359ms).
[17:26:09.145] <TB1> INFO: 4160000 events read in total (177760ms).
[17:26:09.218] <TB1> INFO: Test took 178717ms.
[17:26:41.042] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 187 (-1/-1) hits flags = 528 (plus default)
[17:26:41.053] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:26:41.053] <TB1> INFO: run 1 of 1
[17:26:41.293] <TB1> INFO: Expecting 3910400 events.
[17:27:12.529] <TB1> INFO: 727430 events read in total (30643ms).
[17:27:43.128] <TB1> INFO: 1450635 events read in total (61242ms).
[17:28:13.815] <TB1> INFO: 2170145 events read in total (91929ms).
[17:28:44.423] <TB1> INFO: 2886330 events read in total (122537ms).
[17:29:14.660] <TB1> INFO: 3598920 events read in total (152774ms).
[17:29:28.088] <TB1> INFO: 3910400 events read in total (166202ms).
[17:29:28.136] <TB1> INFO: Test took 167083ms.
[17:29:57.942] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 187 (-1/-1) hits flags = 528 (plus default)
[17:29:57.954] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:29:57.954] <TB1> INFO: run 1 of 1
[17:29:58.197] <TB1> INFO: Expecting 3910400 events.
[17:30:29.321] <TB1> INFO: 727670 events read in total (30533ms).
[17:31:00.048] <TB1> INFO: 1451050 events read in total (61260ms).
[17:31:30.710] <TB1> INFO: 2170490 events read in total (91922ms).
[17:32:01.036] <TB1> INFO: 2886835 events read in total (122248ms).
[17:32:31.663] <TB1> INFO: 3599345 events read in total (152875ms).
[17:32:45.160] <TB1> INFO: 3910400 events read in total (166372ms).
[17:32:45.210] <TB1> INFO: Test took 167256ms.
[17:33:15.055] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[17:33:15.068] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:33:15.068] <TB1> INFO: run 1 of 1
[17:33:15.393] <TB1> INFO: Expecting 3889600 events.
[17:33:46.832] <TB1> INFO: 728915 events read in total (30847ms).
[17:34:17.749] <TB1> INFO: 1453420 events read in total (61764ms).
[17:34:48.183] <TB1> INFO: 2174380 events read in total (92198ms).
[17:35:18.788] <TB1> INFO: 2891840 events read in total (122803ms).
[17:35:49.422] <TB1> INFO: 3605890 events read in total (153437ms).
[17:36:01.929] <TB1> INFO: 3889600 events read in total (165944ms).
[17:36:01.980] <TB1> INFO: Test took 166912ms.
[17:36:31.351] <TB1> INFO: PixTestTrim::trimBitTest() done
[17:36:31.352] <TB1> INFO: PixTestTrim::doTest() done, duration: 2424 seconds
[17:36:31.353] <TB1> INFO: Decoding statistics:
[17:36:31.353] <TB1> INFO: General information:
[17:36:31.353] <TB1> INFO: 16bit words read: 0
[17:36:31.353] <TB1> INFO: valid events total: 0
[17:36:31.353] <TB1> INFO: empty events: 0
[17:36:31.353] <TB1> INFO: valid events with pixels: 0
[17:36:31.353] <TB1> INFO: valid pixel hits: 0
[17:36:31.353] <TB1> INFO: Event errors: 0
[17:36:31.353] <TB1> INFO: start marker: 0
[17:36:31.353] <TB1> INFO: stop marker: 0
[17:36:31.353] <TB1> INFO: overflow: 0
[17:36:31.353] <TB1> INFO: invalid 5bit words: 0
[17:36:31.353] <TB1> INFO: invalid XOR eye diagram: 0
[17:36:31.353] <TB1> INFO: frame (failed synchr.): 0
[17:36:31.353] <TB1> INFO: idle data (no TBM trl): 0
[17:36:31.353] <TB1> INFO: no data (only TBM hdr): 0
[17:36:31.353] <TB1> INFO: TBM errors: 0
[17:36:31.353] <TB1> INFO: flawed TBM headers: 0
[17:36:31.353] <TB1> INFO: flawed TBM trailers: 0
[17:36:31.353] <TB1> INFO: event ID mismatches: 0
[17:36:31.353] <TB1> INFO: ROC errors: 0
[17:36:31.353] <TB1> INFO: missing ROC header(s): 0
[17:36:31.353] <TB1> INFO: misplaced readback start: 0
[17:36:31.353] <TB1> INFO: Pixel decoding errors: 0
[17:36:31.353] <TB1> INFO: pixel data incomplete: 0
[17:36:31.353] <TB1> INFO: pixel address: 0
[17:36:31.353] <TB1> INFO: pulse height fill bit: 0
[17:36:31.353] <TB1> INFO: buffer corruption: 0
[17:36:32.133] <TB1> INFO: ######################################################################
[17:36:32.133] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:36:32.133] <TB1> INFO: ######################################################################
[17:36:32.392] <TB1> INFO: Expecting 41600 events.
[17:36:35.989] <TB1> INFO: 41600 events read in total (3005ms).
[17:36:35.990] <TB1> INFO: Test took 3856ms.
[17:36:36.513] <TB1> INFO: Expecting 41600 events.
[17:36:40.121] <TB1> INFO: 41600 events read in total (3016ms).
[17:36:40.122] <TB1> INFO: Test took 3929ms.
[17:36:40.412] <TB1> INFO: Expecting 41600 events.
[17:36:43.956] <TB1> INFO: 41600 events read in total (2952ms).
[17:36:43.956] <TB1> INFO: Test took 3809ms.
[17:36:44.245] <TB1> INFO: Expecting 41600 events.
[17:36:47.798] <TB1> INFO: 41600 events read in total (2961ms).
[17:36:47.799] <TB1> INFO: Test took 3820ms.
[17:36:48.095] <TB1> INFO: Expecting 41600 events.
[17:36:51.709] <TB1> INFO: 41600 events read in total (3022ms).
[17:36:51.710] <TB1> INFO: Test took 3888ms.
[17:36:51.000] <TB1> INFO: Expecting 41600 events.
[17:36:55.442] <TB1> INFO: 41600 events read in total (2850ms).
[17:36:55.443] <TB1> INFO: Test took 3707ms.
[17:36:55.731] <TB1> INFO: Expecting 41600 events.
[17:36:59.185] <TB1> INFO: 41600 events read in total (2862ms).
[17:36:59.185] <TB1> INFO: Test took 3719ms.
[17:36:59.473] <TB1> INFO: Expecting 41600 events.
[17:37:02.980] <TB1> INFO: 41600 events read in total (2915ms).
[17:37:02.980] <TB1> INFO: Test took 3771ms.
[17:37:03.269] <TB1> INFO: Expecting 41600 events.
[17:37:06.815] <TB1> INFO: 41600 events read in total (2955ms).
[17:37:06.816] <TB1> INFO: Test took 3812ms.
[17:37:07.104] <TB1> INFO: Expecting 41600 events.
[17:37:10.682] <TB1> INFO: 41600 events read in total (2986ms).
[17:37:10.683] <TB1> INFO: Test took 3844ms.
[17:37:10.971] <TB1> INFO: Expecting 41600 events.
[17:37:14.496] <TB1> INFO: 41600 events read in total (2933ms).
[17:37:14.497] <TB1> INFO: Test took 3790ms.
[17:37:14.785] <TB1> INFO: Expecting 41600 events.
[17:37:18.272] <TB1> INFO: 41600 events read in total (2895ms).
[17:37:18.273] <TB1> INFO: Test took 3753ms.
[17:37:18.571] <TB1> INFO: Expecting 41600 events.
[17:37:22.011] <TB1> INFO: 41600 events read in total (2849ms).
[17:37:22.012] <TB1> INFO: Test took 3713ms.
[17:37:22.300] <TB1> INFO: Expecting 41600 events.
[17:37:25.813] <TB1> INFO: 41600 events read in total (2921ms).
[17:37:25.814] <TB1> INFO: Test took 3779ms.
[17:37:26.111] <TB1> INFO: Expecting 41600 events.
[17:37:29.630] <TB1> INFO: 41600 events read in total (2927ms).
[17:37:29.631] <TB1> INFO: Test took 3792ms.
[17:37:29.919] <TB1> INFO: Expecting 41600 events.
[17:37:33.382] <TB1> INFO: 41600 events read in total (2872ms).
[17:37:33.384] <TB1> INFO: Test took 3730ms.
[17:37:33.672] <TB1> INFO: Expecting 41600 events.
[17:37:37.207] <TB1> INFO: 41600 events read in total (2944ms).
[17:37:37.208] <TB1> INFO: Test took 3801ms.
[17:37:37.526] <TB1> INFO: Expecting 41600 events.
[17:37:40.985] <TB1> INFO: 41600 events read in total (2868ms).
[17:37:40.986] <TB1> INFO: Test took 3754ms.
[17:37:41.276] <TB1> INFO: Expecting 41600 events.
[17:37:44.752] <TB1> INFO: 41600 events read in total (2884ms).
[17:37:44.753] <TB1> INFO: Test took 3741ms.
[17:37:45.041] <TB1> INFO: Expecting 41600 events.
[17:37:48.576] <TB1> INFO: 41600 events read in total (2943ms).
[17:37:48.576] <TB1> INFO: Test took 3800ms.
[17:37:48.876] <TB1> INFO: Expecting 41600 events.
[17:37:52.372] <TB1> INFO: 41600 events read in total (2904ms).
[17:37:52.373] <TB1> INFO: Test took 3774ms.
[17:37:52.661] <TB1> INFO: Expecting 41600 events.
[17:37:56.207] <TB1> INFO: 41600 events read in total (2954ms).
[17:37:56.207] <TB1> INFO: Test took 3811ms.
[17:37:56.495] <TB1> INFO: Expecting 41600 events.
[17:37:59.968] <TB1> INFO: 41600 events read in total (2881ms).
[17:37:59.969] <TB1> INFO: Test took 3738ms.
[17:38:00.257] <TB1> INFO: Expecting 41600 events.
[17:38:03.803] <TB1> INFO: 41600 events read in total (2954ms).
[17:38:03.804] <TB1> INFO: Test took 3811ms.
[17:38:04.093] <TB1> INFO: Expecting 41600 events.
[17:38:07.646] <TB1> INFO: 41600 events read in total (2962ms).
[17:38:07.647] <TB1> INFO: Test took 3819ms.
[17:38:07.935] <TB1> INFO: Expecting 41600 events.
[17:38:11.396] <TB1> INFO: 41600 events read in total (2869ms).
[17:38:11.397] <TB1> INFO: Test took 3727ms.
[17:38:11.720] <TB1> INFO: Expecting 41600 events.
[17:38:15.306] <TB1> INFO: 41600 events read in total (2994ms).
[17:38:15.307] <TB1> INFO: Test took 3886ms.
[17:38:15.605] <TB1> INFO: Expecting 41600 events.
[17:38:19.174] <TB1> INFO: 41600 events read in total (2978ms).
[17:38:19.175] <TB1> INFO: Test took 3844ms.
[17:38:19.463] <TB1> INFO: Expecting 2560 events.
[17:38:20.350] <TB1> INFO: 2560 events read in total (295ms).
[17:38:20.350] <TB1> INFO: Test took 1162ms.
[17:38:20.658] <TB1> INFO: Expecting 2560 events.
[17:38:21.541] <TB1> INFO: 2560 events read in total (291ms).
[17:38:21.541] <TB1> INFO: Test took 1191ms.
[17:38:21.849] <TB1> INFO: Expecting 2560 events.
[17:38:22.734] <TB1> INFO: 2560 events read in total (293ms).
[17:38:22.735] <TB1> INFO: Test took 1194ms.
[17:38:23.042] <TB1> INFO: Expecting 2560 events.
[17:38:23.928] <TB1> INFO: 2560 events read in total (294ms).
[17:38:23.928] <TB1> INFO: Test took 1193ms.
[17:38:24.236] <TB1> INFO: Expecting 2560 events.
[17:38:25.116] <TB1> INFO: 2560 events read in total (288ms).
[17:38:25.116] <TB1> INFO: Test took 1186ms.
[17:38:25.424] <TB1> INFO: Expecting 2560 events.
[17:38:26.302] <TB1> INFO: 2560 events read in total (286ms).
[17:38:26.302] <TB1> INFO: Test took 1185ms.
[17:38:26.610] <TB1> INFO: Expecting 2560 events.
[17:38:27.490] <TB1> INFO: 2560 events read in total (288ms).
[17:38:27.490] <TB1> INFO: Test took 1187ms.
[17:38:27.798] <TB1> INFO: Expecting 2560 events.
[17:38:28.680] <TB1> INFO: 2560 events read in total (290ms).
[17:38:28.680] <TB1> INFO: Test took 1189ms.
[17:38:28.988] <TB1> INFO: Expecting 2560 events.
[17:38:29.865] <TB1> INFO: 2560 events read in total (286ms).
[17:38:29.865] <TB1> INFO: Test took 1185ms.
[17:38:30.173] <TB1> INFO: Expecting 2560 events.
[17:38:31.051] <TB1> INFO: 2560 events read in total (287ms).
[17:38:31.051] <TB1> INFO: Test took 1186ms.
[17:38:31.359] <TB1> INFO: Expecting 2560 events.
[17:38:32.237] <TB1> INFO: 2560 events read in total (287ms).
[17:38:32.237] <TB1> INFO: Test took 1184ms.
[17:38:32.545] <TB1> INFO: Expecting 2560 events.
[17:38:33.423] <TB1> INFO: 2560 events read in total (287ms).
[17:38:33.423] <TB1> INFO: Test took 1186ms.
[17:38:33.731] <TB1> INFO: Expecting 2560 events.
[17:38:34.614] <TB1> INFO: 2560 events read in total (291ms).
[17:38:34.614] <TB1> INFO: Test took 1190ms.
[17:38:34.921] <TB1> INFO: Expecting 2560 events.
[17:38:35.805] <TB1> INFO: 2560 events read in total (292ms).
[17:38:35.805] <TB1> INFO: Test took 1191ms.
[17:38:36.113] <TB1> INFO: Expecting 2560 events.
[17:38:36.997] <TB1> INFO: 2560 events read in total (292ms).
[17:38:36.997] <TB1> INFO: Test took 1191ms.
[17:38:37.305] <TB1> INFO: Expecting 2560 events.
[17:38:38.191] <TB1> INFO: 2560 events read in total (294ms).
[17:38:38.191] <TB1> INFO: Test took 1194ms.
[17:38:38.194] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:38:38.500] <TB1> INFO: Expecting 655360 events.
[17:38:53.076] <TB1> INFO: 655360 events read in total (13985ms).
[17:38:53.087] <TB1> INFO: Expecting 655360 events.
[17:39:07.119] <TB1> INFO: 655360 events read in total (13629ms).
[17:39:07.134] <TB1> INFO: Expecting 655360 events.
[17:39:21.112] <TB1> INFO: 655360 events read in total (13575ms).
[17:39:21.131] <TB1> INFO: Expecting 655360 events.
[17:39:35.287] <TB1> INFO: 655360 events read in total (13753ms).
[17:39:35.310] <TB1> INFO: Expecting 655360 events.
[17:39:49.282] <TB1> INFO: 655360 events read in total (13569ms).
[17:39:49.308] <TB1> INFO: Expecting 655360 events.
[17:40:03.295] <TB1> INFO: 655360 events read in total (13584ms).
[17:40:03.326] <TB1> INFO: Expecting 655360 events.
[17:40:17.378] <TB1> INFO: 655360 events read in total (13649ms).
[17:40:17.414] <TB1> INFO: Expecting 655360 events.
[17:40:31.334] <TB1> INFO: 655360 events read in total (13517ms).
[17:40:31.376] <TB1> INFO: Expecting 655360 events.
[17:40:45.416] <TB1> INFO: 655360 events read in total (13637ms).
[17:40:45.465] <TB1> INFO: Expecting 655360 events.
[17:40:59.434] <TB1> INFO: 655360 events read in total (13566ms).
[17:40:59.484] <TB1> INFO: Expecting 655360 events.
[17:41:13.443] <TB1> INFO: 655360 events read in total (13556ms).
[17:41:13.500] <TB1> INFO: Expecting 655360 events.
[17:41:27.582] <TB1> INFO: 655360 events read in total (13679ms).
[17:41:27.643] <TB1> INFO: Expecting 655360 events.
[17:41:41.624] <TB1> INFO: 655360 events read in total (13578ms).
[17:41:41.685] <TB1> INFO: Expecting 655360 events.
[17:41:55.795] <TB1> INFO: 655360 events read in total (13707ms).
[17:41:55.886] <TB1> INFO: Expecting 655360 events.
[17:42:09.896] <TB1> INFO: 655360 events read in total (13607ms).
[17:42:09.972] <TB1> INFO: Expecting 655360 events.
[17:42:23.973] <TB1> INFO: 655360 events read in total (13598ms).
[17:42:24.050] <TB1> INFO: Test took 225856ms.
[17:42:24.141] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:42:24.406] <TB1> INFO: Expecting 655360 events.
[17:42:38.639] <TB1> INFO: 655360 events read in total (13641ms).
[17:42:38.650] <TB1> INFO: Expecting 655360 events.
[17:42:52.447] <TB1> INFO: 655360 events read in total (13394ms).
[17:42:52.468] <TB1> INFO: Expecting 655360 events.
[17:43:06.374] <TB1> INFO: 655360 events read in total (13503ms).
[17:43:06.400] <TB1> INFO: Expecting 655360 events.
[17:43:20.317] <TB1> INFO: 655360 events read in total (13514ms).
[17:43:20.340] <TB1> INFO: Expecting 655360 events.
[17:43:34.224] <TB1> INFO: 655360 events read in total (13481ms).
[17:43:34.260] <TB1> INFO: Expecting 655360 events.
[17:43:48.186] <TB1> INFO: 655360 events read in total (13523ms).
[17:43:48.217] <TB1> INFO: Expecting 655360 events.
[17:44:02.038] <TB1> INFO: 655360 events read in total (13418ms).
[17:44:02.073] <TB1> INFO: Expecting 655360 events.
[17:44:15.943] <TB1> INFO: 655360 events read in total (13467ms).
[17:44:15.985] <TB1> INFO: Expecting 655360 events.
[17:44:29.847] <TB1> INFO: 655360 events read in total (13459ms).
[17:44:29.907] <TB1> INFO: Expecting 655360 events.
[17:44:43.645] <TB1> INFO: 655360 events read in total (13335ms).
[17:44:43.708] <TB1> INFO: Expecting 655360 events.
[17:44:57.736] <TB1> INFO: 655360 events read in total (13625ms).
[17:44:57.807] <TB1> INFO: Expecting 655360 events.
[17:45:11.801] <TB1> INFO: 655360 events read in total (13591ms).
[17:45:11.858] <TB1> INFO: Expecting 655360 events.
[17:45:25.898] <TB1> INFO: 655360 events read in total (13637ms).
[17:45:25.964] <TB1> INFO: Expecting 655360 events.
[17:45:39.900] <TB1> INFO: 655360 events read in total (13533ms).
[17:45:39.986] <TB1> INFO: Expecting 655360 events.
[17:45:53.809] <TB1> INFO: 655360 events read in total (13420ms).
[17:45:53.880] <TB1> INFO: Expecting 655360 events.
[17:46:07.813] <TB1> INFO: 655360 events read in total (13530ms).
[17:46:07.888] <TB1> INFO: Test took 223747ms.
[17:46:08.125] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.131] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.137] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.144] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.150] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.156] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:08.162] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:46:08.168] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.174] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.180] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.186] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.192] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.198] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.205] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:08.211] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:46:08.217] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[17:46:08.223] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[17:46:08.229] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[17:46:08.235] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[17:46:08.241] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[17:46:08.247] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[17:46:08.253] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[17:46:08.259] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.266] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.272] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.278] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:08.284] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:46:08.290] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[17:46:08.296] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[17:46:08.302] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[17:46:08.308] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.315] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:08.319] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:08.353] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C0.dat
[17:46:08.353] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C1.dat
[17:46:08.353] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C2.dat
[17:46:08.353] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C3.dat
[17:46:08.353] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C4.dat
[17:46:08.353] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C5.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C6.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C7.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C8.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C9.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C10.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C11.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C12.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C13.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C14.dat
[17:46:08.354] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C15.dat
[17:46:08.590] <TB1> INFO: Expecting 41600 events.
[17:46:11.676] <TB1> INFO: 41600 events read in total (2495ms).
[17:46:11.676] <TB1> INFO: Test took 3319ms.
[17:46:12.122] <TB1> INFO: Expecting 41600 events.
[17:46:15.159] <TB1> INFO: 41600 events read in total (2445ms).
[17:46:15.160] <TB1> INFO: Test took 3272ms.
[17:46:15.602] <TB1> INFO: Expecting 41600 events.
[17:46:18.696] <TB1> INFO: 41600 events read in total (2503ms).
[17:46:18.697] <TB1> INFO: Test took 3327ms.
[17:46:18.915] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:19.004] <TB1> INFO: Expecting 2560 events.
[17:46:19.885] <TB1> INFO: 2560 events read in total (290ms).
[17:46:19.885] <TB1> INFO: Test took 970ms.
[17:46:19.887] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:20.194] <TB1> INFO: Expecting 2560 events.
[17:46:21.079] <TB1> INFO: 2560 events read in total (293ms).
[17:46:21.079] <TB1> INFO: Test took 1192ms.
[17:46:21.082] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:21.387] <TB1> INFO: Expecting 2560 events.
[17:46:22.274] <TB1> INFO: 2560 events read in total (295ms).
[17:46:22.274] <TB1> INFO: Test took 1192ms.
[17:46:22.276] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:22.582] <TB1> INFO: Expecting 2560 events.
[17:46:23.468] <TB1> INFO: 2560 events read in total (294ms).
[17:46:23.468] <TB1> INFO: Test took 1192ms.
[17:46:23.470] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:23.777] <TB1> INFO: Expecting 2560 events.
[17:46:24.661] <TB1> INFO: 2560 events read in total (293ms).
[17:46:24.661] <TB1> INFO: Test took 1191ms.
[17:46:24.663] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:24.969] <TB1> INFO: Expecting 2560 events.
[17:46:25.854] <TB1> INFO: 2560 events read in total (293ms).
[17:46:25.854] <TB1> INFO: Test took 1191ms.
[17:46:25.856] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:26.162] <TB1> INFO: Expecting 2560 events.
[17:46:27.045] <TB1> INFO: 2560 events read in total (292ms).
[17:46:27.046] <TB1> INFO: Test took 1190ms.
[17:46:27.047] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:27.354] <TB1> INFO: Expecting 2560 events.
[17:46:28.237] <TB1> INFO: 2560 events read in total (291ms).
[17:46:28.238] <TB1> INFO: Test took 1191ms.
[17:46:28.239] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:28.546] <TB1> INFO: Expecting 2560 events.
[17:46:29.426] <TB1> INFO: 2560 events read in total (289ms).
[17:46:29.427] <TB1> INFO: Test took 1188ms.
[17:46:29.428] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:29.735] <TB1> INFO: Expecting 2560 events.
[17:46:30.614] <TB1> INFO: 2560 events read in total (288ms).
[17:46:30.614] <TB1> INFO: Test took 1186ms.
[17:46:30.616] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:30.923] <TB1> INFO: Expecting 2560 events.
[17:46:31.804] <TB1> INFO: 2560 events read in total (290ms).
[17:46:31.804] <TB1> INFO: Test took 1188ms.
[17:46:31.806] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:32.113] <TB1> INFO: Expecting 2560 events.
[17:46:32.991] <TB1> INFO: 2560 events read in total (287ms).
[17:46:32.992] <TB1> INFO: Test took 1186ms.
[17:46:32.993] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:33.300] <TB1> INFO: Expecting 2560 events.
[17:46:34.179] <TB1> INFO: 2560 events read in total (288ms).
[17:46:34.179] <TB1> INFO: Test took 1186ms.
[17:46:34.181] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:34.487] <TB1> INFO: Expecting 2560 events.
[17:46:35.366] <TB1> INFO: 2560 events read in total (287ms).
[17:46:35.366] <TB1> INFO: Test took 1185ms.
[17:46:35.368] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:35.675] <TB1> INFO: Expecting 2560 events.
[17:46:36.552] <TB1> INFO: 2560 events read in total (286ms).
[17:46:36.553] <TB1> INFO: Test took 1186ms.
[17:46:36.554] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:36.861] <TB1> INFO: Expecting 2560 events.
[17:46:37.741] <TB1> INFO: 2560 events read in total (288ms).
[17:46:37.741] <TB1> INFO: Test took 1187ms.
[17:46:37.743] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:38.050] <TB1> INFO: Expecting 2560 events.
[17:46:38.928] <TB1> INFO: 2560 events read in total (286ms).
[17:46:38.928] <TB1> INFO: Test took 1185ms.
[17:46:38.930] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:39.236] <TB1> INFO: Expecting 2560 events.
[17:46:40.115] <TB1> INFO: 2560 events read in total (287ms).
[17:46:40.116] <TB1> INFO: Test took 1186ms.
[17:46:40.118] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:40.424] <TB1> INFO: Expecting 2560 events.
[17:46:41.302] <TB1> INFO: 2560 events read in total (287ms).
[17:46:41.302] <TB1> INFO: Test took 1184ms.
[17:46:41.304] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:41.611] <TB1> INFO: Expecting 2560 events.
[17:46:42.492] <TB1> INFO: 2560 events read in total (290ms).
[17:46:42.492] <TB1> INFO: Test took 1188ms.
[17:46:42.494] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:42.801] <TB1> INFO: Expecting 2560 events.
[17:46:43.680] <TB1> INFO: 2560 events read in total (288ms).
[17:46:43.680] <TB1> INFO: Test took 1186ms.
[17:46:43.682] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:43.988] <TB1> INFO: Expecting 2560 events.
[17:46:44.866] <TB1> INFO: 2560 events read in total (286ms).
[17:46:44.866] <TB1> INFO: Test took 1184ms.
[17:46:44.868] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:45.175] <TB1> INFO: Expecting 2560 events.
[17:46:46.057] <TB1> INFO: 2560 events read in total (291ms).
[17:46:46.057] <TB1> INFO: Test took 1189ms.
[17:46:46.059] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:46.365] <TB1> INFO: Expecting 2560 events.
[17:46:47.243] <TB1> INFO: 2560 events read in total (287ms).
[17:46:47.243] <TB1> INFO: Test took 1184ms.
[17:46:47.245] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:47.552] <TB1> INFO: Expecting 2560 events.
[17:46:48.434] <TB1> INFO: 2560 events read in total (291ms).
[17:46:48.435] <TB1> INFO: Test took 1190ms.
[17:46:48.436] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:48.743] <TB1> INFO: Expecting 2560 events.
[17:46:49.626] <TB1> INFO: 2560 events read in total (291ms).
[17:46:49.626] <TB1> INFO: Test took 1190ms.
[17:46:49.628] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:49.934] <TB1> INFO: Expecting 2560 events.
[17:46:50.817] <TB1> INFO: 2560 events read in total (292ms).
[17:46:50.817] <TB1> INFO: Test took 1189ms.
[17:46:50.819] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:51.126] <TB1> INFO: Expecting 2560 events.
[17:46:52.008] <TB1> INFO: 2560 events read in total (291ms).
[17:46:52.008] <TB1> INFO: Test took 1189ms.
[17:46:52.010] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:52.316] <TB1> INFO: Expecting 2560 events.
[17:46:53.198] <TB1> INFO: 2560 events read in total (290ms).
[17:46:53.198] <TB1> INFO: Test took 1188ms.
[17:46:53.200] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:53.507] <TB1> INFO: Expecting 2560 events.
[17:46:54.390] <TB1> INFO: 2560 events read in total (291ms).
[17:46:54.390] <TB1> INFO: Test took 1190ms.
[17:46:54.392] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:54.699] <TB1> INFO: Expecting 2560 events.
[17:46:55.581] <TB1> INFO: 2560 events read in total (290ms).
[17:46:55.581] <TB1> INFO: Test took 1189ms.
[17:46:55.583] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:55.890] <TB1> INFO: Expecting 2560 events.
[17:46:56.772] <TB1> INFO: 2560 events read in total (291ms).
[17:46:56.773] <TB1> INFO: Test took 1190ms.
[17:46:57.234] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 625 seconds
[17:46:57.234] <TB1> INFO: PH scale (per ROC): 63 66 49 58 54 56 59 43 49 60 48 64 46 48 51 60
[17:46:57.234] <TB1> INFO: PH offset (per ROC): 130 130 98 132 95 133 132 96 100 122 108 124 105 100 108 122
[17:46:57.239] <TB1> INFO: Decoding statistics:
[17:46:57.239] <TB1> INFO: General information:
[17:46:57.239] <TB1> INFO: 16bit words read: 127894
[17:46:57.239] <TB1> INFO: valid events total: 20480
[17:46:57.239] <TB1> INFO: empty events: 17973
[17:46:57.239] <TB1> INFO: valid events with pixels: 2507
[17:46:57.239] <TB1> INFO: valid pixel hits: 2507
[17:46:57.239] <TB1> INFO: Event errors: 0
[17:46:57.239] <TB1> INFO: start marker: 0
[17:46:57.239] <TB1> INFO: stop marker: 0
[17:46:57.239] <TB1> INFO: overflow: 0
[17:46:57.239] <TB1> INFO: invalid 5bit words: 0
[17:46:57.239] <TB1> INFO: invalid XOR eye diagram: 0
[17:46:57.239] <TB1> INFO: frame (failed synchr.): 0
[17:46:57.239] <TB1> INFO: idle data (no TBM trl): 0
[17:46:57.239] <TB1> INFO: no data (only TBM hdr): 0
[17:46:57.239] <TB1> INFO: TBM errors: 0
[17:46:57.240] <TB1> INFO: flawed TBM headers: 0
[17:46:57.240] <TB1> INFO: flawed TBM trailers: 0
[17:46:57.240] <TB1> INFO: event ID mismatches: 0
[17:46:57.240] <TB1> INFO: ROC errors: 0
[17:46:57.240] <TB1> INFO: missing ROC header(s): 0
[17:46:57.240] <TB1> INFO: misplaced readback start: 0
[17:46:57.240] <TB1> INFO: Pixel decoding errors: 0
[17:46:57.240] <TB1> INFO: pixel data incomplete: 0
[17:46:57.240] <TB1> INFO: pixel address: 0
[17:46:57.240] <TB1> INFO: pulse height fill bit: 0
[17:46:57.240] <TB1> INFO: buffer corruption: 0
[17:46:57.525] <TB1> INFO: ######################################################################
[17:46:57.525] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:46:57.525] <TB1> INFO: ######################################################################
[17:46:57.537] <TB1> INFO: scanning low vcal = 10
[17:46:57.771] <TB1> INFO: Expecting 41600 events.
[17:47:01.330] <TB1> INFO: 41600 events read in total (2967ms).
[17:47:01.330] <TB1> INFO: Test took 3793ms.
[17:47:01.331] <TB1> INFO: scanning low vcal = 20
[17:47:01.631] <TB1> INFO: Expecting 41600 events.
[17:47:05.209] <TB1> INFO: 41600 events read in total (2986ms).
[17:47:05.209] <TB1> INFO: Test took 3878ms.
[17:47:05.211] <TB1> INFO: scanning low vcal = 30
[17:47:05.508] <TB1> INFO: Expecting 41600 events.
[17:47:09.167] <TB1> INFO: 41600 events read in total (3067ms).
[17:47:09.168] <TB1> INFO: Test took 3957ms.
[17:47:09.170] <TB1> INFO: scanning low vcal = 40
[17:47:09.447] <TB1> INFO: Expecting 41600 events.
[17:47:13.406] <TB1> INFO: 41600 events read in total (3368ms).
[17:47:13.407] <TB1> INFO: Test took 4238ms.
[17:47:13.410] <TB1> INFO: scanning low vcal = 50
[17:47:13.687] <TB1> INFO: Expecting 41600 events.
[17:47:17.632] <TB1> INFO: 41600 events read in total (3353ms).
[17:47:17.633] <TB1> INFO: Test took 4222ms.
[17:47:17.635] <TB1> INFO: scanning low vcal = 60
[17:47:17.912] <TB1> INFO: Expecting 41600 events.
[17:47:21.859] <TB1> INFO: 41600 events read in total (3356ms).
[17:47:21.860] <TB1> INFO: Test took 4225ms.
[17:47:21.862] <TB1> INFO: scanning low vcal = 70
[17:47:22.139] <TB1> INFO: Expecting 41600 events.
[17:47:26.095] <TB1> INFO: 41600 events read in total (3365ms).
[17:47:26.096] <TB1> INFO: Test took 4234ms.
[17:47:26.098] <TB1> INFO: scanning low vcal = 80
[17:47:26.375] <TB1> INFO: Expecting 41600 events.
[17:47:30.308] <TB1> INFO: 41600 events read in total (3341ms).
[17:47:30.309] <TB1> INFO: Test took 4211ms.
[17:47:30.311] <TB1> INFO: scanning low vcal = 90
[17:47:30.588] <TB1> INFO: Expecting 41600 events.
[17:47:34.516] <TB1> INFO: 41600 events read in total (3337ms).
[17:47:34.516] <TB1> INFO: Test took 4205ms.
[17:47:34.519] <TB1> INFO: scanning low vcal = 100
[17:47:34.796] <TB1> INFO: Expecting 41600 events.
[17:47:38.730] <TB1> INFO: 41600 events read in total (3343ms).
[17:47:38.730] <TB1> INFO: Test took 4211ms.
[17:47:38.733] <TB1> INFO: scanning low vcal = 110
[17:47:39.010] <TB1> INFO: Expecting 41600 events.
[17:47:42.973] <TB1> INFO: 41600 events read in total (3372ms).
[17:47:42.973] <TB1> INFO: Test took 4240ms.
[17:47:42.976] <TB1> INFO: scanning low vcal = 120
[17:47:43.253] <TB1> INFO: Expecting 41600 events.
[17:47:47.184] <TB1> INFO: 41600 events read in total (3339ms).
[17:47:47.185] <TB1> INFO: Test took 4209ms.
[17:47:47.188] <TB1> INFO: scanning low vcal = 130
[17:47:47.464] <TB1> INFO: Expecting 41600 events.
[17:47:51.435] <TB1> INFO: 41600 events read in total (3379ms).
[17:47:51.436] <TB1> INFO: Test took 4248ms.
[17:47:51.438] <TB1> INFO: scanning low vcal = 140
[17:47:51.715] <TB1> INFO: Expecting 41600 events.
[17:47:55.665] <TB1> INFO: 41600 events read in total (3358ms).
[17:47:55.666] <TB1> INFO: Test took 4227ms.
[17:47:55.668] <TB1> INFO: scanning low vcal = 150
[17:47:55.945] <TB1> INFO: Expecting 41600 events.
[17:47:59.966] <TB1> INFO: 41600 events read in total (3429ms).
[17:47:59.967] <TB1> INFO: Test took 4298ms.
[17:47:59.969] <TB1> INFO: scanning low vcal = 160
[17:48:00.263] <TB1> INFO: Expecting 41600 events.
[17:48:04.217] <TB1> INFO: 41600 events read in total (3363ms).
[17:48:04.218] <TB1> INFO: Test took 4248ms.
[17:48:04.220] <TB1> INFO: scanning low vcal = 170
[17:48:04.497] <TB1> INFO: Expecting 41600 events.
[17:48:08.493] <TB1> INFO: 41600 events read in total (3404ms).
[17:48:08.494] <TB1> INFO: Test took 4274ms.
[17:48:08.497] <TB1> INFO: scanning low vcal = 180
[17:48:08.773] <TB1> INFO: Expecting 41600 events.
[17:48:12.763] <TB1> INFO: 41600 events read in total (3398ms).
[17:48:12.764] <TB1> INFO: Test took 4267ms.
[17:48:12.767] <TB1> INFO: scanning low vcal = 190
[17:48:13.043] <TB1> INFO: Expecting 41600 events.
[17:48:17.053] <TB1> INFO: 41600 events read in total (3418ms).
[17:48:17.054] <TB1> INFO: Test took 4287ms.
[17:48:17.056] <TB1> INFO: scanning low vcal = 200
[17:48:17.333] <TB1> INFO: Expecting 41600 events.
[17:48:21.372] <TB1> INFO: 41600 events read in total (3447ms).
[17:48:21.373] <TB1> INFO: Test took 4317ms.
[17:48:21.376] <TB1> INFO: scanning low vcal = 210
[17:48:21.653] <TB1> INFO: Expecting 41600 events.
[17:48:25.649] <TB1> INFO: 41600 events read in total (3405ms).
[17:48:25.650] <TB1> INFO: Test took 4274ms.
[17:48:25.653] <TB1> INFO: scanning low vcal = 220
[17:48:25.950] <TB1> INFO: Expecting 41600 events.
[17:48:29.993] <TB1> INFO: 41600 events read in total (3451ms).
[17:48:29.994] <TB1> INFO: Test took 4341ms.
[17:48:29.997] <TB1> INFO: scanning low vcal = 230
[17:48:30.274] <TB1> INFO: Expecting 41600 events.
[17:48:34.250] <TB1> INFO: 41600 events read in total (3385ms).
[17:48:34.251] <TB1> INFO: Test took 4254ms.
[17:48:34.254] <TB1> INFO: scanning low vcal = 240
[17:48:34.530] <TB1> INFO: Expecting 41600 events.
[17:48:38.487] <TB1> INFO: 41600 events read in total (3365ms).
[17:48:38.487] <TB1> INFO: Test took 4233ms.
[17:48:38.490] <TB1> INFO: scanning low vcal = 250
[17:48:38.781] <TB1> INFO: Expecting 41600 events.
[17:48:42.754] <TB1> INFO: 41600 events read in total (3381ms).
[17:48:42.755] <TB1> INFO: Test took 4265ms.
[17:48:42.759] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[17:48:43.035] <TB1> INFO: Expecting 41600 events.
[17:48:46.995] <TB1> INFO: 41600 events read in total (3369ms).
[17:48:46.996] <TB1> INFO: Test took 4237ms.
[17:48:46.998] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[17:48:47.275] <TB1> INFO: Expecting 41600 events.
[17:48:51.229] <TB1> INFO: 41600 events read in total (3362ms).
[17:48:51.230] <TB1> INFO: Test took 4232ms.
[17:48:51.232] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[17:48:51.522] <TB1> INFO: Expecting 41600 events.
[17:48:55.515] <TB1> INFO: 41600 events read in total (3401ms).
[17:48:55.516] <TB1> INFO: Test took 4284ms.
[17:48:55.519] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[17:48:55.795] <TB1> INFO: Expecting 41600 events.
[17:48:59.816] <TB1> INFO: 41600 events read in total (3429ms).
[17:48:59.817] <TB1> INFO: Test took 4298ms.
[17:48:59.820] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:49:00.111] <TB1> INFO: Expecting 41600 events.
[17:49:04.136] <TB1> INFO: 41600 events read in total (3434ms).
[17:49:04.137] <TB1> INFO: Test took 4317ms.
[17:49:04.608] <TB1> INFO: PixTestGainPedestal::measure() done
[17:49:39.763] <TB1> INFO: PixTestGainPedestal::fit() done
[17:49:39.763] <TB1> INFO: non-linearity mean: 0.976 0.980 0.934 0.978 0.971 0.974 0.976 0.918 0.911 0.979 0.946 0.981 0.919 0.938 0.921 0.978
[17:49:39.763] <TB1> INFO: non-linearity RMS: 0.005 0.004 0.080 0.004 0.011 0.006 0.005 0.117 0.134 0.003 0.054 0.003 0.116 0.071 0.085 0.003
[17:49:39.763] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:49:39.777] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:49:39.791] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:49:39.805] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:49:39.820] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:49:39.833] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:49:39.848] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:49:39.861] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:49:39.876] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:49:39.890] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:49:39.903] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:49:39.918] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:49:39.936] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:49:39.956] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:49:39.977] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:49:39.998] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1113_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:49:40.020] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[17:49:40.020] <TB1> INFO: Decoding statistics:
[17:49:40.020] <TB1> INFO: General information:
[17:49:40.020] <TB1> INFO: 16bit words read: 3326314
[17:49:40.020] <TB1> INFO: valid events total: 332800
[17:49:40.020] <TB1> INFO: empty events: 0
[17:49:40.020] <TB1> INFO: valid events with pixels: 332800
[17:49:40.020] <TB1> INFO: valid pixel hits: 664757
[17:49:40.020] <TB1> INFO: Event errors: 0
[17:49:40.020] <TB1> INFO: start marker: 0
[17:49:40.020] <TB1> INFO: stop marker: 0
[17:49:40.020] <TB1> INFO: overflow: 0
[17:49:40.020] <TB1> INFO: invalid 5bit words: 0
[17:49:40.020] <TB1> INFO: invalid XOR eye diagram: 0
[17:49:40.020] <TB1> INFO: frame (failed synchr.): 0
[17:49:40.020] <TB1> INFO: idle data (no TBM trl): 0
[17:49:40.020] <TB1> INFO: no data (only TBM hdr): 0
[17:49:40.020] <TB1> INFO: TBM errors: 0
[17:49:40.020] <TB1> INFO: flawed TBM headers: 0
[17:49:40.020] <TB1> INFO: flawed TBM trailers: 0
[17:49:40.020] <TB1> INFO: event ID mismatches: 0
[17:49:40.020] <TB1> INFO: ROC errors: 0
[17:49:40.020] <TB1> INFO: missing ROC header(s): 0
[17:49:40.020] <TB1> INFO: misplaced readback start: 0
[17:49:40.020] <TB1> INFO: Pixel decoding errors: 0
[17:49:40.020] <TB1> INFO: pixel data incomplete: 0
[17:49:40.020] <TB1> INFO: pixel address: 0
[17:49:40.020] <TB1> INFO: pulse height fill bit: 0
[17:49:40.020] <TB1> INFO: buffer corruption: 0
[17:49:40.041] <TB1> INFO: Decoding statistics:
[17:49:40.041] <TB1> INFO: General information:
[17:49:40.041] <TB1> INFO: 16bit words read: 3455744
[17:49:40.041] <TB1> INFO: valid events total: 353536
[17:49:40.041] <TB1> INFO: empty events: 18229
[17:49:40.041] <TB1> INFO: valid events with pixels: 335307
[17:49:40.041] <TB1> INFO: valid pixel hits: 667264
[17:49:40.041] <TB1> INFO: Event errors: 0
[17:49:40.041] <TB1> INFO: start marker: 0
[17:49:40.041] <TB1> INFO: stop marker: 0
[17:49:40.041] <TB1> INFO: overflow: 0
[17:49:40.041] <TB1> INFO: invalid 5bit words: 0
[17:49:40.041] <TB1> INFO: invalid XOR eye diagram: 0
[17:49:40.041] <TB1> INFO: frame (failed synchr.): 0
[17:49:40.041] <TB1> INFO: idle data (no TBM trl): 0
[17:49:40.041] <TB1> INFO: no data (only TBM hdr): 0
[17:49:40.041] <TB1> INFO: TBM errors: 0
[17:49:40.041] <TB1> INFO: flawed TBM headers: 0
[17:49:40.041] <TB1> INFO: flawed TBM trailers: 0
[17:49:40.042] <TB1> INFO: event ID mismatches: 0
[17:49:40.042] <TB1> INFO: ROC errors: 0
[17:49:40.042] <TB1> INFO: missing ROC header(s): 0
[17:49:40.042] <TB1> INFO: misplaced readback start: 0
[17:49:40.042] <TB1> INFO: Pixel decoding errors: 0
[17:49:40.042] <TB1> INFO: pixel data incomplete: 0
[17:49:40.042] <TB1> INFO: pixel address: 0
[17:49:40.042] <TB1> INFO: pulse height fill bit: 0
[17:49:40.042] <TB1> INFO: buffer corruption: 0
[17:49:40.042] <TB1> INFO: enter test to run
[17:49:40.042] <TB1> INFO: test: exit no parameter change
[17:49:40.096] <TB1> QUIET: Connection to board 153 closed.
[17:49:40.097] <TB1> INFO: pXar: this is the end, my friend