[16:44:17.206] <TB3> INFO: *** Welcome to pxar ***
[16:44:17.206] <TB3> INFO: *** Today: 2016/11/04
[16:44:17.212] <TB3> INFO: *** Version: c8ba-dirty
[16:44:17.212] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C15.dat
[16:44:17.213] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C1b.dat
[16:44:17.213] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//defaultMaskFile.dat
[16:44:17.213] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters_C15.dat
[16:44:17.268] <TB3> INFO: clk: 4
[16:44:17.268] <TB3> INFO: ctr: 4
[16:44:17.268] <TB3> INFO: sda: 19
[16:44:17.268] <TB3> INFO: tin: 9
[16:44:17.268] <TB3> INFO: level: 15
[16:44:17.268] <TB3> INFO: triggerdelay: 0
[16:44:17.268] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[16:44:17.268] <TB3> INFO: Log level: INFO
[16:44:17.277] <TB3> INFO: Found DTB DTB_WZ4I6J
[16:44:17.286] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[16:44:17.288] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[16:44:17.289] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[16:44:18.774] <TB3> INFO: DUT info:
[16:44:18.774] <TB3> INFO: The DUT currently contains the following objects:
[16:44:18.774] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[16:44:18.774] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:44:18.774] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:44:18.774] <TB3> INFO: TBM Core alpha (2): 7 registers set
[16:44:18.774] <TB3> INFO: TBM Core beta (3): 7 registers set
[16:44:18.774] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:44:18.774] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:18.774] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:44:19.175] <TB3> INFO: enter 'restricted' command line mode
[16:44:19.175] <TB3> INFO: enter test to run
[16:44:19.175] <TB3> INFO: test: pretest no parameter change
[16:44:19.175] <TB3> INFO: running: pretest
[16:44:19.776] <TB3> INFO: ######################################################################
[16:44:19.776] <TB3> INFO: PixTestPretest::doTest()
[16:44:19.776] <TB3> INFO: ######################################################################
[16:44:19.777] <TB3> INFO: ----------------------------------------------------------------------
[16:44:19.777] <TB3> INFO: PixTestPretest::programROC()
[16:44:19.777] <TB3> INFO: ----------------------------------------------------------------------
[16:44:37.791] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:44:37.791] <TB3> INFO: IA differences per ROC: 17.7 17.7 18.5 18.5 19.3 17.7 18.5 14.5 20.1 20.9 18.5 18.5 19.3 18.5 18.5 17.7
[16:44:37.826] <TB3> INFO: ----------------------------------------------------------------------
[16:44:37.826] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:44:37.826] <TB3> INFO: ----------------------------------------------------------------------
[16:44:59.072] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[16:44:59.072] <TB3> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.9 19.3 20.1 20.9 19.3 20.1 20.1 18.5 19.3 20.9 18.5 20.9 20.1 20.1
[16:44:59.100] <TB3> INFO: ----------------------------------------------------------------------
[16:44:59.100] <TB3> INFO: PixTestPretest::findTiming()
[16:44:59.100] <TB3> INFO: ----------------------------------------------------------------------
[16:44:59.100] <TB3> INFO: PixTestCmd::init()

[16:45:30.440] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:45:30.440] <TB3> INFO: (success/tries = 100/100), width = 3
[16:45:31.948] <TB3> INFO: ----------------------------------------------------------------------
[16:45:31.948] <TB3> INFO: PixTestPretest::findWorkingPixel()
[16:45:31.948] <TB3> INFO: ----------------------------------------------------------------------
[16:45:32.039] <TB3> INFO: Expecting 231680 events.
[16:45:41.570] <TB3> INFO: 231680 events read in total (8939ms).
[16:45:41.577] <TB3> INFO: Test took 9627ms.
[16:45:41.822] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:45:41.851] <TB3> INFO: ----------------------------------------------------------------------
[16:45:41.851] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[16:45:41.851] <TB3> INFO: ----------------------------------------------------------------------
[16:45:41.943] <TB3> INFO: Expecting 231680 events.
[16:45:51.617] <TB3> INFO: 231680 events read in total (9082ms).
[16:45:51.624] <TB3> INFO: Test took 9770ms.
[16:45:51.881] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[16:45:51.881] <TB3> INFO: CalDel: 95 108 95 108 110 82 134 95 112 98 102 103 98 91 91 98
[16:45:51.881] <TB3> INFO: VthrComp: 51 51 52 53 51 51 51 51 51 51 51 51 51 51 51 51
[16:45:51.883] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C0.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C1.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C2.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C3.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C4.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C5.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C6.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C7.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C8.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C9.dat
[16:45:51.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C10.dat
[16:45:51.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C11.dat
[16:45:51.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C12.dat
[16:45:51.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C13.dat
[16:45:51.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C14.dat
[16:45:51.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C15.dat
[16:45:51.885] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C0a.dat
[16:45:51.885] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C0b.dat
[16:45:51.885] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C1a.dat
[16:45:51.885] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C1b.dat
[16:45:51.885] <TB3> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[16:45:51.980] <TB3> INFO: enter test to run
[16:45:51.980] <TB3> INFO: test: FullTest no parameter change
[16:45:51.980] <TB3> INFO: running: fulltest
[16:45:51.980] <TB3> INFO: ######################################################################
[16:45:51.980] <TB3> INFO: PixTestFullTest::doTest()
[16:45:51.980] <TB3> INFO: ######################################################################
[16:45:51.981] <TB3> INFO: ######################################################################
[16:45:51.981] <TB3> INFO: PixTestAlive::doTest()
[16:45:51.981] <TB3> INFO: ######################################################################
[16:45:51.982] <TB3> INFO: ----------------------------------------------------------------------
[16:45:51.982] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:45:51.982] <TB3> INFO: ----------------------------------------------------------------------
[16:45:52.215] <TB3> INFO: Expecting 41600 events.
[16:45:55.759] <TB3> INFO: 41600 events read in total (2952ms).
[16:45:55.759] <TB3> INFO: Test took 3775ms.
[16:45:55.986] <TB3> INFO: PixTestAlive::aliveTest() done
[16:45:55.986] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0
[16:45:55.987] <TB3> INFO: ----------------------------------------------------------------------
[16:45:55.987] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:45:55.987] <TB3> INFO: ----------------------------------------------------------------------
[16:45:56.219] <TB3> INFO: Expecting 41600 events.
[16:45:59.141] <TB3> INFO: 41600 events read in total (2330ms).
[16:45:59.141] <TB3> INFO: Test took 3153ms.
[16:45:59.142] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:45:59.382] <TB3> INFO: PixTestAlive::maskTest() done
[16:45:59.382] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:45:59.383] <TB3> INFO: ----------------------------------------------------------------------
[16:45:59.383] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:45:59.383] <TB3> INFO: ----------------------------------------------------------------------
[16:45:59.662] <TB3> INFO: Expecting 41600 events.
[16:46:03.133] <TB3> INFO: 41600 events read in total (2880ms).
[16:46:03.133] <TB3> INFO: Test took 3748ms.
[16:46:03.368] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[16:46:03.368] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:46:03.368] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:46:03.368] <TB3> INFO: Decoding statistics:
[16:46:03.368] <TB3> INFO: General information:
[16:46:03.368] <TB3> INFO: 16bit words read: 0
[16:46:03.368] <TB3> INFO: valid events total: 0
[16:46:03.368] <TB3> INFO: empty events: 0
[16:46:03.368] <TB3> INFO: valid events with pixels: 0
[16:46:03.368] <TB3> INFO: valid pixel hits: 0
[16:46:03.368] <TB3> INFO: Event errors: 0
[16:46:03.368] <TB3> INFO: start marker: 0
[16:46:03.368] <TB3> INFO: stop marker: 0
[16:46:03.368] <TB3> INFO: overflow: 0
[16:46:03.368] <TB3> INFO: invalid 5bit words: 0
[16:46:03.368] <TB3> INFO: invalid XOR eye diagram: 0
[16:46:03.368] <TB3> INFO: frame (failed synchr.): 0
[16:46:03.368] <TB3> INFO: idle data (no TBM trl): 0
[16:46:03.368] <TB3> INFO: no data (only TBM hdr): 0
[16:46:03.368] <TB3> INFO: TBM errors: 0
[16:46:03.368] <TB3> INFO: flawed TBM headers: 0
[16:46:03.368] <TB3> INFO: flawed TBM trailers: 0
[16:46:03.368] <TB3> INFO: event ID mismatches: 0
[16:46:03.368] <TB3> INFO: ROC errors: 0
[16:46:03.368] <TB3> INFO: missing ROC header(s): 0
[16:46:03.368] <TB3> INFO: misplaced readback start: 0
[16:46:03.368] <TB3> INFO: Pixel decoding errors: 0
[16:46:03.368] <TB3> INFO: pixel data incomplete: 0
[16:46:03.368] <TB3> INFO: pixel address: 0
[16:46:03.368] <TB3> INFO: pulse height fill bit: 0
[16:46:03.368] <TB3> INFO: buffer corruption: 0
[16:46:03.375] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:46:03.375] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:46:03.375] <TB3> INFO: ######################################################################
[16:46:03.375] <TB3> INFO: PixTestReadback::doTest()
[16:46:03.375] <TB3> INFO: ######################################################################
[16:46:03.375] <TB3> INFO: ----------------------------------------------------------------------
[16:46:03.375] <TB3> INFO: PixTestReadback::CalibrateVd()
[16:46:03.375] <TB3> INFO: ----------------------------------------------------------------------
[16:46:13.350] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat
[16:46:13.350] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C1.dat
[16:46:13.350] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C2.dat
[16:46:13.350] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C3.dat
[16:46:13.350] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C4.dat
[16:46:13.350] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C5.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C6.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C7.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C8.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C9.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C10.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C11.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C12.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C13.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C14.dat
[16:46:13.351] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:46:13.379] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:46:13.379] <TB3> INFO: ----------------------------------------------------------------------
[16:46:13.379] <TB3> INFO: PixTestReadback::CalibrateVa()
[16:46:13.379] <TB3> INFO: ----------------------------------------------------------------------
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C1.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C2.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C3.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C4.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C5.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C6.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C7.dat
[16:46:23.268] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C8.dat
[16:46:23.269] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C9.dat
[16:46:23.269] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C10.dat
[16:46:23.269] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C11.dat
[16:46:23.269] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C12.dat
[16:46:23.269] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C13.dat
[16:46:23.269] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C14.dat
[16:46:23.269] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:46:23.297] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:46:23.297] <TB3> INFO: ----------------------------------------------------------------------
[16:46:23.297] <TB3> INFO: PixTestReadback::readbackVbg()
[16:46:23.297] <TB3> INFO: ----------------------------------------------------------------------
[16:46:30.938] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:46:30.938] <TB3> INFO: ----------------------------------------------------------------------
[16:46:30.938] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[16:46:30.938] <TB3> INFO: ----------------------------------------------------------------------
[16:46:30.938] <TB3> INFO: Vbg will be calibrated using Vd calibration
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.9calibrated Vbg = 1.16363 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 146.2calibrated Vbg = 1.16089 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.2calibrated Vbg = 1.15526 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155.8calibrated Vbg = 1.15647 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153.7calibrated Vbg = 1.16016 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153.9calibrated Vbg = 1.15655 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 157.4calibrated Vbg = 1.16584 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 150calibrated Vbg = 1.16283 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149.2calibrated Vbg = 1.15477 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.1calibrated Vbg = 1.15946 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.3calibrated Vbg = 1.14728 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.3calibrated Vbg = 1.15439 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 157.5calibrated Vbg = 1.15654 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159.3calibrated Vbg = 1.16225 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155calibrated Vbg = 1.15555 :::*/*/*/*/
[16:46:30.938] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150.6calibrated Vbg = 1.15474 :::*/*/*/*/
[16:46:30.940] <TB3> INFO: ----------------------------------------------------------------------
[16:46:30.940] <TB3> INFO: PixTestReadback::CalibrateIa()
[16:46:30.940] <TB3> INFO: ----------------------------------------------------------------------
[16:49:11.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat
[16:49:11.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C1.dat
[16:49:11.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C2.dat
[16:49:11.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C3.dat
[16:49:11.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C4.dat
[16:49:11.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C5.dat
[16:49:11.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C6.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C7.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C8.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C9.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C10.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C11.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C12.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C13.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C14.dat
[16:49:11.232] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:49:11.259] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:49:11.260] <TB3> INFO: PixTestReadback::doTest() done
[16:49:11.260] <TB3> INFO: Decoding statistics:
[16:49:11.260] <TB3> INFO: General information:
[16:49:11.260] <TB3> INFO: 16bit words read: 1536
[16:49:11.260] <TB3> INFO: valid events total: 256
[16:49:11.260] <TB3> INFO: empty events: 256
[16:49:11.260] <TB3> INFO: valid events with pixels: 0
[16:49:11.260] <TB3> INFO: valid pixel hits: 0
[16:49:11.260] <TB3> INFO: Event errors: 0
[16:49:11.260] <TB3> INFO: start marker: 0
[16:49:11.260] <TB3> INFO: stop marker: 0
[16:49:11.260] <TB3> INFO: overflow: 0
[16:49:11.260] <TB3> INFO: invalid 5bit words: 0
[16:49:11.260] <TB3> INFO: invalid XOR eye diagram: 0
[16:49:11.260] <TB3> INFO: frame (failed synchr.): 0
[16:49:11.260] <TB3> INFO: idle data (no TBM trl): 0
[16:49:11.260] <TB3> INFO: no data (only TBM hdr): 0
[16:49:11.260] <TB3> INFO: TBM errors: 0
[16:49:11.260] <TB3> INFO: flawed TBM headers: 0
[16:49:11.260] <TB3> INFO: flawed TBM trailers: 0
[16:49:11.260] <TB3> INFO: event ID mismatches: 0
[16:49:11.260] <TB3> INFO: ROC errors: 0
[16:49:11.260] <TB3> INFO: missing ROC header(s): 0
[16:49:11.260] <TB3> INFO: misplaced readback start: 0
[16:49:11.260] <TB3> INFO: Pixel decoding errors: 0
[16:49:11.260] <TB3> INFO: pixel data incomplete: 0
[16:49:11.260] <TB3> INFO: pixel address: 0
[16:49:11.260] <TB3> INFO: pulse height fill bit: 0
[16:49:11.260] <TB3> INFO: buffer corruption: 0
[16:49:11.295] <TB3> INFO: ######################################################################
[16:49:11.295] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:49:11.295] <TB3> INFO: ######################################################################
[16:49:11.298] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:49:11.315] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:49:11.315] <TB3> INFO: run 1 of 1
[16:49:11.629] <TB3> INFO: Expecting 3120000 events.
[16:49:42.424] <TB3> INFO: 674340 events read in total (30203ms).











[16:50:12.393] <TB3> INFO: 1342375 events read in total (60172ms).











[16:50:41.881] <TB3> INFO: 2008690 events read in total (89660ms).











[16:51:11.817] <TB3> INFO: 2676015 events read in total (119596ms).











[16:51:32.358] <TB3> INFO: 3120000 events read in total (140137ms).
[16:51:32.410] <TB3> INFO: Test took 141096ms.
[16:51:57.902] <TB3> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 166 seconds
[16:51:57.902] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
[16:51:57.902] <TB3> INFO: separation cut (per ROC): 111 107 117 108 107 114 104 107 108 114 112 119 110 119 109 119
[16:51:57.902] <TB3> INFO: Decoding statistics:
[16:51:57.902] <TB3> INFO: General information:
[16:51:57.902] <TB3> INFO: 16bit words read: 0
[16:51:57.902] <TB3> INFO: valid events total: 0
[16:51:57.902] <TB3> INFO: empty events: 0
[16:51:57.902] <TB3> INFO: valid events with pixels: 0
[16:51:57.902] <TB3> INFO: valid pixel hits: 0
[16:51:57.903] <TB3> INFO: Event errors: 0
[16:51:57.903] <TB3> INFO: start marker: 0
[16:51:57.903] <TB3> INFO: stop marker: 0
[16:51:57.903] <TB3> INFO: overflow: 0
[16:51:57.903] <TB3> INFO: invalid 5bit words: 0
[16:51:57.903] <TB3> INFO: invalid XOR eye diagram: 0
[16:51:57.903] <TB3> INFO: frame (failed synchr.): 0
[16:51:57.903] <TB3> INFO: idle data (no TBM trl): 0
[16:51:57.903] <TB3> INFO: no data (only TBM hdr): 0
[16:51:57.903] <TB3> INFO: TBM errors: 0
[16:51:57.903] <TB3> INFO: flawed TBM headers: 0
[16:51:57.903] <TB3> INFO: flawed TBM trailers: 0
[16:51:57.903] <TB3> INFO: event ID mismatches: 0
[16:51:57.903] <TB3> INFO: ROC errors: 0
[16:51:57.903] <TB3> INFO: missing ROC header(s): 0
[16:51:57.903] <TB3> INFO: misplaced readback start: 0
[16:51:57.903] <TB3> INFO: Pixel decoding errors: 0
[16:51:57.903] <TB3> INFO: pixel data incomplete: 0
[16:51:57.903] <TB3> INFO: pixel address: 0
[16:51:57.903] <TB3> INFO: pulse height fill bit: 0
[16:51:57.903] <TB3> INFO: buffer corruption: 0
[16:51:57.938] <TB3> INFO: ######################################################################
[16:51:57.938] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:51:57.938] <TB3> INFO: ######################################################################
[16:51:57.938] <TB3> INFO: ----------------------------------------------------------------------
[16:51:57.938] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:51:57.938] <TB3> INFO: ----------------------------------------------------------------------
[16:51:57.938] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:51:57.948] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[16:51:57.948] <TB3> INFO: run 1 of 1
[16:51:58.200] <TB3> INFO: Expecting 36608000 events.
[16:52:21.635] <TB3> INFO: 681050 events read in total (22844ms).
[16:52:44.524] <TB3> INFO: 1347100 events read in total (45733ms).
[16:53:07.086] <TB3> INFO: 2013050 events read in total (68295ms).
[16:53:29.658] <TB3> INFO: 2676700 events read in total (90867ms).
[16:53:52.490] <TB3> INFO: 3342450 events read in total (113699ms).
[16:54:15.254] <TB3> INFO: 4008350 events read in total (136463ms).
[16:54:37.886] <TB3> INFO: 4672350 events read in total (159095ms).
[16:55:00.569] <TB3> INFO: 5338200 events read in total (181778ms).
[16:55:23.545] <TB3> INFO: 6003000 events read in total (204754ms).
[16:55:46.151] <TB3> INFO: 6667350 events read in total (227360ms).
[16:56:08.997] <TB3> INFO: 7330300 events read in total (250206ms).
[16:56:31.348] <TB3> INFO: 7996450 events read in total (272557ms).
[16:56:54.048] <TB3> INFO: 8660650 events read in total (295257ms).
[16:57:16.582] <TB3> INFO: 9326300 events read in total (317791ms).
[16:57:39.249] <TB3> INFO: 9990500 events read in total (340458ms).
[16:58:01.951] <TB3> INFO: 10654800 events read in total (363160ms).
[16:58:24.570] <TB3> INFO: 11317650 events read in total (385779ms).
[16:58:47.233] <TB3> INFO: 11982250 events read in total (408442ms).
[16:59:09.744] <TB3> INFO: 12644600 events read in total (430953ms).
[16:59:32.510] <TB3> INFO: 13308600 events read in total (453719ms).
[16:59:55.315] <TB3> INFO: 13970950 events read in total (476524ms).
[17:00:18.110] <TB3> INFO: 14633550 events read in total (499319ms).
[17:00:41.198] <TB3> INFO: 15296500 events read in total (522407ms).
[17:01:03.702] <TB3> INFO: 15959150 events read in total (544911ms).
[17:01:26.524] <TB3> INFO: 16621100 events read in total (567733ms).
[17:01:49.065] <TB3> INFO: 17283350 events read in total (590274ms).
[17:02:11.895] <TB3> INFO: 17945500 events read in total (613104ms).
[17:02:34.472] <TB3> INFO: 18606250 events read in total (635681ms).
[17:02:57.269] <TB3> INFO: 19267500 events read in total (658478ms).
[17:03:20.006] <TB3> INFO: 19926550 events read in total (681215ms).
[17:03:42.831] <TB3> INFO: 20586300 events read in total (704040ms).
[17:04:05.768] <TB3> INFO: 21246050 events read in total (726977ms).
[17:04:28.600] <TB3> INFO: 21905450 events read in total (749809ms).
[17:04:51.291] <TB3> INFO: 22563000 events read in total (772500ms).
[17:05:14.095] <TB3> INFO: 23221550 events read in total (795304ms).
[17:05:36.609] <TB3> INFO: 23879600 events read in total (817818ms).
[17:05:59.610] <TB3> INFO: 24538050 events read in total (840819ms).
[17:06:22.344] <TB3> INFO: 25195700 events read in total (863553ms).
[17:06:45.101] <TB3> INFO: 25855250 events read in total (886310ms).
[17:07:07.811] <TB3> INFO: 26514750 events read in total (909020ms).
[17:07:30.710] <TB3> INFO: 27173150 events read in total (931919ms).
[17:07:53.493] <TB3> INFO: 27831650 events read in total (954702ms).
[17:08:16.227] <TB3> INFO: 28490250 events read in total (977436ms).
[17:08:38.960] <TB3> INFO: 29148100 events read in total (1000169ms).
[17:09:01.654] <TB3> INFO: 29805300 events read in total (1022863ms).
[17:09:24.257] <TB3> INFO: 30464050 events read in total (1045466ms).
[17:09:47.064] <TB3> INFO: 31120350 events read in total (1068273ms).
[17:10:09.620] <TB3> INFO: 31776800 events read in total (1090829ms).
[17:10:32.335] <TB3> INFO: 32434050 events read in total (1113544ms).
[17:10:54.899] <TB3> INFO: 33092450 events read in total (1136108ms).
[17:11:17.953] <TB3> INFO: 33749950 events read in total (1159162ms).
[17:11:40.997] <TB3> INFO: 34410950 events read in total (1182206ms).
[17:12:03.792] <TB3> INFO: 35070600 events read in total (1205001ms).
[17:12:26.715] <TB3> INFO: 35730150 events read in total (1227924ms).
[17:12:49.734] <TB3> INFO: 36398850 events read in total (1250943ms).
[17:12:56.843] <TB3> INFO: 36608000 events read in total (1258052ms).
[17:12:56.894] <TB3> INFO: Test took 1258945ms.
[17:12:57.283] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:12:58.864] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:00.410] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:01.899] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:03.573] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:05.771] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:07.740] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:09.864] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:11.825] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:13.834] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:15.784] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:17.678] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:19.806] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:21.446] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:22.991] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:24.535] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:13:26.113] <TB3> INFO: PixTestScurves::scurves() done
[17:13:26.113] <TB3> INFO: Vcal mean: 110.99 111.35 118.68 114.52 108.52 114.63 112.81 111.79 113.00 110.26 116.15 112.84 115.55 116.17 109.56 113.86
[17:13:26.113] <TB3> INFO: Vcal RMS: 4.86 4.81 6.47 6.38 4.52 5.39 5.10 5.38 5.14 4.97 6.05 5.50 5.54 5.40 4.78 5.54
[17:13:26.113] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1288 seconds
[17:13:26.113] <TB3> INFO: Decoding statistics:
[17:13:26.113] <TB3> INFO: General information:
[17:13:26.113] <TB3> INFO: 16bit words read: 0
[17:13:26.113] <TB3> INFO: valid events total: 0
[17:13:26.113] <TB3> INFO: empty events: 0
[17:13:26.113] <TB3> INFO: valid events with pixels: 0
[17:13:26.113] <TB3> INFO: valid pixel hits: 0
[17:13:26.113] <TB3> INFO: Event errors: 0
[17:13:26.113] <TB3> INFO: start marker: 0
[17:13:26.113] <TB3> INFO: stop marker: 0
[17:13:26.113] <TB3> INFO: overflow: 0
[17:13:26.113] <TB3> INFO: invalid 5bit words: 0
[17:13:26.113] <TB3> INFO: invalid XOR eye diagram: 0
[17:13:26.113] <TB3> INFO: frame (failed synchr.): 0
[17:13:26.113] <TB3> INFO: idle data (no TBM trl): 0
[17:13:26.113] <TB3> INFO: no data (only TBM hdr): 0
[17:13:26.113] <TB3> INFO: TBM errors: 0
[17:13:26.113] <TB3> INFO: flawed TBM headers: 0
[17:13:26.114] <TB3> INFO: flawed TBM trailers: 0
[17:13:26.114] <TB3> INFO: event ID mismatches: 0
[17:13:26.114] <TB3> INFO: ROC errors: 0
[17:13:26.114] <TB3> INFO: missing ROC header(s): 0
[17:13:26.114] <TB3> INFO: misplaced readback start: 0
[17:13:26.114] <TB3> INFO: Pixel decoding errors: 0
[17:13:26.114] <TB3> INFO: pixel data incomplete: 0
[17:13:26.114] <TB3> INFO: pixel address: 0
[17:13:26.114] <TB3> INFO: pulse height fill bit: 0
[17:13:26.114] <TB3> INFO: buffer corruption: 0
[17:13:26.178] <TB3> INFO: ######################################################################
[17:13:26.178] <TB3> INFO: PixTestTrim::doTest()
[17:13:26.178] <TB3> INFO: ######################################################################
[17:13:26.179] <TB3> INFO: ----------------------------------------------------------------------
[17:13:26.179] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[17:13:26.179] <TB3> INFO: ----------------------------------------------------------------------
[17:13:26.218] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:13:26.218] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:13:26.228] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:13:26.228] <TB3> INFO: run 1 of 1
[17:13:26.496] <TB3> INFO: Expecting 5025280 events.
[17:13:57.062] <TB3> INFO: 821520 events read in total (29966ms).
[17:14:27.196] <TB3> INFO: 1639680 events read in total (60100ms).
[17:14:57.153] <TB3> INFO: 2456064 events read in total (90057ms).
[17:15:27.005] <TB3> INFO: 3265896 events read in total (119909ms).
[17:15:56.523] <TB3> INFO: 4073656 events read in total (149427ms).
[17:16:26.349] <TB3> INFO: 4880400 events read in total (179253ms).
[17:16:31.926] <TB3> INFO: 5025280 events read in total (184830ms).
[17:16:31.966] <TB3> INFO: Test took 185739ms.
[17:16:52.609] <TB3> INFO: ROC 0 VthrComp = 119
[17:16:52.610] <TB3> INFO: ROC 1 VthrComp = 116
[17:16:52.610] <TB3> INFO: ROC 2 VthrComp = 131
[17:16:52.610] <TB3> INFO: ROC 3 VthrComp = 116
[17:16:52.610] <TB3> INFO: ROC 4 VthrComp = 115
[17:16:52.610] <TB3> INFO: ROC 5 VthrComp = 125
[17:16:52.610] <TB3> INFO: ROC 6 VthrComp = 111
[17:16:52.610] <TB3> INFO: ROC 7 VthrComp = 112
[17:16:52.610] <TB3> INFO: ROC 8 VthrComp = 123
[17:16:52.610] <TB3> INFO: ROC 9 VthrComp = 119
[17:16:52.611] <TB3> INFO: ROC 10 VthrComp = 117
[17:16:52.611] <TB3> INFO: ROC 11 VthrComp = 120
[17:16:52.611] <TB3> INFO: ROC 12 VthrComp = 120
[17:16:52.611] <TB3> INFO: ROC 13 VthrComp = 130
[17:16:52.611] <TB3> INFO: ROC 14 VthrComp = 119
[17:16:52.611] <TB3> INFO: ROC 15 VthrComp = 120
[17:16:52.889] <TB3> INFO: Expecting 41600 events.
[17:16:56.378] <TB3> INFO: 41600 events read in total (2897ms).
[17:16:56.379] <TB3> INFO: Test took 3766ms.
[17:16:56.387] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:16:56.387] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:16:56.397] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:16:56.397] <TB3> INFO: run 1 of 1
[17:16:56.674] <TB3> INFO: Expecting 5025280 events.
[17:17:22.570] <TB3> INFO: 590032 events read in total (25304ms).
[17:17:47.697] <TB3> INFO: 1178232 events read in total (50431ms).
[17:18:13.035] <TB3> INFO: 1766552 events read in total (75769ms).
[17:18:38.618] <TB3> INFO: 2354616 events read in total (101352ms).
[17:19:03.833] <TB3> INFO: 2940920 events read in total (126567ms).
[17:19:28.941] <TB3> INFO: 3525936 events read in total (151675ms).
[17:19:54.307] <TB3> INFO: 4110168 events read in total (177041ms).
[17:20:20.278] <TB3> INFO: 4693376 events read in total (203012ms).
[17:20:34.732] <TB3> INFO: 5025280 events read in total (217466ms).
[17:20:34.792] <TB3> INFO: Test took 218395ms.
[17:20:57.735] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.7544 for pixel 19/3 mean/min/max = 45.253/31.674/58.8321
[17:20:57.735] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 60.5949 for pixel 16/77 mean/min/max = 46.2019/31.7646/60.6393
[17:20:57.736] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 60.0013 for pixel 12/8 mean/min/max = 45.7102/31.4147/60.0057
[17:20:57.736] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 65.0306 for pixel 1/2 mean/min/max = 47.8997/30.1695/65.63
[17:20:57.737] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.222 for pixel 34/7 mean/min/max = 45.507/32.5724/58.4415
[17:20:57.737] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 58.1603 for pixel 11/20 mean/min/max = 44.98/31.5709/58.3892
[17:20:57.737] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 65.151 for pixel 33/4 mean/min/max = 49.1858/33.205/65.1666
[17:20:57.738] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 61.1316 for pixel 48/8 mean/min/max = 46.9069/32.3572/61.4565
[17:20:57.738] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.5194 for pixel 9/11 mean/min/max = 45.6274/30.697/60.5577
[17:20:57.739] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.7685 for pixel 8/12 mean/min/max = 44.9322/30.7297/59.1346
[17:20:57.739] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 62.6156 for pixel 14/33 mean/min/max = 46.6764/30.6897/62.6631
[17:20:57.739] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 60.7823 for pixel 0/14 mean/min/max = 45.9856/31.1319/60.8393
[17:20:57.740] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.4219 for pixel 46/13 mean/min/max = 46.2417/31.822/60.6613
[17:20:57.740] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.8745 for pixel 38/79 mean/min/max = 44.9843/31.8153/58.1532
[17:20:57.741] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.035 for pixel 45/9 mean/min/max = 44.8071/31.3456/58.2685
[17:20:57.741] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.2123 for pixel 10/78 mean/min/max = 46.2068/32.172/60.2416
[17:20:57.741] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:57.831] <TB3> INFO: Expecting 411648 events.
[17:21:07.099] <TB3> INFO: 411648 events read in total (8676ms).
[17:21:07.108] <TB3> INFO: Expecting 411648 events.
[17:21:16.223] <TB3> INFO: 411648 events read in total (8712ms).
[17:21:16.233] <TB3> INFO: Expecting 411648 events.
[17:21:25.278] <TB3> INFO: 411648 events read in total (8642ms).
[17:21:25.291] <TB3> INFO: Expecting 411648 events.
[17:21:34.326] <TB3> INFO: 411648 events read in total (8632ms).
[17:21:34.341] <TB3> INFO: Expecting 411648 events.
[17:21:43.355] <TB3> INFO: 411648 events read in total (8611ms).
[17:21:43.373] <TB3> INFO: Expecting 411648 events.
[17:21:52.426] <TB3> INFO: 411648 events read in total (8650ms).
[17:21:52.446] <TB3> INFO: Expecting 411648 events.
[17:22:01.473] <TB3> INFO: 411648 events read in total (8624ms).
[17:22:01.502] <TB3> INFO: Expecting 411648 events.
[17:22:10.590] <TB3> INFO: 411648 events read in total (8685ms).
[17:22:10.615] <TB3> INFO: Expecting 411648 events.
[17:22:19.689] <TB3> INFO: 411648 events read in total (8671ms).
[17:22:19.717] <TB3> INFO: Expecting 411648 events.
[17:22:28.814] <TB3> INFO: 411648 events read in total (8694ms).
[17:22:28.855] <TB3> INFO: Expecting 411648 events.
[17:22:37.988] <TB3> INFO: 411648 events read in total (8730ms).
[17:22:38.020] <TB3> INFO: Expecting 411648 events.
[17:22:47.027] <TB3> INFO: 411648 events read in total (8604ms).
[17:22:47.063] <TB3> INFO: Expecting 411648 events.
[17:22:56.104] <TB3> INFO: 411648 events read in total (8638ms).
[17:22:56.142] <TB3> INFO: Expecting 411648 events.
[17:23:05.248] <TB3> INFO: 411648 events read in total (8703ms).
[17:23:05.291] <TB3> INFO: Expecting 411648 events.
[17:23:14.408] <TB3> INFO: 411648 events read in total (8714ms).
[17:23:14.452] <TB3> INFO: Expecting 411648 events.
[17:23:23.635] <TB3> INFO: 411648 events read in total (8780ms).
[17:23:23.705] <TB3> INFO: Test took 145964ms.
[17:23:24.541] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:23:24.551] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:23:24.551] <TB3> INFO: run 1 of 1
[17:23:24.782] <TB3> INFO: Expecting 5025280 events.
[17:23:51.183] <TB3> INFO: 586704 events read in total (25809ms).
[17:24:16.693] <TB3> INFO: 1172112 events read in total (51319ms).
[17:24:42.023] <TB3> INFO: 1755960 events read in total (76649ms).
[17:25:07.873] <TB3> INFO: 2340272 events read in total (102499ms).
[17:25:33.272] <TB3> INFO: 2925320 events read in total (127898ms).
[17:25:58.785] <TB3> INFO: 3511600 events read in total (153411ms).
[17:26:24.149] <TB3> INFO: 4096920 events read in total (178775ms).
[17:26:49.901] <TB3> INFO: 4680280 events read in total (204527ms).
[17:27:05.048] <TB3> INFO: 5025280 events read in total (219674ms).
[17:27:05.149] <TB3> INFO: Test took 220598ms.
[17:27:28.154] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 147.881277
[17:27:28.423] <TB3> INFO: Expecting 208000 events.
[17:27:38.032] <TB3> INFO: 208000 events read in total (9018ms).
[17:27:38.033] <TB3> INFO: Test took 9877ms.
[17:27:38.099] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[17:27:38.112] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:27:38.113] <TB3> INFO: run 1 of 1
[17:27:38.390] <TB3> INFO: Expecting 5224960 events.
[17:28:04.575] <TB3> INFO: 583936 events read in total (25593ms).
[17:28:29.528] <TB3> INFO: 1167584 events read in total (50546ms).
[17:28:55.493] <TB3> INFO: 1751392 events read in total (76511ms).
[17:29:20.964] <TB3> INFO: 2334984 events read in total (101982ms).
[17:29:46.556] <TB3> INFO: 2918296 events read in total (127574ms).
[17:30:11.857] <TB3> INFO: 3501016 events read in total (152875ms).
[17:30:37.407] <TB3> INFO: 4083064 events read in total (178425ms).
[17:31:03.205] <TB3> INFO: 4663960 events read in total (204223ms).
[17:31:28.560] <TB3> INFO: 5224960 events read in total (229578ms).
[17:31:28.628] <TB3> INFO: Test took 230516ms.
[17:31:53.996] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.777207 .. 43.533209
[17:31:54.241] <TB3> INFO: Expecting 208000 events.
[17:32:03.889] <TB3> INFO: 208000 events read in total (9057ms).
[17:32:03.889] <TB3> INFO: Test took 9891ms.
[17:32:03.940] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 53 (-1/-1) hits flags = 528 (plus default)
[17:32:03.951] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:32:03.951] <TB3> INFO: run 1 of 1
[17:32:04.229] <TB3> INFO: Expecting 1231360 events.
[17:32:32.556] <TB3> INFO: 666440 events read in total (27735ms).
[17:32:55.984] <TB3> INFO: 1231360 events read in total (51163ms).
[17:32:56.013] <TB3> INFO: Test took 52062ms.
[17:33:09.754] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 25.517344 .. 44.761278
[17:33:10.024] <TB3> INFO: Expecting 208000 events.
[17:33:19.602] <TB3> INFO: 208000 events read in total (8986ms).
[17:33:19.602] <TB3> INFO: Test took 9846ms.
[17:33:19.650] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 54 (-1/-1) hits flags = 528 (plus default)
[17:33:19.660] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:33:19.660] <TB3> INFO: run 1 of 1
[17:33:19.938] <TB3> INFO: Expecting 1331200 events.
[17:33:48.095] <TB3> INFO: 670944 events read in total (27566ms).
[17:34:15.131] <TB3> INFO: 1331200 events read in total (54602ms).
[17:34:15.161] <TB3> INFO: Test took 55501ms.
[17:34:26.624] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 22.563108 .. 42.884848
[17:34:26.859] <TB3> INFO: Expecting 208000 events.
[17:34:36.500] <TB3> INFO: 208000 events read in total (9050ms).
[17:34:36.501] <TB3> INFO: Test took 9875ms.
[17:34:36.565] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 12 .. 52 (-1/-1) hits flags = 528 (plus default)
[17:34:36.577] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:34:36.577] <TB3> INFO: run 1 of 1
[17:34:36.855] <TB3> INFO: Expecting 1364480 events.
[17:35:05.369] <TB3> INFO: 692744 events read in total (27923ms).
[17:35:32.843] <TB3> INFO: 1364480 events read in total (55397ms).
[17:35:32.874] <TB3> INFO: Test took 56298ms.
[17:35:45.730] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:35:45.730] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:35:45.742] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:35:45.742] <TB3> INFO: run 1 of 1
[17:35:45.987] <TB3> INFO: Expecting 1364480 events.
[17:36:13.739] <TB3> INFO: 667096 events read in total (27160ms).
[17:36:41.180] <TB3> INFO: 1333776 events read in total (54601ms).
[17:36:42.817] <TB3> INFO: 1364480 events read in total (56239ms).
[17:36:42.839] <TB3> INFO: Test took 57098ms.
[17:36:56.831] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C0.dat
[17:36:56.831] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C1.dat
[17:36:56.831] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C2.dat
[17:36:56.831] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C3.dat
[17:36:56.831] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C4.dat
[17:36:56.831] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C5.dat
[17:36:56.831] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C6.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C7.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C8.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C9.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C10.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C11.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C12.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C13.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C14.dat
[17:36:56.832] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C15.dat
[17:36:56.832] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C0.dat
[17:36:56.838] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C1.dat
[17:36:56.844] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C2.dat
[17:36:56.851] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C3.dat
[17:36:56.859] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C4.dat
[17:36:56.866] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C5.dat
[17:36:56.873] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C6.dat
[17:36:56.879] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C7.dat
[17:36:56.884] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C8.dat
[17:36:56.890] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C9.dat
[17:36:56.896] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C10.dat
[17:36:56.902] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C11.dat
[17:36:56.909] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C12.dat
[17:36:56.916] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C13.dat
[17:36:56.923] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C14.dat
[17:36:56.931] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C15.dat
[17:36:56.939] <TB3> INFO: PixTestTrim::trimTest() done
[17:36:56.939] <TB3> INFO: vtrim: 157 156 146 152 134 141 140 142 170 141 150 162 136 144 140 136
[17:36:56.939] <TB3> INFO: vthrcomp: 119 116 131 116 115 125 111 112 123 119 117 120 120 130 119 120
[17:36:56.939] <TB3> INFO: vcal mean: 34.95 34.99 34.98 35.02 34.97 34.90 34.90 34.97 34.93 34.97 35.00 34.95 35.04 34.95 34.98 34.99
[17:36:56.939] <TB3> INFO: vcal RMS: 1.05 1.06 1.08 1.15 1.01 1.19 1.08 1.17 1.13 0.98 1.17 1.13 1.08 1.01 1.02 1.03
[17:36:56.939] <TB3> INFO: bits mean: 10.55 10.02 9.61 9.58 10.22 10.42 9.05 9.79 10.48 10.11 10.30 10.20 9.99 10.09 10.06 9.68
[17:36:56.939] <TB3> INFO: bits RMS: 2.29 2.42 2.65 2.72 2.33 2.39 2.53 2.46 2.43 2.64 2.42 2.42 2.47 2.46 2.56 2.54
[17:36:56.945] <TB3> INFO: ----------------------------------------------------------------------
[17:36:56.946] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:36:56.946] <TB3> INFO: ----------------------------------------------------------------------
[17:36:56.948] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:36:56.957] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:36:56.957] <TB3> INFO: run 1 of 1
[17:36:57.188] <TB3> INFO: Expecting 4160000 events.
[17:37:29.337] <TB3> INFO: 747770 events read in total (31557ms).
[17:38:00.648] <TB3> INFO: 1490605 events read in total (62868ms).
[17:38:31.858] <TB3> INFO: 2230150 events read in total (94078ms).
[17:39:03.140] <TB3> INFO: 2966700 events read in total (125361ms).
[17:39:34.660] <TB3> INFO: 3702075 events read in total (156880ms).
[17:39:54.281] <TB3> INFO: 4160000 events read in total (176501ms).
[17:39:54.356] <TB3> INFO: Test took 177399ms.
[17:40:19.953] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[17:40:19.963] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:40:19.963] <TB3> INFO: run 1 of 1
[17:40:20.211] <TB3> INFO: Expecting 4243200 events.
[17:40:51.310] <TB3> INFO: 719210 events read in total (30507ms).
[17:41:22.135] <TB3> INFO: 1433390 events read in total (61333ms).
[17:41:53.397] <TB3> INFO: 2145030 events read in total (92594ms).
[17:42:24.228] <TB3> INFO: 2853445 events read in total (123425ms).
[17:42:54.936] <TB3> INFO: 3560930 events read in total (154133ms).
[17:43:25.065] <TB3> INFO: 4243200 events read in total (184262ms).
[17:43:25.155] <TB3> INFO: Test took 185192ms.
[17:43:51.688] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 188 (-1/-1) hits flags = 528 (plus default)
[17:43:51.698] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:43:51.698] <TB3> INFO: run 1 of 1
[17:43:51.932] <TB3> INFO: Expecting 3931200 events.
[17:44:23.482] <TB3> INFO: 739355 events read in total (30958ms).
[17:44:54.479] <TB3> INFO: 1473740 events read in total (61955ms).
[17:45:25.990] <TB3> INFO: 2204015 events read in total (93466ms).
[17:45:56.918] <TB3> INFO: 2931110 events read in total (124394ms).
[17:46:27.980] <TB3> INFO: 3658215 events read in total (155456ms).
[17:46:39.980] <TB3> INFO: 3931200 events read in total (167456ms).
[17:46:40.098] <TB3> INFO: Test took 168399ms.
[17:47:04.621] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 187 (-1/-1) hits flags = 528 (plus default)
[17:47:04.633] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:47:04.633] <TB3> INFO: run 1 of 1
[17:47:04.912] <TB3> INFO: Expecting 3910400 events.
[17:47:36.882] <TB3> INFO: 740990 events read in total (31379ms).
[17:48:07.967] <TB3> INFO: 1476750 events read in total (62464ms).
[17:48:39.171] <TB3> INFO: 2208590 events read in total (93668ms).
[17:49:10.098] <TB3> INFO: 2937040 events read in total (124595ms).
[17:49:41.412] <TB3> INFO: 3665495 events read in total (155909ms).
[17:49:52.170] <TB3> INFO: 3910400 events read in total (166667ms).
[17:49:52.260] <TB3> INFO: Test took 167627ms.
[17:50:17.572] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 188 (-1/-1) hits flags = 528 (plus default)
[17:50:17.583] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:50:17.583] <TB3> INFO: run 1 of 1
[17:50:17.858] <TB3> INFO: Expecting 3931200 events.
[17:50:49.843] <TB3> INFO: 739540 events read in total (31393ms).
[17:51:21.090] <TB3> INFO: 1474125 events read in total (62640ms).
[17:51:52.150] <TB3> INFO: 2204725 events read in total (93700ms).
[17:52:23.180] <TB3> INFO: 2931940 events read in total (124730ms).
[17:52:54.374] <TB3> INFO: 3659190 events read in total (155924ms).
[17:53:06.442] <TB3> INFO: 3931200 events read in total (167992ms).
[17:53:06.530] <TB3> INFO: Test took 168947ms.
[17:53:32.551] <TB3> INFO: PixTestTrim::trimBitTest() done
[17:53:32.552] <TB3> INFO: PixTestTrim::doTest() done, duration: 2406 seconds
[17:53:32.552] <TB3> INFO: Decoding statistics:
[17:53:32.552] <TB3> INFO: General information:
[17:53:32.552] <TB3> INFO: 16bit words read: 0
[17:53:32.552] <TB3> INFO: valid events total: 0
[17:53:32.552] <TB3> INFO: empty events: 0
[17:53:32.552] <TB3> INFO: valid events with pixels: 0
[17:53:32.552] <TB3> INFO: valid pixel hits: 0
[17:53:32.552] <TB3> INFO: Event errors: 0
[17:53:32.552] <TB3> INFO: start marker: 0
[17:53:32.552] <TB3> INFO: stop marker: 0
[17:53:32.552] <TB3> INFO: overflow: 0
[17:53:32.552] <TB3> INFO: invalid 5bit words: 0
[17:53:32.552] <TB3> INFO: invalid XOR eye diagram: 0
[17:53:32.552] <TB3> INFO: frame (failed synchr.): 0
[17:53:32.552] <TB3> INFO: idle data (no TBM trl): 0
[17:53:32.552] <TB3> INFO: no data (only TBM hdr): 0
[17:53:32.552] <TB3> INFO: TBM errors: 0
[17:53:32.552] <TB3> INFO: flawed TBM headers: 0
[17:53:32.552] <TB3> INFO: flawed TBM trailers: 0
[17:53:32.552] <TB3> INFO: event ID mismatches: 0
[17:53:32.552] <TB3> INFO: ROC errors: 0
[17:53:32.553] <TB3> INFO: missing ROC header(s): 0
[17:53:32.553] <TB3> INFO: misplaced readback start: 0
[17:53:32.553] <TB3> INFO: Pixel decoding errors: 0
[17:53:32.553] <TB3> INFO: pixel data incomplete: 0
[17:53:32.553] <TB3> INFO: pixel address: 0
[17:53:32.553] <TB3> INFO: pulse height fill bit: 0
[17:53:32.553] <TB3> INFO: buffer corruption: 0
[17:53:33.286] <TB3> INFO: ######################################################################
[17:53:33.286] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:53:33.286] <TB3> INFO: ######################################################################
[17:53:33.520] <TB3> INFO: Expecting 41600 events.
[17:53:36.000] <TB3> INFO: 41600 events read in total (2888ms).
[17:53:36.001] <TB3> INFO: Test took 3714ms.
[17:53:37.455] <TB3> INFO: Expecting 41600 events.
[17:53:40.917] <TB3> INFO: 41600 events read in total (2871ms).
[17:53:40.918] <TB3> INFO: Test took 3714ms.
[17:53:41.206] <TB3> INFO: Expecting 41600 events.
[17:53:44.684] <TB3> INFO: 41600 events read in total (2887ms).
[17:53:44.685] <TB3> INFO: Test took 3744ms.
[17:53:44.975] <TB3> INFO: Expecting 41600 events.
[17:53:48.515] <TB3> INFO: 41600 events read in total (2948ms).
[17:53:48.515] <TB3> INFO: Test took 3804ms.
[17:53:48.803] <TB3> INFO: Expecting 41600 events.
[17:53:52.274] <TB3> INFO: 41600 events read in total (2879ms).
[17:53:52.275] <TB3> INFO: Test took 3737ms.
[17:53:52.563] <TB3> INFO: Expecting 41600 events.
[17:53:56.123] <TB3> INFO: 41600 events read in total (2969ms).
[17:53:56.124] <TB3> INFO: Test took 3826ms.
[17:53:56.411] <TB3> INFO: Expecting 41600 events.
[17:53:59.935] <TB3> INFO: 41600 events read in total (2932ms).
[17:53:59.935] <TB3> INFO: Test took 3788ms.
[17:54:00.223] <TB3> INFO: Expecting 41600 events.
[17:54:03.800] <TB3> INFO: 41600 events read in total (2984ms).
[17:54:03.801] <TB3> INFO: Test took 3842ms.
[17:54:04.089] <TB3> INFO: Expecting 41600 events.
[17:54:07.622] <TB3> INFO: 41600 events read in total (2941ms).
[17:54:07.622] <TB3> INFO: Test took 3797ms.
[17:54:07.911] <TB3> INFO: Expecting 41600 events.
[17:54:11.581] <TB3> INFO: 41600 events read in total (3079ms).
[17:54:11.582] <TB3> INFO: Test took 3936ms.
[17:54:11.873] <TB3> INFO: Expecting 41600 events.
[17:54:15.326] <TB3> INFO: 41600 events read in total (2861ms).
[17:54:15.327] <TB3> INFO: Test took 3719ms.
[17:54:15.615] <TB3> INFO: Expecting 41600 events.
[17:54:19.134] <TB3> INFO: 41600 events read in total (2927ms).
[17:54:19.135] <TB3> INFO: Test took 3784ms.
[17:54:19.423] <TB3> INFO: Expecting 41600 events.
[17:54:22.992] <TB3> INFO: 41600 events read in total (2977ms).
[17:54:22.993] <TB3> INFO: Test took 3835ms.
[17:54:23.281] <TB3> INFO: Expecting 41600 events.
[17:54:26.809] <TB3> INFO: 41600 events read in total (2935ms).
[17:54:26.810] <TB3> INFO: Test took 3794ms.
[17:54:27.098] <TB3> INFO: Expecting 41600 events.
[17:54:30.576] <TB3> INFO: 41600 events read in total (2886ms).
[17:54:30.577] <TB3> INFO: Test took 3743ms.
[17:54:30.867] <TB3> INFO: Expecting 41600 events.
[17:54:34.366] <TB3> INFO: 41600 events read in total (2908ms).
[17:54:34.367] <TB3> INFO: Test took 3765ms.
[17:54:34.655] <TB3> INFO: Expecting 41600 events.
[17:54:38.165] <TB3> INFO: 41600 events read in total (2918ms).
[17:54:38.166] <TB3> INFO: Test took 3776ms.
[17:54:38.454] <TB3> INFO: Expecting 41600 events.
[17:54:42.084] <TB3> INFO: 41600 events read in total (3038ms).
[17:54:42.085] <TB3> INFO: Test took 3895ms.
[17:54:42.373] <TB3> INFO: Expecting 41600 events.
[17:54:45.838] <TB3> INFO: 41600 events read in total (2874ms).
[17:54:45.839] <TB3> INFO: Test took 3731ms.
[17:54:46.127] <TB3> INFO: Expecting 41600 events.
[17:54:49.699] <TB3> INFO: 41600 events read in total (2981ms).
[17:54:49.700] <TB3> INFO: Test took 3838ms.
[17:54:49.988] <TB3> INFO: Expecting 41600 events.
[17:54:53.463] <TB3> INFO: 41600 events read in total (2883ms).
[17:54:53.464] <TB3> INFO: Test took 3741ms.
[17:54:53.752] <TB3> INFO: Expecting 41600 events.
[17:54:57.281] <TB3> INFO: 41600 events read in total (2937ms).
[17:54:57.282] <TB3> INFO: Test took 3794ms.
[17:54:57.572] <TB3> INFO: Expecting 41600 events.
[17:55:01.093] <TB3> INFO: 41600 events read in total (2929ms).
[17:55:01.094] <TB3> INFO: Test took 3787ms.
[17:55:01.382] <TB3> INFO: Expecting 41600 events.
[17:55:04.990] <TB3> INFO: 41600 events read in total (3016ms).
[17:55:04.991] <TB3> INFO: Test took 3873ms.
[17:55:05.281] <TB3> INFO: Expecting 41600 events.
[17:55:08.783] <TB3> INFO: 41600 events read in total (2910ms).
[17:55:08.783] <TB3> INFO: Test took 3766ms.
[17:55:09.072] <TB3> INFO: Expecting 41600 events.
[17:55:12.591] <TB3> INFO: 41600 events read in total (2927ms).
[17:55:12.591] <TB3> INFO: Test took 3784ms.
[17:55:12.880] <TB3> INFO: Expecting 41600 events.
[17:55:16.343] <TB3> INFO: 41600 events read in total (2872ms).
[17:55:16.343] <TB3> INFO: Test took 3728ms.
[17:55:16.636] <TB3> INFO: Expecting 41600 events.
[17:55:20.126] <TB3> INFO: 41600 events read in total (2898ms).
[17:55:20.126] <TB3> INFO: Test took 3755ms.
[17:55:20.415] <TB3> INFO: Expecting 2560 events.
[17:55:21.299] <TB3> INFO: 2560 events read in total (292ms).
[17:55:21.300] <TB3> INFO: Test took 1162ms.
[17:55:21.607] <TB3> INFO: Expecting 2560 events.
[17:55:22.490] <TB3> INFO: 2560 events read in total (291ms).
[17:55:22.491] <TB3> INFO: Test took 1191ms.
[17:55:22.799] <TB3> INFO: Expecting 2560 events.
[17:55:23.684] <TB3> INFO: 2560 events read in total (294ms).
[17:55:23.684] <TB3> INFO: Test took 1193ms.
[17:55:23.992] <TB3> INFO: Expecting 2560 events.
[17:55:24.876] <TB3> INFO: 2560 events read in total (292ms).
[17:55:24.876] <TB3> INFO: Test took 1192ms.
[17:55:25.184] <TB3> INFO: Expecting 2560 events.
[17:55:26.065] <TB3> INFO: 2560 events read in total (290ms).
[17:55:26.065] <TB3> INFO: Test took 1189ms.
[17:55:26.373] <TB3> INFO: Expecting 2560 events.
[17:55:27.251] <TB3> INFO: 2560 events read in total (286ms).
[17:55:27.251] <TB3> INFO: Test took 1185ms.
[17:55:27.559] <TB3> INFO: Expecting 2560 events.
[17:55:28.439] <TB3> INFO: 2560 events read in total (289ms).
[17:55:28.440] <TB3> INFO: Test took 1189ms.
[17:55:28.747] <TB3> INFO: Expecting 2560 events.
[17:55:29.625] <TB3> INFO: 2560 events read in total (286ms).
[17:55:29.625] <TB3> INFO: Test took 1185ms.
[17:55:29.933] <TB3> INFO: Expecting 2560 events.
[17:55:30.814] <TB3> INFO: 2560 events read in total (289ms).
[17:55:30.814] <TB3> INFO: Test took 1189ms.
[17:55:31.122] <TB3> INFO: Expecting 2560 events.
[17:55:32.003] <TB3> INFO: 2560 events read in total (289ms).
[17:55:32.003] <TB3> INFO: Test took 1188ms.
[17:55:32.311] <TB3> INFO: Expecting 2560 events.
[17:55:33.190] <TB3> INFO: 2560 events read in total (287ms).
[17:55:33.190] <TB3> INFO: Test took 1186ms.
[17:55:33.498] <TB3> INFO: Expecting 2560 events.
[17:55:34.376] <TB3> INFO: 2560 events read in total (286ms).
[17:55:34.376] <TB3> INFO: Test took 1186ms.
[17:55:34.684] <TB3> INFO: Expecting 2560 events.
[17:55:35.568] <TB3> INFO: 2560 events read in total (292ms).
[17:55:35.568] <TB3> INFO: Test took 1191ms.
[17:55:35.876] <TB3> INFO: Expecting 2560 events.
[17:55:36.758] <TB3> INFO: 2560 events read in total (291ms).
[17:55:36.759] <TB3> INFO: Test took 1191ms.
[17:55:37.067] <TB3> INFO: Expecting 2560 events.
[17:55:37.949] <TB3> INFO: 2560 events read in total (291ms).
[17:55:37.949] <TB3> INFO: Test took 1190ms.
[17:55:38.257] <TB3> INFO: Expecting 2560 events.
[17:55:39.140] <TB3> INFO: 2560 events read in total (291ms).
[17:55:39.140] <TB3> INFO: Test took 1190ms.
[17:55:39.143] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:55:39.449] <TB3> INFO: Expecting 655360 events.
[17:55:53.851] <TB3> INFO: 655360 events read in total (13811ms).
[17:55:53.864] <TB3> INFO: Expecting 655360 events.
[17:56:08.079] <TB3> INFO: 655360 events read in total (13812ms).
[17:56:08.097] <TB3> INFO: Expecting 655360 events.
[17:56:22.344] <TB3> INFO: 655360 events read in total (13844ms).
[17:56:22.365] <TB3> INFO: Expecting 655360 events.
[17:56:36.578] <TB3> INFO: 655360 events read in total (13810ms).
[17:56:36.612] <TB3> INFO: Expecting 655360 events.
[17:56:50.810] <TB3> INFO: 655360 events read in total (13795ms).
[17:56:50.840] <TB3> INFO: Expecting 655360 events.
[17:57:05.259] <TB3> INFO: 655360 events read in total (14016ms).
[17:57:05.294] <TB3> INFO: Expecting 655360 events.
[17:57:19.492] <TB3> INFO: 655360 events read in total (13795ms).
[17:57:19.530] <TB3> INFO: Expecting 655360 events.
[17:57:33.670] <TB3> INFO: 655360 events read in total (13737ms).
[17:57:33.711] <TB3> INFO: Expecting 655360 events.
[17:57:47.871] <TB3> INFO: 655360 events read in total (13757ms).
[17:57:47.930] <TB3> INFO: Expecting 655360 events.
[17:58:02.174] <TB3> INFO: 655360 events read in total (13841ms).
[17:58:02.255] <TB3> INFO: Expecting 655360 events.
[17:58:16.329] <TB3> INFO: 655360 events read in total (13671ms).
[17:58:16.421] <TB3> INFO: Expecting 655360 events.
[17:58:30.599] <TB3> INFO: 655360 events read in total (13775ms).
[17:58:30.737] <TB3> INFO: Expecting 655360 events.
[17:58:45.017] <TB3> INFO: 655360 events read in total (13877ms).
[17:58:45.120] <TB3> INFO: Expecting 655360 events.
[17:58:59.986] <TB3> INFO: 655360 events read in total (14463ms).
[17:59:00.101] <TB3> INFO: Expecting 655360 events.
[17:59:14.283] <TB3> INFO: 655360 events read in total (13779ms).
[17:59:14.401] <TB3> INFO: Expecting 655360 events.
[17:59:28.583] <TB3> INFO: 655360 events read in total (13779ms).
[17:59:28.767] <TB3> INFO: Test took 229624ms.
[17:59:28.861] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:59:29.125] <TB3> INFO: Expecting 655360 events.
[17:59:43.447] <TB3> INFO: 655360 events read in total (13730ms).
[17:59:43.460] <TB3> INFO: Expecting 655360 events.
[17:59:57.497] <TB3> INFO: 655360 events read in total (13634ms).
[17:59:57.514] <TB3> INFO: Expecting 655360 events.
[18:00:11.663] <TB3> INFO: 655360 events read in total (13746ms).
[18:00:11.689] <TB3> INFO: Expecting 655360 events.
[18:00:25.729] <TB3> INFO: 655360 events read in total (13637ms).
[18:00:25.759] <TB3> INFO: Expecting 655360 events.
[18:00:39.892] <TB3> INFO: 655360 events read in total (13730ms).
[18:00:39.932] <TB3> INFO: Expecting 655360 events.
[18:00:53.950] <TB3> INFO: 655360 events read in total (13615ms).
[18:00:53.983] <TB3> INFO: Expecting 655360 events.
[18:01:08.172] <TB3> INFO: 655360 events read in total (13786ms).
[18:01:08.226] <TB3> INFO: Expecting 655360 events.
[18:01:22.304] <TB3> INFO: 655360 events read in total (13675ms).
[18:01:22.360] <TB3> INFO: Expecting 655360 events.
[18:01:36.471] <TB3> INFO: 655360 events read in total (13708ms).
[18:01:36.536] <TB3> INFO: Expecting 655360 events.
[18:01:50.640] <TB3> INFO: 655360 events read in total (13701ms).
[18:01:50.754] <TB3> INFO: Expecting 655360 events.
[18:02:04.838] <TB3> INFO: 655360 events read in total (13681ms).
[18:02:04.933] <TB3> INFO: Expecting 655360 events.
[18:02:18.951] <TB3> INFO: 655360 events read in total (13615ms).
[18:02:19.032] <TB3> INFO: Expecting 655360 events.
[18:02:32.997] <TB3> INFO: 655360 events read in total (13562ms).
[18:02:33.079] <TB3> INFO: Expecting 655360 events.
[18:02:47.155] <TB3> INFO: 655360 events read in total (13673ms).
[18:02:47.222] <TB3> INFO: Expecting 655360 events.
[18:03:01.053] <TB3> INFO: 655360 events read in total (13428ms).
[18:03:01.133] <TB3> INFO: Expecting 655360 events.
[18:03:15.029] <TB3> INFO: 655360 events read in total (13493ms).
[18:03:15.103] <TB3> INFO: Test took 226242ms.
[18:03:15.320] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.325] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.329] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.334] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.339] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.343] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.348] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[18:03:15.352] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[18:03:15.357] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[18:03:15.362] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[18:03:15.366] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[18:03:15.371] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[18:03:15.375] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.380] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.386] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.392] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.399] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.405] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[18:03:15.411] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[18:03:15.417] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[18:03:15.423] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[18:03:15.429] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[18:03:15.436] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[18:03:15.442] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[18:03:15.449] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[18:03:15.455] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[18:03:15.462] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.469] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.475] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.481] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.487] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:03:15.494] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[18:03:15.500] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[18:03:15.506] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[18:03:15.512] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C0.dat
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C1.dat
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C2.dat
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C3.dat
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C4.dat
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C5.dat
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C6.dat
[18:03:15.547] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C7.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C8.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C9.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C10.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C11.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C12.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C13.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C14.dat
[18:03:15.548] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C15.dat
[18:03:15.784] <TB3> INFO: Expecting 41600 events.
[18:03:18.900] <TB3> INFO: 41600 events read in total (2524ms).
[18:03:18.901] <TB3> INFO: Test took 3350ms.
[18:03:19.367] <TB3> INFO: Expecting 41600 events.
[18:03:22.429] <TB3> INFO: 41600 events read in total (2470ms).
[18:03:22.430] <TB3> INFO: Test took 3319ms.
[18:03:22.872] <TB3> INFO: Expecting 41600 events.
[18:03:25.961] <TB3> INFO: 41600 events read in total (2498ms).
[18:03:25.962] <TB3> INFO: Test took 3321ms.
[18:03:26.176] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:26.264] <TB3> INFO: Expecting 2560 events.
[18:03:27.147] <TB3> INFO: 2560 events read in total (291ms).
[18:03:27.147] <TB3> INFO: Test took 971ms.
[18:03:27.149] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:27.455] <TB3> INFO: Expecting 2560 events.
[18:03:28.338] <TB3> INFO: 2560 events read in total (291ms).
[18:03:28.339] <TB3> INFO: Test took 1190ms.
[18:03:28.341] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:28.647] <TB3> INFO: Expecting 2560 events.
[18:03:29.532] <TB3> INFO: 2560 events read in total (293ms).
[18:03:29.532] <TB3> INFO: Test took 1191ms.
[18:03:29.534] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:29.841] <TB3> INFO: Expecting 2560 events.
[18:03:30.723] <TB3> INFO: 2560 events read in total (291ms).
[18:03:30.723] <TB3> INFO: Test took 1189ms.
[18:03:30.725] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:31.031] <TB3> INFO: Expecting 2560 events.
[18:03:31.915] <TB3> INFO: 2560 events read in total (292ms).
[18:03:31.915] <TB3> INFO: Test took 1190ms.
[18:03:31.917] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:32.223] <TB3> INFO: Expecting 2560 events.
[18:03:33.108] <TB3> INFO: 2560 events read in total (294ms).
[18:03:33.108] <TB3> INFO: Test took 1191ms.
[18:03:33.110] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:33.416] <TB3> INFO: Expecting 2560 events.
[18:03:34.299] <TB3> INFO: 2560 events read in total (291ms).
[18:03:34.299] <TB3> INFO: Test took 1189ms.
[18:03:34.301] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:34.607] <TB3> INFO: Expecting 2560 events.
[18:03:35.491] <TB3> INFO: 2560 events read in total (292ms).
[18:03:35.492] <TB3> INFO: Test took 1191ms.
[18:03:35.493] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:35.800] <TB3> INFO: Expecting 2560 events.
[18:03:36.678] <TB3> INFO: 2560 events read in total (286ms).
[18:03:36.678] <TB3> INFO: Test took 1185ms.
[18:03:36.680] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:36.987] <TB3> INFO: Expecting 2560 events.
[18:03:37.865] <TB3> INFO: 2560 events read in total (287ms).
[18:03:37.866] <TB3> INFO: Test took 1186ms.
[18:03:37.867] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:38.174] <TB3> INFO: Expecting 2560 events.
[18:03:39.055] <TB3> INFO: 2560 events read in total (289ms).
[18:03:39.055] <TB3> INFO: Test took 1188ms.
[18:03:39.057] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:39.364] <TB3> INFO: Expecting 2560 events.
[18:03:40.241] <TB3> INFO: 2560 events read in total (286ms).
[18:03:40.241] <TB3> INFO: Test took 1184ms.
[18:03:40.242] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:40.549] <TB3> INFO: Expecting 2560 events.
[18:03:41.427] <TB3> INFO: 2560 events read in total (286ms).
[18:03:41.427] <TB3> INFO: Test took 1185ms.
[18:03:41.429] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:41.735] <TB3> INFO: Expecting 2560 events.
[18:03:42.614] <TB3> INFO: 2560 events read in total (287ms).
[18:03:42.614] <TB3> INFO: Test took 1185ms.
[18:03:42.616] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:42.923] <TB3> INFO: Expecting 2560 events.
[18:03:43.801] <TB3> INFO: 2560 events read in total (287ms).
[18:03:43.802] <TB3> INFO: Test took 1186ms.
[18:03:43.804] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:44.110] <TB3> INFO: Expecting 2560 events.
[18:03:44.987] <TB3> INFO: 2560 events read in total (286ms).
[18:03:44.987] <TB3> INFO: Test took 1183ms.
[18:03:44.989] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:45.295] <TB3> INFO: Expecting 2560 events.
[18:03:46.176] <TB3> INFO: 2560 events read in total (289ms).
[18:03:46.176] <TB3> INFO: Test took 1187ms.
[18:03:46.178] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:46.484] <TB3> INFO: Expecting 2560 events.
[18:03:47.363] <TB3> INFO: 2560 events read in total (287ms).
[18:03:47.363] <TB3> INFO: Test took 1185ms.
[18:03:47.365] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:47.672] <TB3> INFO: Expecting 2560 events.
[18:03:48.550] <TB3> INFO: 2560 events read in total (287ms).
[18:03:48.550] <TB3> INFO: Test took 1185ms.
[18:03:48.552] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:48.858] <TB3> INFO: Expecting 2560 events.
[18:03:49.736] <TB3> INFO: 2560 events read in total (286ms).
[18:03:49.737] <TB3> INFO: Test took 1185ms.
[18:03:49.738] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:50.045] <TB3> INFO: Expecting 2560 events.
[18:03:50.923] <TB3> INFO: 2560 events read in total (286ms).
[18:03:50.923] <TB3> INFO: Test took 1185ms.
[18:03:50.925] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:51.231] <TB3> INFO: Expecting 2560 events.
[18:03:52.110] <TB3> INFO: 2560 events read in total (287ms).
[18:03:52.110] <TB3> INFO: Test took 1185ms.
[18:03:52.112] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:52.419] <TB3> INFO: Expecting 2560 events.
[18:03:53.299] <TB3> INFO: 2560 events read in total (289ms).
[18:03:53.300] <TB3> INFO: Test took 1188ms.
[18:03:53.301] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:53.608] <TB3> INFO: Expecting 2560 events.
[18:03:54.487] <TB3> INFO: 2560 events read in total (287ms).
[18:03:54.487] <TB3> INFO: Test took 1186ms.
[18:03:54.489] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:54.795] <TB3> INFO: Expecting 2560 events.
[18:03:55.683] <TB3> INFO: 2560 events read in total (296ms).
[18:03:55.683] <TB3> INFO: Test took 1194ms.
[18:03:55.685] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:55.991] <TB3> INFO: Expecting 2560 events.
[18:03:56.874] <TB3> INFO: 2560 events read in total (291ms).
[18:03:56.874] <TB3> INFO: Test took 1190ms.
[18:03:56.875] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:57.182] <TB3> INFO: Expecting 2560 events.
[18:03:58.066] <TB3> INFO: 2560 events read in total (292ms).
[18:03:58.067] <TB3> INFO: Test took 1192ms.
[18:03:58.068] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:58.375] <TB3> INFO: Expecting 2560 events.
[18:03:59.260] <TB3> INFO: 2560 events read in total (293ms).
[18:03:59.260] <TB3> INFO: Test took 1192ms.
[18:03:59.262] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:03:59.569] <TB3> INFO: Expecting 2560 events.
[18:04:00.450] <TB3> INFO: 2560 events read in total (290ms).
[18:04:00.451] <TB3> INFO: Test took 1189ms.
[18:04:00.452] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:04:00.759] <TB3> INFO: Expecting 2560 events.
[18:04:01.642] <TB3> INFO: 2560 events read in total (291ms).
[18:04:01.642] <TB3> INFO: Test took 1190ms.
[18:04:01.644] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:04:01.950] <TB3> INFO: Expecting 2560 events.
[18:04:02.832] <TB3> INFO: 2560 events read in total (290ms).
[18:04:02.832] <TB3> INFO: Test took 1189ms.
[18:04:02.834] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:04:03.141] <TB3> INFO: Expecting 2560 events.
[18:04:04.026] <TB3> INFO: 2560 events read in total (294ms).
[18:04:04.026] <TB3> INFO: Test took 1192ms.
[18:04:04.490] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 631 seconds
[18:04:04.490] <TB3> INFO: PH scale (per ROC): 48 68 61 61 49 64 37 48 59 46 49 64 59 61 70 53
[18:04:04.490] <TB3> INFO: PH offset (per ROC): 109 127 124 126 99 112 106 131 119 115 144 131 122 133 118 128
[18:04:04.495] <TB3> INFO: Decoding statistics:
[18:04:04.495] <TB3> INFO: General information:
[18:04:04.495] <TB3> INFO: 16bit words read: 127890
[18:04:04.495] <TB3> INFO: valid events total: 20480
[18:04:04.495] <TB3> INFO: empty events: 17975
[18:04:04.495] <TB3> INFO: valid events with pixels: 2505
[18:04:04.495] <TB3> INFO: valid pixel hits: 2505
[18:04:04.495] <TB3> INFO: Event errors: 0
[18:04:04.495] <TB3> INFO: start marker: 0
[18:04:04.495] <TB3> INFO: stop marker: 0
[18:04:04.495] <TB3> INFO: overflow: 0
[18:04:04.495] <TB3> INFO: invalid 5bit words: 0
[18:04:04.495] <TB3> INFO: invalid XOR eye diagram: 0
[18:04:04.495] <TB3> INFO: frame (failed synchr.): 0
[18:04:04.495] <TB3> INFO: idle data (no TBM trl): 0
[18:04:04.495] <TB3> INFO: no data (only TBM hdr): 0
[18:04:04.495] <TB3> INFO: TBM errors: 0
[18:04:04.495] <TB3> INFO: flawed TBM headers: 0
[18:04:04.495] <TB3> INFO: flawed TBM trailers: 0
[18:04:04.495] <TB3> INFO: event ID mismatches: 0
[18:04:04.495] <TB3> INFO: ROC errors: 0
[18:04:04.495] <TB3> INFO: missing ROC header(s): 0
[18:04:04.495] <TB3> INFO: misplaced readback start: 0
[18:04:04.495] <TB3> INFO: Pixel decoding errors: 0
[18:04:04.495] <TB3> INFO: pixel data incomplete: 0
[18:04:04.495] <TB3> INFO: pixel address: 0
[18:04:04.495] <TB3> INFO: pulse height fill bit: 0
[18:04:04.495] <TB3> INFO: buffer corruption: 0
[18:04:04.760] <TB3> INFO: ######################################################################
[18:04:04.760] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:04:04.760] <TB3> INFO: ######################################################################
[18:04:04.771] <TB3> INFO: scanning low vcal = 10
[18:04:05.006] <TB3> INFO: Expecting 41600 events.
[18:04:08.579] <TB3> INFO: 41600 events read in total (2981ms).
[18:04:08.579] <TB3> INFO: Test took 3808ms.
[18:04:08.581] <TB3> INFO: scanning low vcal = 20
[18:04:08.878] <TB3> INFO: Expecting 41600 events.
[18:04:12.448] <TB3> INFO: 41600 events read in total (2978ms).
[18:04:12.448] <TB3> INFO: Test took 3867ms.
[18:04:12.450] <TB3> INFO: scanning low vcal = 30
[18:04:12.749] <TB3> INFO: Expecting 41600 events.
[18:04:16.356] <TB3> INFO: 41600 events read in total (3015ms).
[18:04:16.357] <TB3> INFO: Test took 3907ms.
[18:04:16.360] <TB3> INFO: scanning low vcal = 40
[18:04:16.639] <TB3> INFO: Expecting 41600 events.
[18:04:20.552] <TB3> INFO: 41600 events read in total (3321ms).
[18:04:20.553] <TB3> INFO: Test took 4193ms.
[18:04:20.555] <TB3> INFO: scanning low vcal = 50
[18:04:20.839] <TB3> INFO: Expecting 41600 events.
[18:04:24.775] <TB3> INFO: 41600 events read in total (3345ms).
[18:04:24.776] <TB3> INFO: Test took 4220ms.
[18:04:24.779] <TB3> INFO: scanning low vcal = 60
[18:04:25.055] <TB3> INFO: Expecting 41600 events.
[18:04:28.977] <TB3> INFO: 41600 events read in total (3330ms).
[18:04:28.978] <TB3> INFO: Test took 4199ms.
[18:04:28.981] <TB3> INFO: scanning low vcal = 70
[18:04:29.257] <TB3> INFO: Expecting 41600 events.
[18:04:33.192] <TB3> INFO: 41600 events read in total (3343ms).
[18:04:33.193] <TB3> INFO: Test took 4212ms.
[18:04:33.195] <TB3> INFO: scanning low vcal = 80
[18:04:33.472] <TB3> INFO: Expecting 41600 events.
[18:04:37.397] <TB3> INFO: 41600 events read in total (3333ms).
[18:04:37.397] <TB3> INFO: Test took 4201ms.
[18:04:37.400] <TB3> INFO: scanning low vcal = 90
[18:04:37.677] <TB3> INFO: Expecting 41600 events.
[18:04:41.621] <TB3> INFO: 41600 events read in total (3353ms).
[18:04:41.621] <TB3> INFO: Test took 4221ms.
[18:04:41.624] <TB3> INFO: scanning low vcal = 100
[18:04:41.901] <TB3> INFO: Expecting 41600 events.
[18:04:45.813] <TB3> INFO: 41600 events read in total (3321ms).
[18:04:45.814] <TB3> INFO: Test took 4190ms.
[18:04:45.816] <TB3> INFO: scanning low vcal = 110
[18:04:46.093] <TB3> INFO: Expecting 41600 events.
[18:04:50.023] <TB3> INFO: 41600 events read in total (3338ms).
[18:04:50.024] <TB3> INFO: Test took 4207ms.
[18:04:50.027] <TB3> INFO: scanning low vcal = 120
[18:04:50.303] <TB3> INFO: Expecting 41600 events.
[18:04:54.216] <TB3> INFO: 41600 events read in total (3321ms).
[18:04:54.217] <TB3> INFO: Test took 4190ms.
[18:04:54.220] <TB3> INFO: scanning low vcal = 130
[18:04:54.497] <TB3> INFO: Expecting 41600 events.
[18:04:58.423] <TB3> INFO: 41600 events read in total (3335ms).
[18:04:58.424] <TB3> INFO: Test took 4204ms.
[18:04:58.426] <TB3> INFO: scanning low vcal = 140
[18:04:58.703] <TB3> INFO: Expecting 41600 events.
[18:05:02.661] <TB3> INFO: 41600 events read in total (3367ms).
[18:05:02.662] <TB3> INFO: Test took 4235ms.
[18:05:02.665] <TB3> INFO: scanning low vcal = 150
[18:05:02.941] <TB3> INFO: Expecting 41600 events.
[18:05:06.859] <TB3> INFO: 41600 events read in total (3326ms).
[18:05:06.859] <TB3> INFO: Test took 4194ms.
[18:05:06.863] <TB3> INFO: scanning low vcal = 160
[18:05:07.139] <TB3> INFO: Expecting 41600 events.
[18:05:11.062] <TB3> INFO: 41600 events read in total (3332ms).
[18:05:11.063] <TB3> INFO: Test took 4200ms.
[18:05:11.066] <TB3> INFO: scanning low vcal = 170
[18:05:11.342] <TB3> INFO: Expecting 41600 events.
[18:05:15.323] <TB3> INFO: 41600 events read in total (3389ms).
[18:05:15.324] <TB3> INFO: Test took 4258ms.
[18:05:15.327] <TB3> INFO: scanning low vcal = 180
[18:05:15.604] <TB3> INFO: Expecting 41600 events.
[18:05:19.562] <TB3> INFO: 41600 events read in total (3367ms).
[18:05:19.563] <TB3> INFO: Test took 4236ms.
[18:05:19.565] <TB3> INFO: scanning low vcal = 190
[18:05:19.842] <TB3> INFO: Expecting 41600 events.
[18:05:23.762] <TB3> INFO: 41600 events read in total (3329ms).
[18:05:23.762] <TB3> INFO: Test took 4197ms.
[18:05:23.765] <TB3> INFO: scanning low vcal = 200
[18:05:24.041] <TB3> INFO: Expecting 41600 events.
[18:05:27.985] <TB3> INFO: 41600 events read in total (3352ms).
[18:05:27.987] <TB3> INFO: Test took 4222ms.
[18:05:27.990] <TB3> INFO: scanning low vcal = 210
[18:05:28.267] <TB3> INFO: Expecting 41600 events.
[18:05:32.188] <TB3> INFO: 41600 events read in total (3330ms).
[18:05:32.189] <TB3> INFO: Test took 4199ms.
[18:05:32.191] <TB3> INFO: scanning low vcal = 220
[18:05:32.468] <TB3> INFO: Expecting 41600 events.
[18:05:36.390] <TB3> INFO: 41600 events read in total (3330ms).
[18:05:36.391] <TB3> INFO: Test took 4200ms.
[18:05:36.394] <TB3> INFO: scanning low vcal = 230
[18:05:36.670] <TB3> INFO: Expecting 41600 events.
[18:05:40.618] <TB3> INFO: 41600 events read in total (3356ms).
[18:05:40.619] <TB3> INFO: Test took 4225ms.
[18:05:40.622] <TB3> INFO: scanning low vcal = 240
[18:05:40.899] <TB3> INFO: Expecting 41600 events.
[18:05:44.829] <TB3> INFO: 41600 events read in total (3339ms).
[18:05:44.829] <TB3> INFO: Test took 4207ms.
[18:05:44.832] <TB3> INFO: scanning low vcal = 250
[18:05:45.109] <TB3> INFO: Expecting 41600 events.
[18:05:49.072] <TB3> INFO: 41600 events read in total (3372ms).
[18:05:49.073] <TB3> INFO: Test took 4241ms.
[18:05:49.077] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[18:05:49.352] <TB3> INFO: Expecting 41600 events.
[18:05:53.303] <TB3> INFO: 41600 events read in total (3359ms).
[18:05:53.304] <TB3> INFO: Test took 4227ms.
[18:05:53.306] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[18:05:53.583] <TB3> INFO: Expecting 41600 events.
[18:05:57.494] <TB3> INFO: 41600 events read in total (3320ms).
[18:05:57.495] <TB3> INFO: Test took 4188ms.
[18:05:57.497] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[18:05:57.774] <TB3> INFO: Expecting 41600 events.
[18:06:01.733] <TB3> INFO: 41600 events read in total (3368ms).
[18:06:01.734] <TB3> INFO: Test took 4237ms.
[18:06:01.737] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[18:06:02.013] <TB3> INFO: Expecting 41600 events.
[18:06:05.921] <TB3> INFO: 41600 events read in total (3316ms).
[18:06:05.922] <TB3> INFO: Test took 4185ms.
[18:06:05.925] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:06:06.201] <TB3> INFO: Expecting 41600 events.
[18:06:10.128] <TB3> INFO: 41600 events read in total (3335ms).
[18:06:10.128] <TB3> INFO: Test took 4203ms.
[18:06:10.539] <TB3> INFO: PixTestGainPedestal::measure() done
[18:06:53.524] <TB3> INFO: PixTestGainPedestal::fit() done
[18:06:53.524] <TB3> INFO: non-linearity mean: 0.942 0.986 0.981 0.981 0.971 0.983 0.978 0.979 0.982 0.922 0.979 0.981 0.984 0.979 0.985 0.981
[18:06:53.524] <TB3> INFO: non-linearity RMS: 0.056 0.004 0.003 0.004 0.013 0.003 0.191 0.005 0.004 0.071 0.004 0.003 0.003 0.005 0.005 0.003
[18:06:53.524] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[18:06:53.539] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[18:06:53.552] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[18:06:53.566] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[18:06:53.580] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[18:06:53.594] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[18:06:53.608] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[18:06:53.622] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[18:06:53.636] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[18:06:53.651] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[18:06:53.668] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[18:06:53.688] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[18:06:53.709] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[18:06:53.728] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[18:06:53.747] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[18:06:53.766] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1125_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[18:06:53.784] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 169 seconds
[18:06:53.784] <TB3> INFO: Decoding statistics:
[18:06:53.784] <TB3> INFO: General information:
[18:06:53.784] <TB3> INFO: 16bit words read: 3327920
[18:06:53.784] <TB3> INFO: valid events total: 332800
[18:06:53.784] <TB3> INFO: empty events: 0
[18:06:53.784] <TB3> INFO: valid events with pixels: 332800
[18:06:53.784] <TB3> INFO: valid pixel hits: 665560
[18:06:53.784] <TB3> INFO: Event errors: 0
[18:06:53.784] <TB3> INFO: start marker: 0
[18:06:53.784] <TB3> INFO: stop marker: 0
[18:06:53.784] <TB3> INFO: overflow: 0
[18:06:53.784] <TB3> INFO: invalid 5bit words: 0
[18:06:53.784] <TB3> INFO: invalid XOR eye diagram: 0
[18:06:53.785] <TB3> INFO: frame (failed synchr.): 0
[18:06:53.785] <TB3> INFO: idle data (no TBM trl): 0
[18:06:53.785] <TB3> INFO: no data (only TBM hdr): 0
[18:06:53.785] <TB3> INFO: TBM errors: 0
[18:06:53.785] <TB3> INFO: flawed TBM headers: 0
[18:06:53.785] <TB3> INFO: flawed TBM trailers: 0
[18:06:53.785] <TB3> INFO: event ID mismatches: 0
[18:06:53.785] <TB3> INFO: ROC errors: 0
[18:06:53.785] <TB3> INFO: missing ROC header(s): 0
[18:06:53.785] <TB3> INFO: misplaced readback start: 0
[18:06:53.785] <TB3> INFO: Pixel decoding errors: 0
[18:06:53.785] <TB3> INFO: pixel data incomplete: 0
[18:06:53.785] <TB3> INFO: pixel address: 0
[18:06:53.785] <TB3> INFO: pulse height fill bit: 0
[18:06:53.785] <TB3> INFO: buffer corruption: 0
[18:06:53.803] <TB3> INFO: Decoding statistics:
[18:06:53.803] <TB3> INFO: General information:
[18:06:53.803] <TB3> INFO: 16bit words read: 3457346
[18:06:53.803] <TB3> INFO: valid events total: 353536
[18:06:53.803] <TB3> INFO: empty events: 18231
[18:06:53.804] <TB3> INFO: valid events with pixels: 335305
[18:06:53.804] <TB3> INFO: valid pixel hits: 668065
[18:06:53.804] <TB3> INFO: Event errors: 0
[18:06:53.804] <TB3> INFO: start marker: 0
[18:06:53.804] <TB3> INFO: stop marker: 0
[18:06:53.804] <TB3> INFO: overflow: 0
[18:06:53.804] <TB3> INFO: invalid 5bit words: 0
[18:06:53.804] <TB3> INFO: invalid XOR eye diagram: 0
[18:06:53.804] <TB3> INFO: frame (failed synchr.): 0
[18:06:53.804] <TB3> INFO: idle data (no TBM trl): 0
[18:06:53.804] <TB3> INFO: no data (only TBM hdr): 0
[18:06:53.804] <TB3> INFO: TBM errors: 0
[18:06:53.804] <TB3> INFO: flawed TBM headers: 0
[18:06:53.804] <TB3> INFO: flawed TBM trailers: 0
[18:06:53.804] <TB3> INFO: event ID mismatches: 0
[18:06:53.804] <TB3> INFO: ROC errors: 0
[18:06:53.804] <TB3> INFO: missing ROC header(s): 0
[18:06:53.804] <TB3> INFO: misplaced readback start: 0
[18:06:53.804] <TB3> INFO: Pixel decoding errors: 0
[18:06:53.804] <TB3> INFO: pixel data incomplete: 0
[18:06:53.804] <TB3> INFO: pixel address: 0
[18:06:53.804] <TB3> INFO: pulse height fill bit: 0
[18:06:53.804] <TB3> INFO: buffer corruption: 0
[18:06:53.804] <TB3> INFO: enter test to run
[18:06:53.804] <TB3> INFO: test: exit no parameter change
[18:06:53.854] <TB3> QUIET: Connection to board 170 closed.
[18:06:53.855] <TB3> INFO: pXar: this is the end, my friend