[12:15:51.290] <TB3> INFO: *** Welcome to pxar ***
[12:15:51.290] <TB3> INFO: *** Today: 2016/11/07
[12:15:51.296] <TB3> INFO: *** Version: c8ba-dirty
[12:15:51.296] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C15.dat
[12:15:51.296] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//tbmParameters_C1b.dat
[12:15:51.297] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//defaultMaskFile.dat
[12:15:51.297] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters_C15.dat
[12:15:51.353] <TB3> INFO: clk: 4
[12:15:51.353] <TB3> INFO: ctr: 4
[12:15:51.353] <TB3> INFO: sda: 19
[12:15:51.353] <TB3> INFO: tin: 9
[12:15:51.353] <TB3> INFO: level: 15
[12:15:51.353] <TB3> INFO: triggerdelay: 0
[12:15:51.353] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[12:15:51.353] <TB3> INFO: Log level: INFO
[12:15:51.361] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:15:51.376] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:15:51.378] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[12:15:51.379] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[12:15:52.865] <TB3> INFO: DUT info:
[12:15:52.865] <TB3> INFO: The DUT currently contains the following objects:
[12:15:52.865] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[12:15:52.865] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:15:52.865] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:15:52.865] <TB3> INFO: TBM Core alpha (2): 7 registers set
[12:15:52.865] <TB3> INFO: TBM Core beta (3): 7 registers set
[12:15:52.865] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:15:52.865] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.865] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.866] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.866] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.866] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.866] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.866] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.866] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:52.866] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:15:53.266] <TB3> INFO: enter 'restricted' command line mode
[12:15:53.266] <TB3> INFO: enter test to run
[12:15:53.266] <TB3> INFO: test: pretest no parameter change
[12:15:53.266] <TB3> INFO: running: pretest
[12:15:53.913] <TB3> INFO: ######################################################################
[12:15:53.914] <TB3> INFO: PixTestPretest::doTest()
[12:15:53.914] <TB3> INFO: ######################################################################
[12:15:53.915] <TB3> INFO: ----------------------------------------------------------------------
[12:15:53.915] <TB3> INFO: PixTestPretest::programROC()
[12:15:53.915] <TB3> INFO: ----------------------------------------------------------------------
[12:16:11.928] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:16:11.928] <TB3> INFO: IA differences per ROC: 20.9 19.3 18.5 19.3 19.3 18.5 18.5 18.5 18.5 18.5 16.9 18.5 19.3 20.1 19.3 20.9
[12:16:11.965] <TB3> INFO: ----------------------------------------------------------------------
[12:16:11.965] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:16:11.965] <TB3> INFO: ----------------------------------------------------------------------
[12:16:16.736] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 384.3 mA = 24.0187 mA/ROC
[12:16:16.737] <TB3> INFO: i(loss) [mA/ROC]: 20.1 19.3 19.3 20.1 20.1 19.3 19.3 19.3 20.1 19.3 20.1 19.3 18.5 19.3 19.3 19.3
[12:16:16.766] <TB3> INFO: ----------------------------------------------------------------------
[12:16:16.766] <TB3> INFO: PixTestPretest::findTiming()
[12:16:16.766] <TB3> INFO: ----------------------------------------------------------------------
[12:16:16.766] <TB3> INFO: PixTestCmd::init()

[12:16:47.935] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:16:47.935] <TB3> INFO: (success/tries = 100/100), width = 3
[12:16:49.434] <TB3> INFO: ----------------------------------------------------------------------
[12:16:49.434] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:16:49.434] <TB3> INFO: ----------------------------------------------------------------------
[12:16:49.525] <TB3> INFO: Expecting 231680 events.
[12:16:59.248] <TB3> INFO: 231680 events read in total (9131ms).
[12:16:59.255] <TB3> INFO: Test took 9819ms.
[12:16:59.499] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:16:59.531] <TB3> INFO: ----------------------------------------------------------------------
[12:16:59.531] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:16:59.531] <TB3> INFO: ----------------------------------------------------------------------
[12:16:59.622] <TB3> INFO: Expecting 231680 events.
[12:17:09.323] <TB3> INFO: 231680 events read in total (9109ms).
[12:17:09.330] <TB3> INFO: Test took 9796ms.
[12:17:09.587] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:17:09.587] <TB3> INFO: CalDel: 94 106 118 112 101 101 107 112 120 138 127 126 127 115 119 135
[12:17:09.587] <TB3> INFO: VthrComp: 54 51 51 51 51 51 51 56 52 51 54 52 51 51 52 51
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C0.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C1.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C2.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C3.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C4.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C5.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C6.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C7.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C8.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C9.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C10.dat
[12:17:09.590] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C11.dat
[12:17:09.591] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C12.dat
[12:17:09.591] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C13.dat
[12:17:09.591] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C14.dat
[12:17:09.591] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters_C15.dat
[12:17:09.591] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//tbmParameters_C0a.dat
[12:17:09.591] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//tbmParameters_C0b.dat
[12:17:09.591] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//tbmParameters_C1a.dat
[12:17:09.591] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//tbmParameters_C1b.dat
[12:17:09.591] <TB3> INFO: PixTestPretest::doTest() done, duration: 76 seconds
[12:17:09.686] <TB3> INFO: enter test to run
[12:17:09.686] <TB3> INFO: test: FullTest no parameter change
[12:17:09.686] <TB3> INFO: running: fulltest
[12:17:09.686] <TB3> INFO: ######################################################################
[12:17:09.686] <TB3> INFO: PixTestFullTest::doTest()
[12:17:09.686] <TB3> INFO: ######################################################################
[12:17:09.687] <TB3> INFO: ######################################################################
[12:17:09.688] <TB3> INFO: PixTestAlive::doTest()
[12:17:09.688] <TB3> INFO: ######################################################################
[12:17:09.689] <TB3> INFO: ----------------------------------------------------------------------
[12:17:09.689] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:17:09.689] <TB3> INFO: ----------------------------------------------------------------------
[12:17:09.922] <TB3> INFO: Expecting 41600 events.
[12:17:13.343] <TB3> INFO: 41600 events read in total (2829ms).
[12:17:13.343] <TB3> INFO: Test took 3653ms.
[12:17:13.571] <TB3> INFO: PixTestAlive::aliveTest() done
[12:17:13.571] <TB3> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0
[12:17:13.572] <TB3> INFO: ----------------------------------------------------------------------
[12:17:13.572] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:17:13.572] <TB3> INFO: ----------------------------------------------------------------------
[12:17:13.807] <TB3> INFO: Expecting 41600 events.
[12:17:16.804] <TB3> INFO: 41600 events read in total (2406ms).
[12:17:16.805] <TB3> INFO: Test took 3230ms.
[12:17:16.805] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:17:17.046] <TB3> INFO: PixTestAlive::maskTest() done
[12:17:17.046] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:17:17.047] <TB3> INFO: ----------------------------------------------------------------------
[12:17:17.047] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:17:17.047] <TB3> INFO: ----------------------------------------------------------------------
[12:17:17.280] <TB3> INFO: Expecting 41600 events.
[12:17:20.789] <TB3> INFO: 41600 events read in total (2917ms).
[12:17:20.790] <TB3> INFO: Test took 3741ms.
[12:17:21.017] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:17:21.017] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:17:21.017] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:17:21.017] <TB3> INFO: Decoding statistics:
[12:17:21.017] <TB3> INFO: General information:
[12:17:21.017] <TB3> INFO: 16bit words read: 0
[12:17:21.017] <TB3> INFO: valid events total: 0
[12:17:21.017] <TB3> INFO: empty events: 0
[12:17:21.017] <TB3> INFO: valid events with pixels: 0
[12:17:21.017] <TB3> INFO: valid pixel hits: 0
[12:17:21.017] <TB3> INFO: Event errors: 0
[12:17:21.017] <TB3> INFO: start marker: 0
[12:17:21.017] <TB3> INFO: stop marker: 0
[12:17:21.017] <TB3> INFO: overflow: 0
[12:17:21.017] <TB3> INFO: invalid 5bit words: 0
[12:17:21.017] <TB3> INFO: invalid XOR eye diagram: 0
[12:17:21.017] <TB3> INFO: frame (failed synchr.): 0
[12:17:21.017] <TB3> INFO: idle data (no TBM trl): 0
[12:17:21.017] <TB3> INFO: no data (only TBM hdr): 0
[12:17:21.017] <TB3> INFO: TBM errors: 0
[12:17:21.017] <TB3> INFO: flawed TBM headers: 0
[12:17:21.017] <TB3> INFO: flawed TBM trailers: 0
[12:17:21.017] <TB3> INFO: event ID mismatches: 0
[12:17:21.017] <TB3> INFO: ROC errors: 0
[12:17:21.017] <TB3> INFO: missing ROC header(s): 0
[12:17:21.017] <TB3> INFO: misplaced readback start: 0
[12:17:21.017] <TB3> INFO: Pixel decoding errors: 0
[12:17:21.017] <TB3> INFO: pixel data incomplete: 0
[12:17:21.017] <TB3> INFO: pixel address: 0
[12:17:21.017] <TB3> INFO: pulse height fill bit: 0
[12:17:21.017] <TB3> INFO: buffer corruption: 0
[12:17:21.027] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C15.dat
[12:17:21.027] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[12:17:21.027] <TB3> INFO: ######################################################################
[12:17:21.027] <TB3> INFO: PixTestReadback::doTest()
[12:17:21.027] <TB3> INFO: ######################################################################
[12:17:21.027] <TB3> INFO: ----------------------------------------------------------------------
[12:17:21.027] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:17:21.027] <TB3> INFO: ----------------------------------------------------------------------
[12:17:30.990] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C0.dat
[12:17:30.990] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C1.dat
[12:17:30.990] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C2.dat
[12:17:30.990] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C3.dat
[12:17:30.990] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C4.dat
[12:17:30.990] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C5.dat
[12:17:30.990] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C6.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C7.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C8.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C9.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C10.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C11.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C12.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C13.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C14.dat
[12:17:30.991] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C15.dat
[12:17:31.019] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:17:31.019] <TB3> INFO: ----------------------------------------------------------------------
[12:17:31.019] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:17:31.019] <TB3> INFO: ----------------------------------------------------------------------
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C0.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C1.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C2.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C3.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C4.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C5.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C6.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C7.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C8.dat
[12:17:40.911] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C9.dat
[12:17:40.912] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C10.dat
[12:17:40.912] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C11.dat
[12:17:40.912] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C12.dat
[12:17:40.912] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C13.dat
[12:17:40.912] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C14.dat
[12:17:40.912] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C15.dat
[12:17:40.940] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:17:40.940] <TB3> INFO: ----------------------------------------------------------------------
[12:17:40.940] <TB3> INFO: PixTestReadback::readbackVbg()
[12:17:40.940] <TB3> INFO: ----------------------------------------------------------------------
[12:17:48.581] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:17:48.581] <TB3> INFO: ----------------------------------------------------------------------
[12:17:48.581] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:17:48.581] <TB3> INFO: ----------------------------------------------------------------------
[12:17:48.581] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 164.1calibrated Vbg = 1.16495 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.8calibrated Vbg = 1.15362 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 159.1calibrated Vbg = 1.15881 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151calibrated Vbg = 1.1544 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.8calibrated Vbg = 1.15761 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.5calibrated Vbg = 1.15784 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 162.3calibrated Vbg = 1.16022 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.5calibrated Vbg = 1.15798 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.4calibrated Vbg = 1.16214 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 146calibrated Vbg = 1.15999 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 157.1calibrated Vbg = 1.14931 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 163.6calibrated Vbg = 1.1507 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 161.5calibrated Vbg = 1.15668 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.7calibrated Vbg = 1.15928 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.6calibrated Vbg = 1.16156 :::*/*/*/*/
[12:17:48.581] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150calibrated Vbg = 1.15819 :::*/*/*/*/
[12:17:48.583] <TB3> INFO: ----------------------------------------------------------------------
[12:17:48.583] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:17:48.583] <TB3> INFO: ----------------------------------------------------------------------
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C0.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C1.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C2.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C3.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C4.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C5.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C6.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C7.dat
[12:20:28.881] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C8.dat
[12:20:28.882] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C9.dat
[12:20:28.882] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C10.dat
[12:20:28.882] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C11.dat
[12:20:28.882] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C12.dat
[12:20:28.882] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C13.dat
[12:20:28.882] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C14.dat
[12:20:28.882] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//readbackCal_C15.dat
[12:20:28.908] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:20:28.909] <TB3> INFO: PixTestReadback::doTest() done
[12:20:28.909] <TB3> INFO: Decoding statistics:
[12:20:28.909] <TB3> INFO: General information:
[12:20:28.909] <TB3> INFO: 16bit words read: 1536
[12:20:28.909] <TB3> INFO: valid events total: 256
[12:20:28.909] <TB3> INFO: empty events: 256
[12:20:28.909] <TB3> INFO: valid events with pixels: 0
[12:20:28.909] <TB3> INFO: valid pixel hits: 0
[12:20:28.909] <TB3> INFO: Event errors: 0
[12:20:28.909] <TB3> INFO: start marker: 0
[12:20:28.909] <TB3> INFO: stop marker: 0
[12:20:28.909] <TB3> INFO: overflow: 0
[12:20:28.909] <TB3> INFO: invalid 5bit words: 0
[12:20:28.909] <TB3> INFO: invalid XOR eye diagram: 0
[12:20:28.909] <TB3> INFO: frame (failed synchr.): 0
[12:20:28.909] <TB3> INFO: idle data (no TBM trl): 0
[12:20:28.909] <TB3> INFO: no data (only TBM hdr): 0
[12:20:28.909] <TB3> INFO: TBM errors: 0
[12:20:28.909] <TB3> INFO: flawed TBM headers: 0
[12:20:28.909] <TB3> INFO: flawed TBM trailers: 0
[12:20:28.909] <TB3> INFO: event ID mismatches: 0
[12:20:28.909] <TB3> INFO: ROC errors: 0
[12:20:28.910] <TB3> INFO: missing ROC header(s): 0
[12:20:28.910] <TB3> INFO: misplaced readback start: 0
[12:20:28.910] <TB3> INFO: Pixel decoding errors: 0
[12:20:28.910] <TB3> INFO: pixel data incomplete: 0
[12:20:28.910] <TB3> INFO: pixel address: 0
[12:20:28.910] <TB3> INFO: pulse height fill bit: 0
[12:20:28.910] <TB3> INFO: buffer corruption: 0
[12:20:28.942] <TB3> INFO: ######################################################################
[12:20:28.942] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:20:28.942] <TB3> INFO: ######################################################################
[12:20:28.945] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:20:28.959] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:20:28.959] <TB3> INFO: run 1 of 1
[12:20:29.190] <TB3> INFO: Expecting 3120000 events.
[12:20:59.406] <TB3> INFO: 654240 events read in total (29624ms).











[12:21:28.641] <TB3> INFO: 1304165 events read in total (58859ms).











[12:21:57.889] <TB3> INFO: 1953675 events read in total (88107ms).











[12:22:27.813] <TB3> INFO: 2605600 events read in total (118031ms).











[12:22:50.908] <TB3> INFO: 3120000 events read in total (141126ms).
[12:22:50.982] <TB3> INFO: Test took 142024ms.
[12:23:17.149] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 168 seconds
[12:23:17.149] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0
[12:23:17.149] <TB3> INFO: separation cut (per ROC): 110 91 91 92 105 105 100 104 99 86 91 98 101 102 110 81
[12:23:17.149] <TB3> INFO: Decoding statistics:
[12:23:17.149] <TB3> INFO: General information:
[12:23:17.149] <TB3> INFO: 16bit words read: 0
[12:23:17.149] <TB3> INFO: valid events total: 0
[12:23:17.149] <TB3> INFO: empty events: 0
[12:23:17.149] <TB3> INFO: valid events with pixels: 0
[12:23:17.149] <TB3> INFO: valid pixel hits: 0
[12:23:17.149] <TB3> INFO: Event errors: 0
[12:23:17.149] <TB3> INFO: start marker: 0
[12:23:17.149] <TB3> INFO: stop marker: 0
[12:23:17.149] <TB3> INFO: overflow: 0
[12:23:17.149] <TB3> INFO: invalid 5bit words: 0
[12:23:17.149] <TB3> INFO: invalid XOR eye diagram: 0
[12:23:17.149] <TB3> INFO: frame (failed synchr.): 0
[12:23:17.149] <TB3> INFO: idle data (no TBM trl): 0
[12:23:17.149] <TB3> INFO: no data (only TBM hdr): 0
[12:23:17.149] <TB3> INFO: TBM errors: 0
[12:23:17.149] <TB3> INFO: flawed TBM headers: 0
[12:23:17.149] <TB3> INFO: flawed TBM trailers: 0
[12:23:17.149] <TB3> INFO: event ID mismatches: 0
[12:23:17.149] <TB3> INFO: ROC errors: 0
[12:23:17.149] <TB3> INFO: missing ROC header(s): 0
[12:23:17.149] <TB3> INFO: misplaced readback start: 0
[12:23:17.149] <TB3> INFO: Pixel decoding errors: 0
[12:23:17.149] <TB3> INFO: pixel data incomplete: 0
[12:23:17.149] <TB3> INFO: pixel address: 0
[12:23:17.149] <TB3> INFO: pulse height fill bit: 0
[12:23:17.149] <TB3> INFO: buffer corruption: 0
[12:23:17.193] <TB3> INFO: ######################################################################
[12:23:17.193] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:23:17.193] <TB3> INFO: ######################################################################
[12:23:17.193] <TB3> INFO: ----------------------------------------------------------------------
[12:23:17.193] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:23:17.193] <TB3> INFO: ----------------------------------------------------------------------
[12:23:17.193] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:23:17.204] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:23:17.205] <TB3> INFO: run 1 of 1
[12:23:17.462] <TB3> INFO: Expecting 36608000 events.
[12:23:40.517] <TB3> INFO: 684050 events read in total (22463ms).
[12:24:03.167] <TB3> INFO: 1354400 events read in total (45113ms).
[12:24:25.767] <TB3> INFO: 2023550 events read in total (67713ms).
[12:24:48.697] <TB3> INFO: 2691450 events read in total (90643ms).
[12:25:11.249] <TB3> INFO: 3360450 events read in total (113195ms).
[12:25:33.947] <TB3> INFO: 4028650 events read in total (135893ms).
[12:25:56.500] <TB3> INFO: 4698250 events read in total (158446ms).
[12:26:19.434] <TB3> INFO: 5366500 events read in total (181380ms).
[12:26:42.211] <TB3> INFO: 6034350 events read in total (204157ms).
[12:27:04.668] <TB3> INFO: 6701950 events read in total (226614ms).
[12:27:27.559] <TB3> INFO: 7368750 events read in total (249505ms).
[12:27:49.995] <TB3> INFO: 8033300 events read in total (271941ms).
[12:28:12.602] <TB3> INFO: 8699400 events read in total (294548ms).
[12:28:35.239] <TB3> INFO: 9365800 events read in total (317186ms).
[12:28:57.812] <TB3> INFO: 10033900 events read in total (339758ms).
[12:29:20.271] <TB3> INFO: 10700000 events read in total (362217ms).
[12:29:42.745] <TB3> INFO: 11367800 events read in total (384691ms).
[12:30:05.626] <TB3> INFO: 12036350 events read in total (407572ms).
[12:30:28.246] <TB3> INFO: 12703250 events read in total (430192ms).
[12:30:50.768] <TB3> INFO: 13366700 events read in total (452714ms).
[12:31:13.484] <TB3> INFO: 14032500 events read in total (475430ms).
[12:31:35.923] <TB3> INFO: 14696800 events read in total (497869ms).
[12:31:58.431] <TB3> INFO: 15361400 events read in total (520377ms).
[12:32:20.989] <TB3> INFO: 16025350 events read in total (542935ms).
[12:32:43.332] <TB3> INFO: 16689650 events read in total (565278ms).
[12:33:05.749] <TB3> INFO: 17353600 events read in total (587695ms).
[12:33:28.276] <TB3> INFO: 18018350 events read in total (610222ms).
[12:33:50.702] <TB3> INFO: 18682000 events read in total (632648ms).
[12:34:13.291] <TB3> INFO: 19345300 events read in total (655237ms).
[12:34:35.710] <TB3> INFO: 20007650 events read in total (677656ms).
[12:34:58.414] <TB3> INFO: 20668900 events read in total (700361ms).
[12:35:21.016] <TB3> INFO: 21330000 events read in total (722962ms).
[12:35:43.477] <TB3> INFO: 21992500 events read in total (745423ms).
[12:36:05.877] <TB3> INFO: 22652300 events read in total (767823ms).
[12:36:28.221] <TB3> INFO: 23313500 events read in total (790167ms).
[12:36:50.786] <TB3> INFO: 23971850 events read in total (812732ms).
[12:37:13.234] <TB3> INFO: 24632200 events read in total (835180ms).
[12:37:35.648] <TB3> INFO: 25291650 events read in total (857594ms).
[12:37:57.795] <TB3> INFO: 25951200 events read in total (879741ms).
[12:38:20.127] <TB3> INFO: 26610800 events read in total (902073ms).
[12:38:42.943] <TB3> INFO: 27271600 events read in total (924889ms).
[12:39:05.560] <TB3> INFO: 27930650 events read in total (947506ms).
[12:39:28.043] <TB3> INFO: 28590950 events read in total (969989ms).
[12:39:50.652] <TB3> INFO: 29250100 events read in total (992598ms).
[12:40:13.522] <TB3> INFO: 29908650 events read in total (1015468ms).
[12:40:36.071] <TB3> INFO: 30566950 events read in total (1038017ms).
[12:40:58.328] <TB3> INFO: 31223250 events read in total (1060274ms).
[12:41:20.759] <TB3> INFO: 31882750 events read in total (1082705ms).
[12:41:43.185] <TB3> INFO: 32541700 events read in total (1105131ms).
[12:42:05.561] <TB3> INFO: 33201700 events read in total (1127507ms).
[12:42:27.764] <TB3> INFO: 33860550 events read in total (1149710ms).
[12:42:50.406] <TB3> INFO: 34520350 events read in total (1172352ms).
[12:43:12.987] <TB3> INFO: 35179300 events read in total (1194933ms).
[12:43:35.543] <TB3> INFO: 35841000 events read in total (1217489ms).
[12:43:58.351] <TB3> INFO: 36511850 events read in total (1240297ms).
[12:44:01.843] <TB3> INFO: 36608000 events read in total (1243789ms).
[12:44:01.907] <TB3> INFO: Test took 1244702ms.
[12:44:02.304] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:04.034] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:05.770] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:07.659] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:09.679] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:11.827] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:13.548] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:15.297] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:17.185] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:19.113] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:21.119] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:22.974] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:24.708] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:26.730] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:28.740] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:30.883] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:44:33.008] <TB3> INFO: PixTestScurves::scurves() done
[12:44:33.008] <TB3> INFO: Vcal mean: 124.62 101.29 115.88 111.28 110.74 114.03 111.47 117.28 124.94 114.28 118.93 125.57 115.26 115.40 127.89 101.52
[12:44:33.008] <TB3> INFO: Vcal RMS: 6.48 5.78 6.79 6.98 4.94 5.15 5.74 6.23 6.64 6.47 7.17 6.53 5.80 6.11 6.38 5.86
[12:44:33.008] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1275 seconds
[12:44:33.008] <TB3> INFO: Decoding statistics:
[12:44:33.008] <TB3> INFO: General information:
[12:44:33.008] <TB3> INFO: 16bit words read: 0
[12:44:33.008] <TB3> INFO: valid events total: 0
[12:44:33.008] <TB3> INFO: empty events: 0
[12:44:33.008] <TB3> INFO: valid events with pixels: 0
[12:44:33.008] <TB3> INFO: valid pixel hits: 0
[12:44:33.008] <TB3> INFO: Event errors: 0
[12:44:33.008] <TB3> INFO: start marker: 0
[12:44:33.008] <TB3> INFO: stop marker: 0
[12:44:33.008] <TB3> INFO: overflow: 0
[12:44:33.008] <TB3> INFO: invalid 5bit words: 0
[12:44:33.008] <TB3> INFO: invalid XOR eye diagram: 0
[12:44:33.009] <TB3> INFO: frame (failed synchr.): 0
[12:44:33.009] <TB3> INFO: idle data (no TBM trl): 0
[12:44:33.009] <TB3> INFO: no data (only TBM hdr): 0
[12:44:33.009] <TB3> INFO: TBM errors: 0
[12:44:33.009] <TB3> INFO: flawed TBM headers: 0
[12:44:33.009] <TB3> INFO: flawed TBM trailers: 0
[12:44:33.009] <TB3> INFO: event ID mismatches: 0
[12:44:33.009] <TB3> INFO: ROC errors: 0
[12:44:33.009] <TB3> INFO: missing ROC header(s): 0
[12:44:33.009] <TB3> INFO: misplaced readback start: 0
[12:44:33.009] <TB3> INFO: Pixel decoding errors: 0
[12:44:33.009] <TB3> INFO: pixel data incomplete: 0
[12:44:33.009] <TB3> INFO: pixel address: 0
[12:44:33.009] <TB3> INFO: pulse height fill bit: 0
[12:44:33.009] <TB3> INFO: buffer corruption: 0
[12:44:33.072] <TB3> INFO: ######################################################################
[12:44:33.072] <TB3> INFO: PixTestTrim::doTest()
[12:44:33.072] <TB3> INFO: ######################################################################
[12:44:33.073] <TB3> INFO: ----------------------------------------------------------------------
[12:44:33.073] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:44:33.073] <TB3> INFO: ----------------------------------------------------------------------
[12:44:33.112] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:44:33.112] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:44:33.122] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:44:33.122] <TB3> INFO: run 1 of 1
[12:44:33.390] <TB3> INFO: Expecting 5025280 events.
[12:45:03.567] <TB3> INFO: 823576 events read in total (29583ms).
[12:45:32.980] <TB3> INFO: 1644704 events read in total (58996ms).
[12:46:02.751] <TB3> INFO: 2463496 events read in total (88768ms).
[12:46:32.352] <TB3> INFO: 3277928 events read in total (118368ms).
[12:47:01.696] <TB3> INFO: 4089104 events read in total (147713ms).
[12:47:31.146] <TB3> INFO: 4898472 events read in total (177162ms).
[12:47:36.086] <TB3> INFO: 5025280 events read in total (182102ms).
[12:47:36.139] <TB3> INFO: Test took 183018ms.
[12:47:54.949] <TB3> INFO: ROC 0 VthrComp = 134
[12:47:54.949] <TB3> INFO: ROC 1 VthrComp = 103
[12:47:54.949] <TB3> INFO: ROC 2 VthrComp = 106
[12:47:54.949] <TB3> INFO: ROC 3 VthrComp = 106
[12:47:54.950] <TB3> INFO: ROC 4 VthrComp = 121
[12:47:54.950] <TB3> INFO: ROC 5 VthrComp = 117
[12:47:54.950] <TB3> INFO: ROC 6 VthrComp = 107
[12:47:54.950] <TB3> INFO: ROC 7 VthrComp = 119
[12:47:54.950] <TB3> INFO: ROC 8 VthrComp = 123
[12:47:54.950] <TB3> INFO: ROC 9 VthrComp = 107
[12:47:54.950] <TB3> INFO: ROC 10 VthrComp = 110
[12:47:54.950] <TB3> INFO: ROC 11 VthrComp = 116
[12:47:54.951] <TB3> INFO: ROC 12 VthrComp = 116
[12:47:54.951] <TB3> INFO: ROC 13 VthrComp = 112
[12:47:54.951] <TB3> INFO: ROC 14 VthrComp = 129
[12:47:54.951] <TB3> INFO: ROC 15 VthrComp = 99
[12:47:55.196] <TB3> INFO: Expecting 41600 events.
[12:47:58.688] <TB3> INFO: 41600 events read in total (2900ms).
[12:47:58.689] <TB3> INFO: Test took 3735ms.
[12:47:58.697] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:47:58.697] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:47:58.708] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:47:58.708] <TB3> INFO: run 1 of 1
[12:47:58.986] <TB3> INFO: Expecting 5025280 events.
[12:48:24.735] <TB3> INFO: 590368 events read in total (25158ms).
[12:48:49.775] <TB3> INFO: 1179304 events read in total (50198ms).
[12:49:15.075] <TB3> INFO: 1769160 events read in total (75498ms).
[12:49:40.080] <TB3> INFO: 2357496 events read in total (100503ms).
[12:50:05.221] <TB3> INFO: 2944872 events read in total (125644ms).
[12:50:30.412] <TB3> INFO: 3531848 events read in total (150835ms).
[12:50:55.856] <TB3> INFO: 4118488 events read in total (176279ms).
[12:51:21.186] <TB3> INFO: 4705024 events read in total (201609ms).
[12:51:35.704] <TB3> INFO: 5025280 events read in total (216127ms).
[12:51:35.760] <TB3> INFO: Test took 217053ms.
[12:52:02.479] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.8227 for pixel 0/64 mean/min/max = 46.5606/32.0916/61.0297
[12:52:02.479] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 63.3644 for pixel 0/28 mean/min/max = 48.1626/32.6888/63.6364
[12:52:02.480] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 71.2626 for pixel 9/0 mean/min/max = 51.8559/32.358/71.3539
[12:52:02.480] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 68.1199 for pixel 19/1 mean/min/max = 50.7345/32.9403/68.5286
[12:52:02.480] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.5916 for pixel 16/18 mean/min/max = 45.1534/31.537/58.7699
[12:52:02.481] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.245 for pixel 26/18 mean/min/max = 46.1237/31.8585/60.3889
[12:52:02.481] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 65.6728 for pixel 0/78 mean/min/max = 49.7404/33.6896/65.7911
[12:52:02.482] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 63.9345 for pixel 2/1 mean/min/max = 47.0862/30.0189/64.1535
[12:52:02.482] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 63.2408 for pixel 18/57 mean/min/max = 47.0554/30.8219/63.2889
[12:52:02.482] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 71.2213 for pixel 31/14 mean/min/max = 51.5579/31.8312/71.2845
[12:52:02.483] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 73.1826 for pixel 13/7 mean/min/max = 52.8511/32.5114/73.1909
[12:52:02.483] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 70.0352 for pixel 37/2 mean/min/max = 50.1673/30.1201/70.2144
[12:52:02.483] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 61.9728 for pixel 15/6 mean/min/max = 47.0017/31.9922/62.0112
[12:52:02.484] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 65.975 for pixel 0/4 mean/min/max = 48.4503/30.7797/66.1209
[12:52:02.484] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 62.0216 for pixel 3/47 mean/min/max = 46.7299/31.4378/62.022
[12:52:02.484] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 64.3883 for pixel 16/1 mean/min/max = 48.025/31.5601/64.4899
[12:52:02.485] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:02.573] <TB3> INFO: Expecting 411648 events.
[12:52:11.845] <TB3> INFO: 411648 events read in total (8679ms).
[12:52:11.851] <TB3> INFO: Expecting 411648 events.
[12:52:20.915] <TB3> INFO: 411648 events read in total (8662ms).
[12:52:20.926] <TB3> INFO: Expecting 411648 events.
[12:52:29.944] <TB3> INFO: 411648 events read in total (8615ms).
[12:52:29.959] <TB3> INFO: Expecting 411648 events.
[12:52:39.045] <TB3> INFO: 411648 events read in total (8683ms).
[12:52:39.063] <TB3> INFO: Expecting 411648 events.
[12:52:48.211] <TB3> INFO: 411648 events read in total (8745ms).
[12:52:48.227] <TB3> INFO: Expecting 411648 events.
[12:52:57.265] <TB3> INFO: 411648 events read in total (8635ms).
[12:52:57.284] <TB3> INFO: Expecting 411648 events.
[12:53:06.354] <TB3> INFO: 411648 events read in total (8667ms).
[12:53:06.374] <TB3> INFO: Expecting 411648 events.
[12:53:15.419] <TB3> INFO: 411648 events read in total (8642ms).
[12:53:15.450] <TB3> INFO: Expecting 411648 events.
[12:53:24.533] <TB3> INFO: 411648 events read in total (8680ms).
[12:53:24.559] <TB3> INFO: Expecting 411648 events.
[12:53:33.664] <TB3> INFO: 411648 events read in total (8702ms).
[12:53:33.703] <TB3> INFO: Expecting 411648 events.
[12:53:42.785] <TB3> INFO: 411648 events read in total (8679ms).
[12:53:42.817] <TB3> INFO: Expecting 411648 events.
[12:53:51.894] <TB3> INFO: 411648 events read in total (8674ms).
[12:53:51.926] <TB3> INFO: Expecting 411648 events.
[12:54:01.013] <TB3> INFO: 411648 events read in total (8684ms).
[12:54:01.068] <TB3> INFO: Expecting 411648 events.
[12:54:10.128] <TB3> INFO: 411648 events read in total (8657ms).
[12:54:10.166] <TB3> INFO: Expecting 411648 events.
[12:54:19.248] <TB3> INFO: 411648 events read in total (8679ms).
[12:54:19.305] <TB3> INFO: Expecting 411648 events.
[12:54:28.368] <TB3> INFO: 411648 events read in total (8660ms).
[12:54:28.412] <TB3> INFO: Test took 145927ms.
[12:54:29.015] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:54:29.025] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:54:29.025] <TB3> INFO: run 1 of 1
[12:54:29.257] <TB3> INFO: Expecting 5025280 events.
[12:54:55.029] <TB3> INFO: 591880 events read in total (25180ms).
[12:55:20.210] <TB3> INFO: 1181096 events read in total (50361ms).
[12:55:45.365] <TB3> INFO: 1769528 events read in total (75516ms).
[12:56:10.808] <TB3> INFO: 2357264 events read in total (100959ms).
[12:56:35.678] <TB3> INFO: 2943408 events read in total (125829ms).
[12:57:00.790] <TB3> INFO: 3530176 events read in total (150942ms).
[12:57:25.651] <TB3> INFO: 4116896 events read in total (175802ms).
[12:57:50.762] <TB3> INFO: 4701376 events read in total (200913ms).
[12:58:05.352] <TB3> INFO: 5025280 events read in total (215503ms).
[12:58:05.437] <TB3> INFO: Test took 216413ms.
[12:58:27.088] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 5.806507 .. 147.693181
[12:58:27.325] <TB3> INFO: Expecting 208000 events.
[12:58:36.573] <TB3> INFO: 208000 events read in total (8656ms).
[12:58:36.575] <TB3> INFO: Test took 9486ms.
[12:58:36.653] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 5 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:58:36.666] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:58:36.666] <TB3> INFO: run 1 of 1
[12:58:36.944] <TB3> INFO: Expecting 5091840 events.
[12:59:02.526] <TB3> INFO: 579040 events read in total (24990ms).
[12:59:27.638] <TB3> INFO: 1157904 events read in total (50102ms).
[12:59:52.793] <TB3> INFO: 1736384 events read in total (75258ms).
[13:00:17.868] <TB3> INFO: 2315208 events read in total (100332ms).
[13:00:43.344] <TB3> INFO: 2894064 events read in total (125808ms).
[13:01:08.621] <TB3> INFO: 3471528 events read in total (151085ms).
[13:01:33.732] <TB3> INFO: 4049408 events read in total (176196ms).
[13:01:59.083] <TB3> INFO: 4626984 events read in total (201547ms).
[13:02:19.793] <TB3> INFO: 5091840 events read in total (222257ms).
[13:02:19.895] <TB3> INFO: Test took 223230ms.
[13:02:47.622] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 26.117056 .. 46.701240
[13:02:47.874] <TB3> INFO: Expecting 208000 events.
[13:02:57.845] <TB3> INFO: 208000 events read in total (9379ms).
[13:02:57.846] <TB3> INFO: Test took 10223ms.
[13:02:57.912] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[13:02:57.923] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:02:57.923] <TB3> INFO: run 1 of 1
[13:02:58.202] <TB3> INFO: Expecting 1364480 events.
[13:03:26.201] <TB3> INFO: 659344 events read in total (27407ms).
[13:03:53.214] <TB3> INFO: 1317240 events read in total (54420ms).
[13:03:55.587] <TB3> INFO: 1364480 events read in total (56793ms).
[13:03:55.619] <TB3> INFO: Test took 57696ms.
[13:04:09.125] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.711144 .. 53.228033
[13:04:09.390] <TB3> INFO: Expecting 208000 events.
[13:04:19.271] <TB3> INFO: 208000 events read in total (9289ms).
[13:04:19.272] <TB3> INFO: Test took 10146ms.
[13:04:19.326] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 63 (-1/-1) hits flags = 528 (plus default)
[13:04:19.335] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:04:19.335] <TB3> INFO: run 1 of 1
[13:04:19.613] <TB3> INFO: Expecting 1597440 events.
[13:04:47.043] <TB3> INFO: 637160 events read in total (26839ms).
[13:05:13.978] <TB3> INFO: 1273720 events read in total (53774ms).
[13:05:27.660] <TB3> INFO: 1597440 events read in total (67456ms).
[13:05:27.695] <TB3> INFO: Test took 68361ms.
[13:05:42.244] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.503910 .. 54.088260
[13:05:42.479] <TB3> INFO: Expecting 208000 events.
[13:05:51.977] <TB3> INFO: 208000 events read in total (8907ms).
[13:05:51.978] <TB3> INFO: Test took 9732ms.
[13:05:52.025] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 64 (-1/-1) hits flags = 528 (plus default)
[13:05:52.035] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:05:52.035] <TB3> INFO: run 1 of 1
[13:05:52.313] <TB3> INFO: Expecting 1664000 events.
[13:06:19.876] <TB3> INFO: 637960 events read in total (26972ms).
[13:06:46.507] <TB3> INFO: 1275776 events read in total (53603ms).
[13:07:03.060] <TB3> INFO: 1664000 events read in total (70156ms).
[13:07:03.095] <TB3> INFO: Test took 71061ms.
[13:07:17.050] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:07:17.050] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:07:17.060] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:07:17.060] <TB3> INFO: run 1 of 1
[13:07:17.336] <TB3> INFO: Expecting 1364480 events.
[13:07:45.236] <TB3> INFO: 667224 events read in total (27310ms).
[13:08:13.025] <TB3> INFO: 1334576 events read in total (55098ms).
[13:08:14.666] <TB3> INFO: 1364480 events read in total (56740ms).
[13:08:14.689] <TB3> INFO: Test took 57628ms.
[13:08:25.862] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C0.dat
[13:08:25.862] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C1.dat
[13:08:25.862] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C2.dat
[13:08:25.862] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C3.dat
[13:08:25.862] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C4.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C5.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C6.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C7.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C8.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C9.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C10.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C11.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C12.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C13.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C14.dat
[13:08:25.863] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C15.dat
[13:08:25.863] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C0.dat
[13:08:25.869] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C1.dat
[13:08:25.875] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C2.dat
[13:08:25.880] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C3.dat
[13:08:25.885] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C4.dat
[13:08:25.891] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C5.dat
[13:08:25.898] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C6.dat
[13:08:25.904] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C7.dat
[13:08:25.910] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C8.dat
[13:08:25.915] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C9.dat
[13:08:25.921] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C10.dat
[13:08:25.926] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C11.dat
[13:08:25.933] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C12.dat
[13:08:25.940] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C13.dat
[13:08:25.946] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C14.dat
[13:08:25.952] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//trimParameters35_C15.dat
[13:08:25.957] <TB3> INFO: PixTestTrim::trimTest() done
[13:08:25.957] <TB3> INFO: vtrim: 132 147 151 148 133 134 128 118 150 157 153 149 137 149 139 124
[13:08:25.957] <TB3> INFO: vthrcomp: 134 103 106 106 121 117 107 119 123 107 110 116 116 112 129 99
[13:08:25.957] <TB3> INFO: vcal mean: 35.10 34.94 35.79 35.33 34.93 34.95 34.97 35.03 35.17 35.53 36.09 35.69 34.97 34.95 34.93 35.00
[13:08:25.957] <TB3> INFO: vcal RMS: 1.11 1.05 2.15 1.48 1.01 1.09 1.05 1.27 1.52 1.86 2.40 2.01 1.10 1.28 1.14 1.07
[13:08:25.957] <TB3> INFO: bits mean: 9.47 9.10 9.63 9.41 10.23 9.96 8.78 9.89 10.31 9.92 9.58 10.18 9.84 9.63 9.94 9.15
[13:08:25.957] <TB3> INFO: bits RMS: 2.59 2.61 2.48 2.36 2.45 2.49 2.52 2.67 2.39 2.33 2.49 2.54 2.48 2.63 2.44 2.79
[13:08:25.964] <TB3> INFO: ----------------------------------------------------------------------
[13:08:25.964] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:08:25.964] <TB3> INFO: ----------------------------------------------------------------------
[13:08:25.967] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:08:25.977] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:08:25.977] <TB3> INFO: run 1 of 1
[13:08:26.251] <TB3> INFO: Expecting 4160000 events.
[13:08:58.263] <TB3> INFO: 756170 events read in total (31421ms).
[13:09:29.419] <TB3> INFO: 1506555 events read in total (62577ms).
[13:10:01.125] <TB3> INFO: 2253105 events read in total (94283ms).
[13:10:32.497] <TB3> INFO: 2995590 events read in total (125655ms).
[13:11:03.779] <TB3> INFO: 3735365 events read in total (156937ms).
[13:11:22.071] <TB3> INFO: 4160000 events read in total (175229ms).
[13:11:22.139] <TB3> INFO: Test took 176162ms.
[13:11:48.771] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[13:11:48.782] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:11:48.782] <TB3> INFO: run 1 of 1
[13:11:49.017] <TB3> INFO: Expecting 4284800 events.
[13:12:20.062] <TB3> INFO: 721810 events read in total (30454ms).
[13:12:50.875] <TB3> INFO: 1439180 events read in total (61267ms).
[13:13:21.558] <TB3> INFO: 2153535 events read in total (91950ms).
[13:13:51.712] <TB3> INFO: 2864310 events read in total (122104ms).
[13:14:22.037] <TB3> INFO: 3573380 events read in total (152429ms).
[13:14:52.395] <TB3> INFO: 4283885 events read in total (182787ms).
[13:14:52.851] <TB3> INFO: 4284800 events read in total (183243ms).
[13:14:52.923] <TB3> INFO: Test took 184141ms.
[13:15:22.458] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[13:15:22.469] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:15:22.469] <TB3> INFO: run 1 of 1
[13:15:22.737] <TB3> INFO: Expecting 4201600 events.
[13:15:54.701] <TB3> INFO: 727230 events read in total (31372ms).
[13:16:25.346] <TB3> INFO: 1449465 events read in total (62017ms).
[13:16:56.010] <TB3> INFO: 2168525 events read in total (92681ms).
[13:17:26.570] <TB3> INFO: 2884195 events read in total (123241ms).
[13:17:58.100] <TB3> INFO: 3598080 events read in total (154771ms).
[13:18:23.949] <TB3> INFO: 4201600 events read in total (180620ms).
[13:18:24.019] <TB3> INFO: Test took 181550ms.
[13:18:51.531] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[13:18:51.542] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:18:51.542] <TB3> INFO: run 1 of 1
[13:18:51.804] <TB3> INFO: Expecting 4222400 events.
[13:19:23.922] <TB3> INFO: 725965 events read in total (31526ms).
[13:19:54.597] <TB3> INFO: 1447145 events read in total (62201ms).
[13:20:25.544] <TB3> INFO: 2164970 events read in total (93148ms).
[13:20:56.194] <TB3> INFO: 2879505 events read in total (123798ms).
[13:21:26.792] <TB3> INFO: 3592480 events read in total (154396ms).
[13:21:54.062] <TB3> INFO: 4222400 events read in total (181666ms).
[13:21:54.136] <TB3> INFO: Test took 182594ms.
[13:22:22.689] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[13:22:22.699] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:22:22.699] <TB3> INFO: run 1 of 1
[13:22:22.955] <TB3> INFO: Expecting 4264000 events.
[13:22:54.377] <TB3> INFO: 723615 events read in total (30831ms).
[13:23:25.190] <TB3> INFO: 1442800 events read in total (61643ms).
[13:23:55.781] <TB3> INFO: 2158565 events read in total (92234ms).
[13:24:26.280] <TB3> INFO: 2871025 events read in total (122733ms).
[13:24:56.585] <TB3> INFO: 3581870 events read in total (153038ms).
[13:25:25.662] <TB3> INFO: 4264000 events read in total (182115ms).
[13:25:25.737] <TB3> INFO: Test took 183037ms.
[13:25:56.228] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:25:56.229] <TB3> INFO: PixTestTrim::doTest() done, duration: 2483 seconds
[13:25:56.229] <TB3> INFO: Decoding statistics:
[13:25:56.229] <TB3> INFO: General information:
[13:25:56.229] <TB3> INFO: 16bit words read: 0
[13:25:56.229] <TB3> INFO: valid events total: 0
[13:25:56.229] <TB3> INFO: empty events: 0
[13:25:56.229] <TB3> INFO: valid events with pixels: 0
[13:25:56.229] <TB3> INFO: valid pixel hits: 0
[13:25:56.229] <TB3> INFO: Event errors: 0
[13:25:56.229] <TB3> INFO: start marker: 0
[13:25:56.229] <TB3> INFO: stop marker: 0
[13:25:56.229] <TB3> INFO: overflow: 0
[13:25:56.229] <TB3> INFO: invalid 5bit words: 0
[13:25:56.229] <TB3> INFO: invalid XOR eye diagram: 0
[13:25:56.230] <TB3> INFO: frame (failed synchr.): 0
[13:25:56.230] <TB3> INFO: idle data (no TBM trl): 0
[13:25:56.230] <TB3> INFO: no data (only TBM hdr): 0
[13:25:56.230] <TB3> INFO: TBM errors: 0
[13:25:56.230] <TB3> INFO: flawed TBM headers: 0
[13:25:56.230] <TB3> INFO: flawed TBM trailers: 0
[13:25:56.230] <TB3> INFO: event ID mismatches: 0
[13:25:56.230] <TB3> INFO: ROC errors: 0
[13:25:56.230] <TB3> INFO: missing ROC header(s): 0
[13:25:56.230] <TB3> INFO: misplaced readback start: 0
[13:25:56.230] <TB3> INFO: Pixel decoding errors: 0
[13:25:56.230] <TB3> INFO: pixel data incomplete: 0
[13:25:56.230] <TB3> INFO: pixel address: 0
[13:25:56.230] <TB3> INFO: pulse height fill bit: 0
[13:25:56.230] <TB3> INFO: buffer corruption: 0
[13:25:56.853] <TB3> INFO: ######################################################################
[13:25:56.853] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:25:56.853] <TB3> INFO: ######################################################################
[13:25:57.087] <TB3> INFO: Expecting 41600 events.
[13:26:00.562] <TB3> INFO: 41600 events read in total (2883ms).
[13:26:00.562] <TB3> INFO: Test took 3708ms.
[13:26:00.996] <TB3> INFO: Expecting 41600 events.
[13:26:04.519] <TB3> INFO: 41600 events read in total (2932ms).
[13:26:04.520] <TB3> INFO: Test took 3756ms.
[13:26:04.808] <TB3> INFO: Expecting 41600 events.
[13:26:08.346] <TB3> INFO: 41600 events read in total (2946ms).
[13:26:08.347] <TB3> INFO: Test took 3803ms.
[13:26:08.635] <TB3> INFO: Expecting 41600 events.
[13:26:12.227] <TB3> INFO: 41600 events read in total (3000ms).
[13:26:12.228] <TB3> INFO: Test took 3857ms.
[13:26:12.516] <TB3> INFO: Expecting 41600 events.
[13:26:16.031] <TB3> INFO: 41600 events read in total (2923ms).
[13:26:16.032] <TB3> INFO: Test took 3781ms.
[13:26:16.320] <TB3> INFO: Expecting 41600 events.
[13:26:19.823] <TB3> INFO: 41600 events read in total (2911ms).
[13:26:19.823] <TB3> INFO: Test took 3768ms.
[13:26:20.112] <TB3> INFO: Expecting 41600 events.
[13:26:23.640] <TB3> INFO: 41600 events read in total (2936ms).
[13:26:23.640] <TB3> INFO: Test took 3793ms.
[13:26:23.928] <TB3> INFO: Expecting 41600 events.
[13:26:27.399] <TB3> INFO: 41600 events read in total (2879ms).
[13:26:27.400] <TB3> INFO: Test took 3736ms.
[13:26:27.690] <TB3> INFO: Expecting 41600 events.
[13:26:31.153] <TB3> INFO: 41600 events read in total (2872ms).
[13:26:31.153] <TB3> INFO: Test took 3728ms.
[13:26:31.441] <TB3> INFO: Expecting 41600 events.
[13:26:34.917] <TB3> INFO: 41600 events read in total (2884ms).
[13:26:34.918] <TB3> INFO: Test took 3741ms.
[13:26:35.207] <TB3> INFO: Expecting 41600 events.
[13:26:38.763] <TB3> INFO: 41600 events read in total (2965ms).
[13:26:38.764] <TB3> INFO: Test took 3822ms.
[13:26:39.052] <TB3> INFO: Expecting 41600 events.
[13:26:42.501] <TB3> INFO: 41600 events read in total (2858ms).
[13:26:42.502] <TB3> INFO: Test took 3715ms.
[13:26:42.790] <TB3> INFO: Expecting 41600 events.
[13:26:46.308] <TB3> INFO: 41600 events read in total (2927ms).
[13:26:46.309] <TB3> INFO: Test took 3784ms.
[13:26:46.597] <TB3> INFO: Expecting 41600 events.
[13:26:50.126] <TB3> INFO: 41600 events read in total (2938ms).
[13:26:50.127] <TB3> INFO: Test took 3795ms.
[13:26:50.417] <TB3> INFO: Expecting 41600 events.
[13:26:53.946] <TB3> INFO: 41600 events read in total (2938ms).
[13:26:53.947] <TB3> INFO: Test took 3795ms.
[13:26:54.235] <TB3> INFO: Expecting 41600 events.
[13:26:57.774] <TB3> INFO: 41600 events read in total (2948ms).
[13:26:57.774] <TB3> INFO: Test took 3804ms.
[13:26:58.062] <TB3> INFO: Expecting 41600 events.
[13:27:01.541] <TB3> INFO: 41600 events read in total (2887ms).
[13:27:01.542] <TB3> INFO: Test took 3744ms.
[13:27:01.830] <TB3> INFO: Expecting 41600 events.
[13:27:05.417] <TB3> INFO: 41600 events read in total (2996ms).
[13:27:05.418] <TB3> INFO: Test took 3853ms.
[13:27:05.706] <TB3> INFO: Expecting 41600 events.
[13:27:09.212] <TB3> INFO: 41600 events read in total (2915ms).
[13:27:09.212] <TB3> INFO: Test took 3771ms.
[13:27:09.500] <TB3> INFO: Expecting 41600 events.
[13:27:13.040] <TB3> INFO: 41600 events read in total (2948ms).
[13:27:13.041] <TB3> INFO: Test took 3806ms.
[13:27:13.329] <TB3> INFO: Expecting 41600 events.
[13:27:16.806] <TB3> INFO: 41600 events read in total (2886ms).
[13:27:16.806] <TB3> INFO: Test took 3742ms.
[13:27:17.097] <TB3> INFO: Expecting 41600 events.
[13:27:20.561] <TB3> INFO: 41600 events read in total (2873ms).
[13:27:20.561] <TB3> INFO: Test took 3729ms.
[13:27:20.852] <TB3> INFO: Expecting 41600 events.
[13:27:24.321] <TB3> INFO: 41600 events read in total (2878ms).
[13:27:24.322] <TB3> INFO: Test took 3735ms.
[13:27:24.612] <TB3> INFO: Expecting 41600 events.
[13:27:28.145] <TB3> INFO: 41600 events read in total (2942ms).
[13:27:28.146] <TB3> INFO: Test took 3799ms.
[13:27:28.434] <TB3> INFO: Expecting 41600 events.
[13:27:31.981] <TB3> INFO: 41600 events read in total (2956ms).
[13:27:31.982] <TB3> INFO: Test took 3813ms.
[13:27:32.274] <TB3> INFO: Expecting 41600 events.
[13:27:35.864] <TB3> INFO: 41600 events read in total (2998ms).
[13:27:35.865] <TB3> INFO: Test took 3860ms.
[13:27:36.153] <TB3> INFO: Expecting 41600 events.
[13:27:39.764] <TB3> INFO: 41600 events read in total (3019ms).
[13:27:39.764] <TB3> INFO: Test took 3875ms.
[13:27:40.053] <TB3> INFO: Expecting 41600 events.
[13:27:43.593] <TB3> INFO: 41600 events read in total (2949ms).
[13:27:43.594] <TB3> INFO: Test took 3806ms.
[13:27:43.890] <TB3> INFO: Expecting 41600 events.
[13:27:47.382] <TB3> INFO: 41600 events read in total (2901ms).
[13:27:47.383] <TB3> INFO: Test took 3763ms.
[13:27:47.674] <TB3> INFO: Expecting 41600 events.
[13:27:51.324] <TB3> INFO: 41600 events read in total (3059ms).
[13:27:51.324] <TB3> INFO: Test took 3915ms.
[13:27:51.614] <TB3> INFO: Expecting 41600 events.
[13:27:55.110] <TB3> INFO: 41600 events read in total (2905ms).
[13:27:55.111] <TB3> INFO: Test took 3762ms.
[13:27:55.400] <TB3> INFO: Expecting 2560 events.
[13:27:56.284] <TB3> INFO: 2560 events read in total (292ms).
[13:27:56.284] <TB3> INFO: Test took 1161ms.
[13:27:56.592] <TB3> INFO: Expecting 2560 events.
[13:27:57.474] <TB3> INFO: 2560 events read in total (291ms).
[13:27:57.475] <TB3> INFO: Test took 1190ms.
[13:27:57.782] <TB3> INFO: Expecting 2560 events.
[13:27:58.664] <TB3> INFO: 2560 events read in total (290ms).
[13:27:58.664] <TB3> INFO: Test took 1189ms.
[13:27:58.972] <TB3> INFO: Expecting 2560 events.
[13:27:59.856] <TB3> INFO: 2560 events read in total (292ms).
[13:27:59.856] <TB3> INFO: Test took 1191ms.
[13:28:00.164] <TB3> INFO: Expecting 2560 events.
[13:28:01.045] <TB3> INFO: 2560 events read in total (289ms).
[13:28:01.046] <TB3> INFO: Test took 1190ms.
[13:28:01.353] <TB3> INFO: Expecting 2560 events.
[13:28:02.233] <TB3> INFO: 2560 events read in total (288ms).
[13:28:02.233] <TB3> INFO: Test took 1187ms.
[13:28:02.541] <TB3> INFO: Expecting 2560 events.
[13:28:03.418] <TB3> INFO: 2560 events read in total (285ms).
[13:28:03.418] <TB3> INFO: Test took 1185ms.
[13:28:03.726] <TB3> INFO: Expecting 2560 events.
[13:28:04.606] <TB3> INFO: 2560 events read in total (288ms).
[13:28:04.606] <TB3> INFO: Test took 1187ms.
[13:28:04.914] <TB3> INFO: Expecting 2560 events.
[13:28:05.795] <TB3> INFO: 2560 events read in total (289ms).
[13:28:05.796] <TB3> INFO: Test took 1190ms.
[13:28:06.103] <TB3> INFO: Expecting 2560 events.
[13:28:06.980] <TB3> INFO: 2560 events read in total (285ms).
[13:28:06.981] <TB3> INFO: Test took 1185ms.
[13:28:07.288] <TB3> INFO: Expecting 2560 events.
[13:28:08.165] <TB3> INFO: 2560 events read in total (285ms).
[13:28:08.165] <TB3> INFO: Test took 1184ms.
[13:28:08.473] <TB3> INFO: Expecting 2560 events.
[13:28:09.350] <TB3> INFO: 2560 events read in total (285ms).
[13:28:09.351] <TB3> INFO: Test took 1185ms.
[13:28:09.659] <TB3> INFO: Expecting 2560 events.
[13:28:10.542] <TB3> INFO: 2560 events read in total (292ms).
[13:28:10.542] <TB3> INFO: Test took 1191ms.
[13:28:10.850] <TB3> INFO: Expecting 2560 events.
[13:28:11.732] <TB3> INFO: 2560 events read in total (291ms).
[13:28:11.732] <TB3> INFO: Test took 1190ms.
[13:28:12.040] <TB3> INFO: Expecting 2560 events.
[13:28:12.923] <TB3> INFO: 2560 events read in total (291ms).
[13:28:12.923] <TB3> INFO: Test took 1190ms.
[13:28:13.231] <TB3> INFO: Expecting 2560 events.
[13:28:14.117] <TB3> INFO: 2560 events read in total (294ms).
[13:28:14.117] <TB3> INFO: Test took 1193ms.
[13:28:14.120] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:28:14.426] <TB3> INFO: Expecting 655360 events.
[13:28:28.777] <TB3> INFO: 655360 events read in total (13760ms).
[13:28:28.791] <TB3> INFO: Expecting 655360 events.
[13:28:42.948] <TB3> INFO: 655360 events read in total (13754ms).
[13:28:42.962] <TB3> INFO: Expecting 655360 events.
[13:28:57.181] <TB3> INFO: 655360 events read in total (13816ms).
[13:28:57.200] <TB3> INFO: Expecting 655360 events.
[13:29:11.264] <TB3> INFO: 655360 events read in total (13661ms).
[13:29:11.286] <TB3> INFO: Expecting 655360 events.
[13:29:25.383] <TB3> INFO: 655360 events read in total (13694ms).
[13:29:25.409] <TB3> INFO: Expecting 655360 events.
[13:29:39.480] <TB3> INFO: 655360 events read in total (13668ms).
[13:29:39.510] <TB3> INFO: Expecting 655360 events.
[13:29:53.490] <TB3> INFO: 655360 events read in total (13577ms).
[13:29:53.537] <TB3> INFO: Expecting 655360 events.
[13:30:07.628] <TB3> INFO: 655360 events read in total (13688ms).
[13:30:07.668] <TB3> INFO: Expecting 655360 events.
[13:30:21.689] <TB3> INFO: 655360 events read in total (13618ms).
[13:30:21.747] <TB3> INFO: Expecting 655360 events.
[13:30:35.773] <TB3> INFO: 655360 events read in total (13623ms).
[13:30:35.821] <TB3> INFO: Expecting 655360 events.
[13:30:49.859] <TB3> INFO: 655360 events read in total (13635ms).
[13:30:49.928] <TB3> INFO: Expecting 655360 events.
[13:31:03.924] <TB3> INFO: 655360 events read in total (13593ms).
[13:31:03.997] <TB3> INFO: Expecting 655360 events.
[13:31:17.988] <TB3> INFO: 655360 events read in total (13588ms).
[13:31:18.052] <TB3> INFO: Expecting 655360 events.
[13:31:32.088] <TB3> INFO: 655360 events read in total (13633ms).
[13:31:32.176] <TB3> INFO: Expecting 655360 events.
[13:31:46.247] <TB3> INFO: 655360 events read in total (13668ms).
[13:31:46.318] <TB3> INFO: Expecting 655360 events.
[13:32:00.334] <TB3> INFO: 655360 events read in total (13613ms).
[13:32:00.431] <TB3> INFO: Test took 226311ms.
[13:32:00.525] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:00.790] <TB3> INFO: Expecting 655360 events.
[13:32:14.932] <TB3> INFO: 655360 events read in total (13550ms).
[13:32:14.946] <TB3> INFO: Expecting 655360 events.
[13:32:28.837] <TB3> INFO: 655360 events read in total (13489ms).
[13:32:28.857] <TB3> INFO: Expecting 655360 events.
[13:32:42.686] <TB3> INFO: 655360 events read in total (13424ms).
[13:32:42.718] <TB3> INFO: Expecting 655360 events.
[13:32:56.594] <TB3> INFO: 655360 events read in total (13473ms).
[13:32:56.624] <TB3> INFO: Expecting 655360 events.
[13:33:10.627] <TB3> INFO: 655360 events read in total (13600ms).
[13:33:10.653] <TB3> INFO: Expecting 655360 events.
[13:33:24.688] <TB3> INFO: 655360 events read in total (13632ms).
[13:33:24.719] <TB3> INFO: Expecting 655360 events.
[13:33:38.587] <TB3> INFO: 655360 events read in total (13465ms).
[13:33:38.633] <TB3> INFO: Expecting 655360 events.
[13:33:52.423] <TB3> INFO: 655360 events read in total (13387ms).
[13:33:52.462] <TB3> INFO: Expecting 655360 events.
[13:34:06.313] <TB3> INFO: 655360 events read in total (13447ms).
[13:34:06.357] <TB3> INFO: Expecting 655360 events.
[13:34:20.220] <TB3> INFO: 655360 events read in total (13460ms).
[13:34:20.266] <TB3> INFO: Expecting 655360 events.
[13:34:34.046] <TB3> INFO: 655360 events read in total (13377ms).
[13:34:34.097] <TB3> INFO: Expecting 655360 events.
[13:34:47.946] <TB3> INFO: 655360 events read in total (13446ms).
[13:34:48.016] <TB3> INFO: Expecting 655360 events.
[13:35:02.051] <TB3> INFO: 655360 events read in total (13632ms).
[13:35:02.112] <TB3> INFO: Expecting 655360 events.
[13:35:16.062] <TB3> INFO: 655360 events read in total (13547ms).
[13:35:16.127] <TB3> INFO: Expecting 655360 events.
[13:35:29.970] <TB3> INFO: 655360 events read in total (13440ms).
[13:35:30.040] <TB3> INFO: Expecting 655360 events.
[13:35:43.972] <TB3> INFO: 655360 events read in total (13529ms).
[13:35:44.045] <TB3> INFO: Test took 223520ms.
[13:35:44.203] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.207] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.212] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.217] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:35:44.221] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.226] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.230] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.235] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.240] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.244] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.249] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:35:44.254] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:35:44.258] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:35:44.263] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.268] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.272] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.277] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:35:44.282] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.286] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.291] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:35:44.296] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:35:44.300] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:35:44.305] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.310] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:35:44.342] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C0.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C1.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C2.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C3.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C4.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C5.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C6.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C7.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C8.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C9.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C10.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C11.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C12.dat
[13:35:44.343] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C13.dat
[13:35:44.344] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C14.dat
[13:35:44.344] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//dacParameters35_C15.dat
[13:35:44.603] <TB3> INFO: Expecting 41600 events.
[13:35:47.748] <TB3> INFO: 41600 events read in total (2553ms).
[13:35:47.749] <TB3> INFO: Test took 3403ms.
[13:35:48.195] <TB3> INFO: Expecting 41600 events.
[13:35:51.206] <TB3> INFO: 41600 events read in total (2419ms).
[13:35:51.207] <TB3> INFO: Test took 3244ms.
[13:35:51.649] <TB3> INFO: Expecting 41600 events.
[13:35:54.756] <TB3> INFO: 41600 events read in total (2515ms).
[13:35:54.757] <TB3> INFO: Test took 3339ms.
[13:35:54.971] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:55.060] <TB3> INFO: Expecting 2560 events.
[13:35:55.945] <TB3> INFO: 2560 events read in total (294ms).
[13:35:55.945] <TB3> INFO: Test took 974ms.
[13:35:55.947] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:56.253] <TB3> INFO: Expecting 2560 events.
[13:35:57.135] <TB3> INFO: 2560 events read in total (290ms).
[13:35:57.135] <TB3> INFO: Test took 1188ms.
[13:35:57.137] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:57.443] <TB3> INFO: Expecting 2560 events.
[13:35:58.329] <TB3> INFO: 2560 events read in total (294ms).
[13:35:58.329] <TB3> INFO: Test took 1192ms.
[13:35:58.331] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:58.637] <TB3> INFO: Expecting 2560 events.
[13:35:59.518] <TB3> INFO: 2560 events read in total (289ms).
[13:35:59.519] <TB3> INFO: Test took 1188ms.
[13:35:59.520] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:59.827] <TB3> INFO: Expecting 2560 events.
[13:36:00.713] <TB3> INFO: 2560 events read in total (295ms).
[13:36:00.713] <TB3> INFO: Test took 1193ms.
[13:36:00.714] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:01.021] <TB3> INFO: Expecting 2560 events.
[13:36:01.904] <TB3> INFO: 2560 events read in total (291ms).
[13:36:01.905] <TB3> INFO: Test took 1191ms.
[13:36:01.907] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:02.213] <TB3> INFO: Expecting 2560 events.
[13:36:03.099] <TB3> INFO: 2560 events read in total (294ms).
[13:36:03.100] <TB3> INFO: Test took 1193ms.
[13:36:03.101] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:03.408] <TB3> INFO: Expecting 2560 events.
[13:36:04.295] <TB3> INFO: 2560 events read in total (296ms).
[13:36:04.295] <TB3> INFO: Test took 1194ms.
[13:36:04.297] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:04.603] <TB3> INFO: Expecting 2560 events.
[13:36:05.485] <TB3> INFO: 2560 events read in total (291ms).
[13:36:05.485] <TB3> INFO: Test took 1188ms.
[13:36:05.487] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:05.794] <TB3> INFO: Expecting 2560 events.
[13:36:06.673] <TB3> INFO: 2560 events read in total (288ms).
[13:36:06.673] <TB3> INFO: Test took 1186ms.
[13:36:06.675] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:06.992] <TB3> INFO: Expecting 2560 events.
[13:36:07.873] <TB3> INFO: 2560 events read in total (289ms).
[13:36:07.873] <TB3> INFO: Test took 1199ms.
[13:36:07.875] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:08.182] <TB3> INFO: Expecting 2560 events.
[13:36:09.060] <TB3> INFO: 2560 events read in total (286ms).
[13:36:09.060] <TB3> INFO: Test took 1185ms.
[13:36:09.063] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:09.369] <TB3> INFO: Expecting 2560 events.
[13:36:10.249] <TB3> INFO: 2560 events read in total (289ms).
[13:36:10.249] <TB3> INFO: Test took 1186ms.
[13:36:10.251] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:10.557] <TB3> INFO: Expecting 2560 events.
[13:36:11.436] <TB3> INFO: 2560 events read in total (287ms).
[13:36:11.436] <TB3> INFO: Test took 1185ms.
[13:36:11.438] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:11.744] <TB3> INFO: Expecting 2560 events.
[13:36:12.624] <TB3> INFO: 2560 events read in total (288ms).
[13:36:12.625] <TB3> INFO: Test took 1187ms.
[13:36:12.626] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:12.933] <TB3> INFO: Expecting 2560 events.
[13:36:13.811] <TB3> INFO: 2560 events read in total (286ms).
[13:36:13.812] <TB3> INFO: Test took 1186ms.
[13:36:13.813] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:14.120] <TB3> INFO: Expecting 2560 events.
[13:36:14.002] <TB3> INFO: 2560 events read in total (290ms).
[13:36:14.002] <TB3> INFO: Test took 1189ms.
[13:36:15.004] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:15.311] <TB3> INFO: Expecting 2560 events.
[13:36:16.189] <TB3> INFO: 2560 events read in total (287ms).
[13:36:16.189] <TB3> INFO: Test took 1185ms.
[13:36:16.191] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:16.498] <TB3> INFO: Expecting 2560 events.
[13:36:17.377] <TB3> INFO: 2560 events read in total (287ms).
[13:36:17.377] <TB3> INFO: Test took 1186ms.
[13:36:17.379] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:17.686] <TB3> INFO: Expecting 2560 events.
[13:36:18.564] <TB3> INFO: 2560 events read in total (287ms).
[13:36:18.564] <TB3> INFO: Test took 1185ms.
[13:36:18.566] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:18.873] <TB3> INFO: Expecting 2560 events.
[13:36:19.751] <TB3> INFO: 2560 events read in total (287ms).
[13:36:19.751] <TB3> INFO: Test took 1185ms.
[13:36:19.753] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:20.059] <TB3> INFO: Expecting 2560 events.
[13:36:20.937] <TB3> INFO: 2560 events read in total (286ms).
[13:36:20.938] <TB3> INFO: Test took 1185ms.
[13:36:20.940] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:21.246] <TB3> INFO: Expecting 2560 events.
[13:36:22.123] <TB3> INFO: 2560 events read in total (286ms).
[13:36:22.124] <TB3> INFO: Test took 1184ms.
[13:36:22.125] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:22.432] <TB3> INFO: Expecting 2560 events.
[13:36:23.310] <TB3> INFO: 2560 events read in total (286ms).
[13:36:23.310] <TB3> INFO: Test took 1185ms.
[13:36:23.312] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:23.618] <TB3> INFO: Expecting 2560 events.
[13:36:24.501] <TB3> INFO: 2560 events read in total (291ms).
[13:36:24.501] <TB3> INFO: Test took 1189ms.
[13:36:24.503] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:24.810] <TB3> INFO: Expecting 2560 events.
[13:36:25.692] <TB3> INFO: 2560 events read in total (291ms).
[13:36:25.692] <TB3> INFO: Test took 1189ms.
[13:36:25.695] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:25.001] <TB3> INFO: Expecting 2560 events.
[13:36:26.883] <TB3> INFO: 2560 events read in total (291ms).
[13:36:26.884] <TB3> INFO: Test took 1189ms.
[13:36:26.886] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:27.192] <TB3> INFO: Expecting 2560 events.
[13:36:28.074] <TB3> INFO: 2560 events read in total (290ms).
[13:36:28.075] <TB3> INFO: Test took 1189ms.
[13:36:28.077] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:28.383] <TB3> INFO: Expecting 2560 events.
[13:36:29.265] <TB3> INFO: 2560 events read in total (290ms).
[13:36:29.265] <TB3> INFO: Test took 1188ms.
[13:36:29.267] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:29.574] <TB3> INFO: Expecting 2560 events.
[13:36:30.457] <TB3> INFO: 2560 events read in total (291ms).
[13:36:30.457] <TB3> INFO: Test took 1190ms.
[13:36:30.459] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:30.765] <TB3> INFO: Expecting 2560 events.
[13:36:31.648] <TB3> INFO: 2560 events read in total (291ms).
[13:36:31.648] <TB3> INFO: Test took 1189ms.
[13:36:31.650] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:36:31.956] <TB3> INFO: Expecting 2560 events.
[13:36:32.840] <TB3> INFO: 2560 events read in total (292ms).
[13:36:32.840] <TB3> INFO: Test took 1190ms.
[13:36:33.302] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 636 seconds
[13:36:33.302] <TB3> INFO: PH scale (per ROC): 62 51 44 35 66 57 49 37 48 48 32 49 59 49 39 55
[13:36:33.302] <TB3> INFO: PH offset (per ROC): 121 99 98 98 132 83 97 100 87 115 92 91 130 101 93 106
[13:36:33.307] <TB3> INFO: Decoding statistics:
[13:36:33.307] <TB3> INFO: General information:
[13:36:33.307] <TB3> INFO: 16bit words read: 127886
[13:36:33.307] <TB3> INFO: valid events total: 20480
[13:36:33.307] <TB3> INFO: empty events: 17977
[13:36:33.307] <TB3> INFO: valid events with pixels: 2503
[13:36:33.307] <TB3> INFO: valid pixel hits: 2503
[13:36:33.307] <TB3> INFO: Event errors: 0
[13:36:33.307] <TB3> INFO: start marker: 0
[13:36:33.307] <TB3> INFO: stop marker: 0
[13:36:33.307] <TB3> INFO: overflow: 0
[13:36:33.307] <TB3> INFO: invalid 5bit words: 0
[13:36:33.307] <TB3> INFO: invalid XOR eye diagram: 0
[13:36:33.307] <TB3> INFO: frame (failed synchr.): 0
[13:36:33.307] <TB3> INFO: idle data (no TBM trl): 0
[13:36:33.307] <TB3> INFO: no data (only TBM hdr): 0
[13:36:33.307] <TB3> INFO: TBM errors: 0
[13:36:33.307] <TB3> INFO: flawed TBM headers: 0
[13:36:33.307] <TB3> INFO: flawed TBM trailers: 0
[13:36:33.307] <TB3> INFO: event ID mismatches: 0
[13:36:33.307] <TB3> INFO: ROC errors: 0
[13:36:33.307] <TB3> INFO: missing ROC header(s): 0
[13:36:33.307] <TB3> INFO: misplaced readback start: 0
[13:36:33.307] <TB3> INFO: Pixel decoding errors: 0
[13:36:33.307] <TB3> INFO: pixel data incomplete: 0
[13:36:33.307] <TB3> INFO: pixel address: 0
[13:36:33.307] <TB3> INFO: pulse height fill bit: 0
[13:36:33.307] <TB3> INFO: buffer corruption: 0
[13:36:33.569] <TB3> INFO: ######################################################################
[13:36:33.569] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:36:33.569] <TB3> INFO: ######################################################################
[13:36:33.581] <TB3> INFO: scanning low vcal = 10
[13:36:33.812] <TB3> INFO: Expecting 41600 events.
[13:36:37.371] <TB3> INFO: 41600 events read in total (2967ms).
[13:36:37.371] <TB3> INFO: Test took 3790ms.
[13:36:37.373] <TB3> INFO: scanning low vcal = 20
[13:36:37.672] <TB3> INFO: Expecting 41600 events.
[13:36:41.248] <TB3> INFO: 41600 events read in total (2984ms).
[13:36:41.248] <TB3> INFO: Test took 3875ms.
[13:36:41.250] <TB3> INFO: scanning low vcal = 30
[13:36:41.547] <TB3> INFO: Expecting 41600 events.
[13:36:45.187] <TB3> INFO: 41600 events read in total (3048ms).
[13:36:45.187] <TB3> INFO: Test took 3937ms.
[13:36:45.190] <TB3> INFO: scanning low vcal = 40
[13:36:45.468] <TB3> INFO: Expecting 41600 events.
[13:36:49.342] <TB3> INFO: 41600 events read in total (3282ms).
[13:36:49.343] <TB3> INFO: Test took 4153ms.
[13:36:49.346] <TB3> INFO: scanning low vcal = 50
[13:36:49.622] <TB3> INFO: Expecting 41600 events.
[13:36:53.524] <TB3> INFO: 41600 events read in total (3310ms).
[13:36:53.525] <TB3> INFO: Test took 4179ms.
[13:36:53.528] <TB3> INFO: scanning low vcal = 60
[13:36:53.804] <TB3> INFO: Expecting 41600 events.
[13:36:57.773] <TB3> INFO: 41600 events read in total (3377ms).
[13:36:57.774] <TB3> INFO: Test took 4246ms.
[13:36:57.778] <TB3> INFO: scanning low vcal = 70
[13:36:58.100] <TB3> INFO: Expecting 41600 events.
[13:37:02.176] <TB3> INFO: 41600 events read in total (3484ms).
[13:37:02.177] <TB3> INFO: Test took 4399ms.
[13:37:02.182] <TB3> INFO: scanning low vcal = 80
[13:37:02.459] <TB3> INFO: Expecting 41600 events.
[13:37:06.455] <TB3> INFO: 41600 events read in total (3404ms).
[13:37:06.456] <TB3> INFO: Test took 4274ms.
[13:37:06.459] <TB3> INFO: scanning low vcal = 90
[13:37:06.736] <TB3> INFO: Expecting 41600 events.
[13:37:10.684] <TB3> INFO: 41600 events read in total (3357ms).
[13:37:10.685] <TB3> INFO: Test took 4226ms.
[13:37:10.688] <TB3> INFO: scanning low vcal = 100
[13:37:10.964] <TB3> INFO: Expecting 41600 events.
[13:37:14.902] <TB3> INFO: 41600 events read in total (3346ms).
[13:37:14.903] <TB3> INFO: Test took 4215ms.
[13:37:14.905] <TB3> INFO: scanning low vcal = 110
[13:37:15.182] <TB3> INFO: Expecting 41600 events.
[13:37:19.117] <TB3> INFO: 41600 events read in total (3343ms).
[13:37:19.118] <TB3> INFO: Test took 4212ms.
[13:37:19.121] <TB3> INFO: scanning low vcal = 120
[13:37:19.398] <TB3> INFO: Expecting 41600 events.
[13:37:23.377] <TB3> INFO: 41600 events read in total (3388ms).
[13:37:23.378] <TB3> INFO: Test took 4257ms.
[13:37:23.381] <TB3> INFO: scanning low vcal = 130
[13:37:23.658] <TB3> INFO: Expecting 41600 events.
[13:37:27.583] <TB3> INFO: 41600 events read in total (3334ms).
[13:37:27.583] <TB3> INFO: Test took 4202ms.
[13:37:27.586] <TB3> INFO: scanning low vcal = 140
[13:37:27.862] <TB3> INFO: Expecting 41600 events.
[13:37:31.844] <TB3> INFO: 41600 events read in total (3390ms).
[13:37:31.845] <TB3> INFO: Test took 4259ms.
[13:37:31.847] <TB3> INFO: scanning low vcal = 150
[13:37:32.124] <TB3> INFO: Expecting 41600 events.
[13:37:36.078] <TB3> INFO: 41600 events read in total (3363ms).
[13:37:36.078] <TB3> INFO: Test took 4231ms.
[13:37:36.081] <TB3> INFO: scanning low vcal = 160
[13:37:36.357] <TB3> INFO: Expecting 41600 events.
[13:37:40.317] <TB3> INFO: 41600 events read in total (3368ms).
[13:37:40.318] <TB3> INFO: Test took 4237ms.
[13:37:40.320] <TB3> INFO: scanning low vcal = 170
[13:37:40.597] <TB3> INFO: Expecting 41600 events.
[13:37:44.531] <TB3> INFO: 41600 events read in total (3342ms).
[13:37:44.532] <TB3> INFO: Test took 4211ms.
[13:37:44.534] <TB3> INFO: scanning low vcal = 180
[13:37:44.811] <TB3> INFO: Expecting 41600 events.
[13:37:48.749] <TB3> INFO: 41600 events read in total (3346ms).
[13:37:48.750] <TB3> INFO: Test took 4216ms.
[13:37:48.753] <TB3> INFO: scanning low vcal = 190
[13:37:49.029] <TB3> INFO: Expecting 41600 events.
[13:37:53.012] <TB3> INFO: 41600 events read in total (3391ms).
[13:37:53.013] <TB3> INFO: Test took 4260ms.
[13:37:53.015] <TB3> INFO: scanning low vcal = 200
[13:37:53.292] <TB3> INFO: Expecting 41600 events.
[13:37:57.259] <TB3> INFO: 41600 events read in total (3376ms).
[13:37:57.260] <TB3> INFO: Test took 4245ms.
[13:37:57.264] <TB3> INFO: scanning low vcal = 210
[13:37:57.540] <TB3> INFO: Expecting 41600 events.
[13:38:01.515] <TB3> INFO: 41600 events read in total (3384ms).
[13:38:01.515] <TB3> INFO: Test took 4251ms.
[13:38:01.518] <TB3> INFO: scanning low vcal = 220
[13:38:01.795] <TB3> INFO: Expecting 41600 events.
[13:38:05.832] <TB3> INFO: 41600 events read in total (3446ms).
[13:38:05.833] <TB3> INFO: Test took 4315ms.
[13:38:05.836] <TB3> INFO: scanning low vcal = 230
[13:38:06.113] <TB3> INFO: Expecting 41600 events.
[13:38:10.059] <TB3> INFO: 41600 events read in total (3355ms).
[13:38:10.060] <TB3> INFO: Test took 4224ms.
[13:38:10.063] <TB3> INFO: scanning low vcal = 240
[13:38:10.339] <TB3> INFO: Expecting 41600 events.
[13:38:14.267] <TB3> INFO: 41600 events read in total (3336ms).
[13:38:14.268] <TB3> INFO: Test took 4205ms.
[13:38:14.271] <TB3> INFO: scanning low vcal = 250
[13:38:14.548] <TB3> INFO: Expecting 41600 events.
[13:38:18.498] <TB3> INFO: 41600 events read in total (3358ms).
[13:38:18.499] <TB3> INFO: Test took 4228ms.
[13:38:18.502] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:38:18.778] <TB3> INFO: Expecting 41600 events.
[13:38:22.761] <TB3> INFO: 41600 events read in total (3391ms).
[13:38:22.762] <TB3> INFO: Test took 4260ms.
[13:38:22.764] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:38:23.041] <TB3> INFO: Expecting 41600 events.
[13:38:26.994] <TB3> INFO: 41600 events read in total (3362ms).
[13:38:26.995] <TB3> INFO: Test took 4231ms.
[13:38:26.998] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:38:27.274] <TB3> INFO: Expecting 41600 events.
[13:38:31.222] <TB3> INFO: 41600 events read in total (3356ms).
[13:38:31.223] <TB3> INFO: Test took 4225ms.
[13:38:31.225] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:38:31.502] <TB3> INFO: Expecting 41600 events.
[13:38:35.479] <TB3> INFO: 41600 events read in total (3385ms).
[13:38:35.479] <TB3> INFO: Test took 4254ms.
[13:38:35.482] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:38:35.759] <TB3> INFO: Expecting 41600 events.
[13:38:39.777] <TB3> INFO: 41600 events read in total (3427ms).
[13:38:39.778] <TB3> INFO: Test took 4296ms.
[13:38:40.245] <TB3> INFO: PixTestGainPedestal::measure() done
[13:39:16.372] <TB3> INFO: PixTestGainPedestal::fit() done
[13:39:16.372] <TB3> INFO: non-linearity mean: 0.982 0.961 0.945 0.960 0.982 0.957 0.957 0.923 0.944 0.974 0.972 0.939 0.985 0.955 0.932 0.976
[13:39:16.372] <TB3> INFO: non-linearity RMS: 0.004 0.048 0.132 0.171 0.005 0.066 0.059 0.103 0.065 0.023 0.182 0.091 0.003 0.042 0.180 0.006
[13:39:16.372] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[13:39:16.385] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[13:39:16.399] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[13:39:16.412] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[13:39:16.426] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[13:39:16.439] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[13:39:16.453] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[13:39:16.466] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[13:39:16.480] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[13:39:16.493] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[13:39:16.507] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[13:39:16.520] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[13:39:16.534] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[13:39:16.547] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[13:39:16.561] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[13:39:16.574] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[13:39:16.588] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 163 seconds
[13:39:16.588] <TB3> INFO: Decoding statistics:
[13:39:16.588] <TB3> INFO: General information:
[13:39:16.588] <TB3> INFO: 16bit words read: 3324898
[13:39:16.588] <TB3> INFO: valid events total: 332800
[13:39:16.588] <TB3> INFO: empty events: 0
[13:39:16.588] <TB3> INFO: valid events with pixels: 332800
[13:39:16.588] <TB3> INFO: valid pixel hits: 664049
[13:39:16.588] <TB3> INFO: Event errors: 0
[13:39:16.588] <TB3> INFO: start marker: 0
[13:39:16.588] <TB3> INFO: stop marker: 0
[13:39:16.588] <TB3> INFO: overflow: 0
[13:39:16.588] <TB3> INFO: invalid 5bit words: 0
[13:39:16.588] <TB3> INFO: invalid XOR eye diagram: 0
[13:39:16.588] <TB3> INFO: frame (failed synchr.): 0
[13:39:16.588] <TB3> INFO: idle data (no TBM trl): 0
[13:39:16.588] <TB3> INFO: no data (only TBM hdr): 0
[13:39:16.588] <TB3> INFO: TBM errors: 0
[13:39:16.588] <TB3> INFO: flawed TBM headers: 0
[13:39:16.588] <TB3> INFO: flawed TBM trailers: 0
[13:39:16.588] <TB3> INFO: event ID mismatches: 0
[13:39:16.588] <TB3> INFO: ROC errors: 0
[13:39:16.588] <TB3> INFO: missing ROC header(s): 0
[13:39:16.588] <TB3> INFO: misplaced readback start: 0
[13:39:16.588] <TB3> INFO: Pixel decoding errors: 0
[13:39:16.588] <TB3> INFO: pixel data incomplete: 0
[13:39:16.588] <TB3> INFO: pixel address: 0
[13:39:16.588] <TB3> INFO: pulse height fill bit: 0
[13:39:16.588] <TB3> INFO: buffer corruption: 0
[13:39:16.603] <TB3> INFO: Decoding statistics:
[13:39:16.603] <TB3> INFO: General information:
[13:39:16.603] <TB3> INFO: 16bit words read: 3454320
[13:39:16.603] <TB3> INFO: valid events total: 353536
[13:39:16.603] <TB3> INFO: empty events: 18233
[13:39:16.603] <TB3> INFO: valid events with pixels: 335303
[13:39:16.603] <TB3> INFO: valid pixel hits: 666552
[13:39:16.603] <TB3> INFO: Event errors: 0
[13:39:16.603] <TB3> INFO: start marker: 0
[13:39:16.603] <TB3> INFO: stop marker: 0
[13:39:16.603] <TB3> INFO: overflow: 0
[13:39:16.603] <TB3> INFO: invalid 5bit words: 0
[13:39:16.603] <TB3> INFO: invalid XOR eye diagram: 0
[13:39:16.603] <TB3> INFO: frame (failed synchr.): 0
[13:39:16.603] <TB3> INFO: idle data (no TBM trl): 0
[13:39:16.603] <TB3> INFO: no data (only TBM hdr): 0
[13:39:16.603] <TB3> INFO: TBM errors: 0
[13:39:16.603] <TB3> INFO: flawed TBM headers: 0
[13:39:16.603] <TB3> INFO: flawed TBM trailers: 0
[13:39:16.603] <TB3> INFO: event ID mismatches: 0
[13:39:16.603] <TB3> INFO: ROC errors: 0
[13:39:16.603] <TB3> INFO: missing ROC header(s): 0
[13:39:16.603] <TB3> INFO: misplaced readback start: 0
[13:39:16.603] <TB3> INFO: Pixel decoding errors: 0
[13:39:16.603] <TB3> INFO: pixel data incomplete: 0
[13:39:16.603] <TB3> INFO: pixel address: 0
[13:39:16.603] <TB3> INFO: pulse height fill bit: 0
[13:39:16.603] <TB3> INFO: buffer corruption: 0
[13:39:16.603] <TB3> INFO: enter test to run
[13:39:16.603] <TB3> INFO: test: exit no parameter change
[13:39:16.640] <TB3> QUIET: Connection to board 170 closed.
[13:39:16.641] <TB3> INFO: pXar: this is the end, my friend